Modelling Real-Time Systems. Henrik Ejersbo Jensen Aalborg University
|
|
- Spencer Farmer
- 5 years ago
- Views:
Transcription
1 Modelling Real-Time Systems Henrik Ejersbo Jensen Aalborg University
2 Hybrid & Real Time Systems Control Theory Plant Continuous sensors actuators Task TaskTask Controller Program Discrete Computer Science Task Eg.: Pump Control Air Bags Robots Cruise Control ABS CD Players Production Lines Real Time System A system where correctness not only depends on the logical order of events but also on their timing
3 Timed Automata Intelligent Light Control press press Press Off Light Bright Press WANT: if press is issued twice quickly then the light will get brighter; otherwise the light is turned off.
4 Timed Automata Intelligent Light Control press X:=0 X<=3 Press press Off Light Bright Press X>3 Solution: Add real-valued clock x
5 Timed Automata (Alur & Dill 1990) n Clocks: x, y Guard Boolean combination of comp with integer bounds Action used for synchronization x<=5 & y>3 a x := 0 m Transitions Reset Action performed on clocks State ( location, x=v, y=u ) where v,u are in R ( n, x=2.4, y= ) a ( m, x=0, y= ) e(1.1) ( n, x=2.4, y= ) ( n, x=3.5, y= )
6 (Henzinger et al, 1992) Timed Safety Automata = Timed Automata + Invariants n x<=5 Clocks: x, y Location Invariants x<=5 & y>3 a x := 0 Transitions ( n, x=2.4, y= ) e(3.2) e(1.1) ( n, x=2.4, y= ) ( n, x=3.5, y= ) m y<=10 g4 g1 g2 g3 Invariants ensure progress!!
7 Clock Constraints
8 Timed (Safety) Automata
9 Timed Automata: Example guard location reset
10 Timed Automata: Example guard location reset
11 Timed Automata: Example x 3
12 Timed Automata: Example x 3
13 Timed Automata: Example
14 Timed Automata: Example
15 Light Switch push y 9 click push
16 Light Switch push click y 9 push Switch may be turned on whenever at least 2 time units has elapsed since last turn off
17 Light Switch push click push Switch may be turned on whenever at least 2 time units has elapsed since last turn off Light automatically switches off after 9 time units.
18 clock valuations: state: Semantics Semantics of timed automata is a labeled transition system where ( S, ) action transition delay Transition V ( C) v : C R ( l, v) where l L and v V ( C) S { ( l, v) v V ( C) and l L a ( l, v) g( v) ( l, v) and d Inv( l)( v ( l', v' ) v' ( l, v d' ) v[ r] d) 0 iff iff whenever } and g a r l l Inv( l' )( v' ) d' d R 0
19 Semantics: Example 9)... 0,, ( 9) 3), ( 9, ( 3) 3,, ( ) 0,, ( ), ( 0), ( 3.5), ( 0), ( 3) ( y x off y x on y x on y x on y x on y x on y x off y x off click push push push push click 9 y
20 Uppaal Network of timed automata Timing requirement Uppaal No! Debugging Information Yes Uppsala (6 persons), Aalborg (10 persons), papers, 6 invited talks/tutorials 9 industrial case studies (or
21 Timed Automata in UPPAAL Networks of Timed Safety Automata + urgent actions + urgent locations (i.e. zero-delay locations) + committed locations (i.e. zero-delay and atomic locations) + data-variables (integers with bounded domains) + arrays of data-variables + guards and assignments over data-variables and arrays...
22 Networks of Timed Automata + Integer Variables + arrays. l1 m1 x>=2 i==3 a! y<=4 a. Two-way synchronization on complementary actions. x := 0 i:=i+4 Closed Systems! l2 m2 Example transitions (l1, m1,, x=2, y=3.5, i=3,..) tau (l2,m2,..,x=0, y=3.5, i=7,..) 0.2 (l1,m1,,x=2.2, y=3.7, I=3,..) If a URGENT CHANNEL
23 Timed Automata in UPPAAL clock assignments x : n clock assignments i : Expr Expr :: n Expr Expr Expr Expr Expr Expr* Expr Expr / Expr ( g d i i[ Expr] Expr : Expr) n x<=5 x<=5 & y>3 a x := 0 m y<=10 g4 g1 g2 g3 location invariants inv :: x n x n inv, inv g :: g g c d clock natural number and g c g d g, g :: x n x y n :: Expr op Expr {,,,,} op {,,,,,!} clock guards data guards
24 Urgent Channels urgent chan hurry; Informal Semantics: There will be no delay if transition with urgent action can be taken. Restrictions: No clock guard allowed on transitions with urgent actions. Invariants and data-variable guards are allowed.
25 Urgent Locations Click Urgent in State Editor. Informal Semantics: No delay in urgent location. Note: the use of urgent locations reduces the number of states in a model, and thus the complexity of the analysis.
26 Committed Locations Click Committed in State Editor. Informal Semantics: No delay in committed location. Next transition must involve automata in committed location. Note: the use of committed locations reduces the number of states in a model, and allows for more space and time efficient analysis.
27 Urgent and Committed Locations committed m n x a! 2 urgent p q a ( m p, x 2.5 ( m p, x ( n q, x 0) 2.5) a ( n r, x 2.5) 2.5) d o x : 0 r ( o ( o q, x r, x 0) 0) d ( n q, x 2.5 d) ( o q, x 2.5 d)
28 UPPAAL Specification Language A[] p (A<> p) AG p (also AF p) E<> p (E[] p) EF p (also EG p) process location data guards clock guards p::= a.l gd gc p and p p or p not p p imply p ( p ) deadlock(only for AG,EF)
29 CTL, Derived Operators possible![]! in LTL inevitable <> in LTL EF p AF p p p p p
30 CTL, Derived Operators potentially always!<>! in LTL always [] in LTL AG p p EG p p p p p p p p p p
31 Uppaal Demo
32 Exercise: The Coffee Machine Person Machine takes time to brew time-out if coffee not taken before time-limit cof Start coin! y:=0 Wait1 y<=3 y=3 pub! Go pub Observer complain if more than 8 time-units between two consecutive publ. coin Ready cof y:=0 Wait2 y<=2 y=2 Design Machine and Observer
An introduction to Uppaal and Timed Automata MVP5 1
An introduction to Uppaal and Timed Automata MVP5 1 What is Uppaal? (http://www.uppaal.com/) A simple graphical interface for drawing extended finite state machines (automatons + shared variables A graphical
More informationTimed Automata VINO 2011
Timed Automata VINO 2011 VeriDis Group - LORIA July 18, 2011 Content 1 Introduction 2 Timed Automata 3 Networks of timed automata Motivation Formalism for modeling and verification of real-time systems.
More informationWeek 4 solutions. March 21, From the left hand side formula we obtain ϕ ψ = ϕ ψ = We transform the left hand side formula as follows.
Week 4 solutions March 21, 2017 1 a. ϕ ψ ϕ (ψ ϕ). From the left hand side formula we obtain ϕ ψ = ϕ ψ = ϕ ψ = (ψ ϕ) = True (ψ ϕ). Here, True = (ψ ϕ) ( ψ ϕ) (ψ ϕ) ( ψ ϕ). In True (ψ ϕ), only ( ψ ϕ) can
More informationModels for Efficient Timed Verification
Models for Efficient Timed Verification François Laroussinie LSV / ENS de Cachan CNRS UMR 8643 Monterey Workshop - Composition of embedded systems Model checking System Properties Formalizing step? ϕ Model
More informationLecture 6: Reachability Analysis of Timed and Hybrid Automata
University of Illinois at Urbana-Champaign Lecture 6: Reachability Analysis of Timed and Hybrid Automata Sayan Mitra Special Classes of Hybrid Automata Timed Automata ß Rectangular Initialized HA Rectangular
More informationUnbounded, Fully Symbolic Model Checking of Timed Automata using Boolean Methods
Unbounded, Fully Symbolic Model Checking of Timed Automata using Boolean Methods Sanjit A. Seshia and Randal E. Bryant Computer Science Department Carnegie Mellon University Verifying Timed Embedded Systems
More informationLecture 11: Timed Automata
Real-Time Systems Lecture 11: Timed Automata 2014-07-01 11 2014-07-01 main Dr. Bernd Westphal Albert-Ludwigs-Universität Freiburg, Germany Contents & Goals Last Lecture: DC (un)decidability This Lecture:
More informationReal-Time Systems. Lecture 10: Timed Automata Dr. Bernd Westphal. Albert-Ludwigs-Universität Freiburg, Germany main
Real-Time Systems Lecture 10: Timed Automata 2013-06-04 10 2013-06-04 main Dr. Bernd Westphal Albert-Ludwigs-Universität Freiburg, Germany Contents & Goals Last Lecture: PLC, PLC automata This Lecture:
More informationRecent results on Timed Systems
Recent results on Timed Systems Time Petri Nets and Timed Automata Béatrice Bérard LAMSADE Université Paris-Dauphine & CNRS berard@lamsade.dauphine.fr Based on joint work with F. Cassez, S. Haddad, D.
More informationSaarland University Faculty of Natural Sciences and Technology I Department of Computer Science. Bachelor Thesis. From Uppaal To Slab.
Saarland University Faculty of Natural Sciences and Technology I Department of Computer Science Bachelor Thesis From Uppaal To Slab submitted by Andreas Abel submitted August 26, 2009 Supervisor Prof.
More informationReal-Time Reactive System - CCS with Time Delays
Real-Time Reactive System - CCS with Time Delays Wai Leung Sze (Stephen) Swansea University VINO 18th July 2011 Overview Introduction of real-time reactive system Describing the real-time reactive system
More informationTimed Automata. Chapter Clocks and clock constraints Clock variables and clock constraints
Chapter 10 Timed Automata In the previous chapter, we have discussed a temporal logic where time was a discrete entities. A time unit was one application of the transition relation of an LTS. We could
More informationSymbolic Reachability Analysis of Lazy Linear Hybrid Automata. Susmit Jha, Bryan Brady and Sanjit A. Seshia
Symbolic Reachability Analysis of Lazy Linear Hybrid Automata Susmit Jha, Bryan Brady and Sanjit A. Seshia Traditional Hybrid Automata Traditional Hybrid Automata do not model delay and finite precision
More informationControl Synthesis of Discrete Manufacturing Systems using Timed Finite Automata
Control Synthesis of Discrete Manufacturing Systems using Timed Finite utomata JROSLV FOGEL Institute of Informatics Slovak cademy of Sciences ratislav Dúbravská 9, SLOVK REPULIC bstract: - n application
More informationAn Introduction to Hybrid Systems Modeling
CS620, IIT BOMBAY An Introduction to Hybrid Systems Modeling Ashutosh Trivedi Department of Computer Science and Engineering, IIT Bombay CS620: New Trends in IT: Modeling and Verification of Cyber-Physical
More informationfor System Modeling, Analysis, and Optimization
Fundamental Algorithms for System Modeling, Analysis, and Optimization Stavros Tripakis UC Berkeley EECS 144/244 Fall 2013 Copyright 2013, E. A. Lee, J. Roydhowdhury, S. A. Seshia, S. Tripakis All rights
More informationEmbedded Systems 2. REVIEW: Actor models. A system is a function that accepts an input signal and yields an output signal.
Embedded Systems 2 REVIEW: Actor models A system is a function that accepts an input signal and yields an output signal. The domain and range of the system function are sets of signals, which themselves
More informationThe algorithmic analysis of hybrid system
The algorithmic analysis of hybrid system Authors: R.Alur, C. Courcoubetis etc. Course teacher: Prof. Ugo Buy Xin Li, Huiyong Xiao Nov. 13, 2002 Summary What s a hybrid system? Definition of Hybrid Automaton
More informationarxiv: v1 [cs.fl] 25 Nov 2018
Real-Time Systems Modeling and Analysis Lakhan Shiva Kamireddy [0000 0001 6007 5408] University of Colorado, Boulder CO 80302, USA {lakhan.kamireddy}@colorado.edu arxiv:1811.10083v1 [cs.fl] 25 Nov 2018
More informationModel Checking Real-Time Systems
Model Checking Real-Time Systems Patricia Bouyer, Uli Fahrenberg, Kim G. Larsen, Nicolas Markey, Joël Ouaknine, and James Worrell Abstract This chapter surveys timed automata as a formalism for model checking
More informationKim Guldstrand Larsen DENMARK
Quantitative Modal Transition Systems Kim Guldstrand Larsen Aalborg University Aalborg University, DENMARK The Early Days Edinburgh 83-85 Kim Larsen [2] Milner Symposium, Edinburgh, April 16-18, 2012 Original
More informationTemporal Logic Model Checking
18 Feb, 2009 Thomas Wahl, Oxford University Temporal Logic Model Checking 1 Temporal Logic Model Checking Thomas Wahl Computing Laboratory, Oxford University 18 Feb, 2009 Thomas Wahl, Oxford University
More informationSpiking Neural Networks as Timed Automata
Spiking Neural Networks as Timed Automata Giovanni Ciatto 1,2, Elisabetta De Maria 2, and Cinzia Di Giusto 2 1 Università di Bologna, Italy 2 Université Côté d Azur, CNRS, I3S, France Abstract In this
More informationVerification of Linear Duration Invariants by Model Checking CTL Properties
UNU-IIST International Institute for Software Technology Verification of Linear Duration Invariants by Model Checking CTL Properties Miaomiao Zhang, Dang Van Hung and Zhiming Liu June 2008 UNU-IIST Report
More informationQEES lecture 5. Timed Automata. Welcome. Marielle Stoelinga Formal Methods & Tools
QEES lecture 5 Timed Automata Welcome Marielle Stoelinga Formal Methods & Tools Agenda 1. Solution to exercises 2. Timed Automata @ QEES content of 4 lectures 3. Formal definitions 4. Work on Assignment:
More informationFormally Correct Monitors for Hybrid Automata. Verimag Research Report n o TR
Formally Correct Monitors for Hybrid Automata Goran Frehse, Nikolaos Kekatos, Dejan Nickovic Verimag Research Report n o TR-2017-5 September 20, 2017 Verimag, University of Grenoble Alpes, Grenoble, France.
More informationModel Checking Linear Duration Invariants of Networks of Automata
Model Checking Linear Duration Invariants of Networks of Automata Miaomiao Zhang 1, Zhiming Liu 2, and Naijun Zhan 3 1 School of Software Engineering, Tongji University, Shanghai, China miaomiao@tongji.edu.cn
More informationMODEL CHECKING TIMED SAFETY INSTRUMENTED SYSTEMS
TKK Reports in Information and Computer Science Espoo 2008 TKK-ICS-R3 MODEL CHECKING TIMED SAFETY INSTRUMENTED SYSTEMS Jussi Lahtinen ABTEKNILLINEN KORKEAKOULU TEKNISKA HÖGSKOLAN HELSINKI UNIVERSITY OF
More informationSerge Haddad Mathieu Sassolas. Verification on Interrupt Timed Automata. Research Report LSV-09-16
Béatrice Bérard Serge Haddad Mathieu Sassolas Verification on Interrupt Timed Automata Research Report LSV-09-16 July 2009 Verification on Interrupt Timed Automata Béatrice Bérard 1, Serge Haddad 2, Mathieu
More informationAn Efficient Translation of Timed-Arc Petri Nets to Networks of Timed Automata
An Efficient Translation of TimedArc Petri Nets to Networks of Timed Automata Joakim Byg, Kenneth Yrke Jørgensen, and Jiří Srba Department of Computer Science Aalborg University Selma Lagerlöfs Vej 300
More informationFrom games to executables!
From games to executables! Implementations of strategies generated from UPPAAL TIGA by Kenneth Blanner Holleufer and Jesper Brix Rosenkilde THESIS for the degree of MASTER OF SCIENCE (Master of computer
More informationDiagnosis of Dense-Time Systems using Digital-Clocks
Diagnosis of Dense-Time Systems using Digital-Clocks Shengbing Jiang GM R&D and Planning Mail Code 480-106-390 Warren, MI 48090-9055 Email: shengbing.jiang@gm.com Ratnesh Kumar Dept. of Elec. & Comp. Eng.
More informationVerification of Polynomial Interrupt Timed Automata
Verification of Polynomial Interrupt Timed Automata Béatrice Bérard 1, Serge Haddad 2, Claudine Picaronny 2, Mohab Safey El Din 1, Mathieu Sassolas 3 1 Université P. & M. Curie, LIP6 2 ENS Cachan, LSV
More informationReal-Time Systems. Lecture 15: The Universality Problem for TBA Dr. Bernd Westphal. Albert-Ludwigs-Universität Freiburg, Germany
Real-Time Systems Lecture 15: The Universality Problem for TBA 2013-06-26 15 2013-06-26 main Dr. Bernd Westphal Albert-Ludwigs-Universität Freiburg, Germany Contents & Goals Last Lecture: Extended Timed
More informationSafety-Critical Medical Device Development Using the UPP2SF Model
University of Pennsylvania ScholarlyCommons Departmental Papers (CIS) Department of Computer & Information Science 2014 Safety-Critical Medical Device Development Using the UPP2SF Model Miroslav Pajic
More informationAutomata-theoretic analysis of hybrid systems
Automata-theoretic analysis of hybrid systems Madhavan Mukund SPIC Mathematical Institute 92, G N Chetty Road Chennai 600 017, India Email: madhavan@smi.ernet.in URL: http://www.smi.ernet.in/~madhavan
More informationMTL-Model Checking of One-Clock Parametric Timed Automata is Undecidable
MTL-Model Checking of One-Clock Parametric Timed Automata is Undecidable SynCop 2014 1st International Workshop on Synthesis of Continuous Parameters Karin Quaas University of Leipzig 6th April 2014 Outline
More informationGeorgios E. Fainekos, Savvas G. Loizou and George J. Pappas. GRASP Lab Departments of CIS, MEAM and ESE University of Pennsylvania
Georgios E. Fainekos, Savvas G. Loizou and George J. Pappas CDC 2006 Math free Presentation! Lab Departments of CIS, MEAM and ESE University of Pennsylvania Motivation Motion Planning 60 50 40 π 0 π 4
More informationModel Checking I. What are LTL and CTL? dack. and. dreq. and. q0bar
Model Checking I What are LTL and CTL? and dack q0 or D dreq D q0bar and 1 View circuit as a transition system (dreq, q0, dack) (dreq, q0, dack ) q0 = dreq dack = dreq and (q0 or (not q0 and dack)) q0
More informationNew Complexity Results for Some Linear Counting Problems Using Minimal Solutions to Linear Diophantine Equations
New Complexity Results for Some Linear Counting Problems Using Minimal Solutions to Linear Diophantine Equations (Extended Abstract) Gaoyan Xie, Cheng Li and Zhe Dang School of Electrical Engineering and
More informationTimed I/O Automata: A Complete Specification Theory for Real-time Systems
Timed I/O Automata: A Complete Specification Theory for Real-time Systems Alexandre David Computer Science Aalborg University, Denmark adavid@cs.aau.dk Ulrik Nyman Computer Science Aalborg University,
More informationModel Checking I. What are LTL and CTL? dack. and. dreq. and. q0bar
Model Checking I What are LTL and CTL? q0 or and dack dreq q0bar and 1 View circuit as a transition system (dreq, q0, dack) (dreq, q0, dack ) q0 = dreq and dack = dreq & (q0 + ( q0 & dack)) q0 or and D
More informationCo-simulation of embedded systems: a PVS-Simulink integrated environment
Co-simulation of embedded systems: a PVS-Simulink integrated environment Cinzia Bernardeschi 1 Andrea Domenici 1 Paolo Masci 2 1 Department of Information Engineering, University of Pisa 2 INESC-TEC and
More informationTIMED automata, introduced by Alur and Dill in [3], have
1 Language Inclusion Checking of Timed Automata with Non-Zenoness Xinyu Wang, Jun Sun, Ting Wang, and Shengchao Qin Abstract Given a timed automaton P modeling an implementation and a timed automaton S
More informationUPPAAL tutorial What s inside UPPAAL The UPPAAL input languages
UPPAAL tutorial What s inside UPPAAL The UPPAAL inut languages 1 UPPAAL tool Develoed jointly by Usala & Aalborg University >>8,000 downloads since 1999 1 UPPAAL Tool Simulation Modeling Verification 3
More informationGuest lecturer: Prof. Mark Reynolds, The University of Western Australia
Università degli studi di Udine Corso per il dottorato di ricerca: Temporal Logics: Satisfiability Checking, Model Checking, and Synthesis January 2017 Lecture 01, Part 02: Temporal Logics Guest lecturer:
More informationDiscrete abstractions of hybrid systems for verification
Discrete abstractions of hybrid systems for verification George J. Pappas Departments of ESE and CIS University of Pennsylvania pappasg@ee.upenn.edu http://www.seas.upenn.edu/~pappasg DISC Summer School
More informationModel Based Testing -- FSM based testing
Model Based Testing -- FSM based testing Brian Nielsen {bnielsen}@cs.aau.dk Automated Model Based Conformance Testing x>=2 Model DBLclick! click? x:=0 click? x
More informationOn Model Checking for Visibly Pushdown Automata
Japan Institute of Advanced Industrial Science and Technology Research Center for Specification and Verification LATA 2012 On Model Checking for Visibly Pushdown Automata Nguyen Van Tang and Hitoshi Ohsaki
More informationAbstractions and Decision Procedures for Effective Software Model Checking
Abstractions and Decision Procedures for Effective Software Model Checking Prof. Natasha Sharygina The University of Lugano, Carnegie Mellon University Microsoft Summer School, Moscow, July 2011 Lecture
More informationExperiments in the use of tau-simulations for the components-verification of real-time systems
Experiments in the use of tau-simulations for the components-verification of real-time systems Françoise Bellegarde, Jacques Julliand, Hassan Mountassir, Emilie Oudot To cite this version: Françoise Bellegarde,
More informationLanguage Emptiness of Continuous-Time Parametric Timed Automata
Language Emptiness of Continuous-Time Parametric Timed Automata Nikola Beneš 1, Peter Bezděk 1, Kim G. Larsen 2, and Jiří Srba 2 1 Faculty of Informatics, Masaryk University Brno, Czech Republic 2 Department
More informationMODEL-CHECKING IN DENSE REAL-TIME SHANT HARUTUNIAN
MODEL-CHECKING IN DENSE REAL-TIME SHANT HARUTUNIAN 1. Introduction These slides are for a talk based on the paper Model-Checking in Dense Real- Time, by Rajeev Alur, Costas Courcoubetis, and David Dill.
More informationFinite-State Model Checking
EECS 219C: Computer-Aided Verification Intro. to Model Checking: Models and Properties Sanjit A. Seshia EECS, UC Berkeley Finite-State Model Checking G(p X q) Temporal logic q p FSM Model Checker Yes,
More informationHourglass Automata. Yuki Osada, Tim French, Mark Reynolds, and Harry Smallbone
Hourglass Automata Yuki Osada, Tim French, Mark Reynolds, and Harry Smallbone The University of Western Australia. yuki.osada@research.uwa.edu.au, {tim.french,mark.reynolds}@uwa.edu.au, 21306592@student.uwa.edu.au
More informationTopics in Timed Automata
1/32 Topics in Timed Automata B. Srivathsan RWTH-Aachen Software modeling and Verification group 2/32 Timed Automata A theory of timed automata R. Alur and D. Dill, TCS 94 2/32 Timed Automata Language
More informationAutomata-Theoretic Model Checking of Reactive Systems
Automata-Theoretic Model Checking of Reactive Systems Radu Iosif Verimag/CNRS (Grenoble, France) Thanks to Tom Henzinger (IST, Austria), Barbara Jobstmann (CNRS, Grenoble) and Doron Peled (Bar-Ilan University,
More informationUndecidability Results for Timed Automata with Silent Transitions
Fundamenta Informaticae XXI (2001) 1001 1025 1001 IOS Press Undecidability Results for Timed Automata with Silent Transitions Patricia Bouyer LSV, ENS Cachan, CNRS, France bouyer@lsv.ens-cachan.fr Serge
More informationLecture 16: Computation Tree Logic (CTL)
Lecture 16: Computation Tree Logic (CTL) 1 Programme for the upcoming lectures Introducing CTL Basic Algorithms for CTL CTL and Fairness; computing strongly connected components Basic Decision Diagrams
More informationIntroduction to FSM-modelling and test. Brian Nielsen Department of Computer Science, Aalborg University, Denmark CSS
Introduction to FSM-modelling and test Brian Nielsen bnielsen@cs.auc.dk Department of Computer Science, Aalborg University, Denmark CSS 1010111011010101 1011010101110111 Menu Basic definitions and fundamental
More informationSupervisory Control of Hybrid Systems
X.D. Koutsoukos, P.J. Antsaklis, J.A. Stiver and M.D. Lemmon, "Supervisory Control of Hybrid Systems, in Special Issue on Hybrid Systems: Theory and Applications, Proceedings of the IEEE, P.J. Antsaklis,
More informationA brief history of model checking. Ken McMillan Cadence Berkeley Labs
A brief history of model checking Ken McMillan Cadence Berkeley Labs mcmillan@cadence.com Outline Part I -- Introduction to model checking Automatic formal verification of finite-state systems Applications
More informationA Proof System for Timed Automata
A Proof System for Timed Automata Huimin Lin 1 and Wang Yi 2 1 Laboratory for Computer Science Institute of Software, Chinese Academy of Sciences lhm@ox.ios.ac.cn 2 Department of Computer Systems Uppsala
More informationAnalysis of a Boost Converter Circuit Using Linear Hybrid Automata
Analysis of a Boost Converter Circuit Using Linear Hybrid Automata Ulrich Kühne LSV ENS de Cachan, 94235 Cachan Cedex, France, kuehne@lsv.ens-cachan.fr 1 Introduction Boost converter circuits are an important
More informationSoftware Verification
Software Verification Grégoire Sutre LaBRI, University of Bordeaux, CNRS, France Summer School on Verification Technology, Systems & Applications September 2008 Grégoire Sutre Software Verification VTSA
More informationEfficient timed model checking for discrete-time systems
Efficient timed model checking for discrete-time systems F. Laroussinie, N. Markey and Ph. Schnoebelen Lab. Spécification & Vérification ENS de Cachan & CNRS UMR 8643 6, av. Pdt. Wilson, 94235 Cachan Cedex
More informationLiveness in L/U-Parametric Timed Automata
Liveness in L/U-Parametric Timed Automata Étienne André and Didier Lime [AL17] Université Paris 13, LIPN and École Centrale de Nantes, LS2N Highlights, 14 September 2017, London, England Étienne André
More informationLayered Composition for Timed Automata
Layered Composition for Timed Automata Ernst-Rüdiger Olderog and Mani Swaminathan Department of Computing Science University of Oldenburg, Germany {olderog, mani.swaminathan}@informatik.uni-oldenburg.de
More informationComputation Tree Logic
Computation Tree Logic Computation tree logic (CTL) is a branching-time logic that includes the propositional connectives as well as temporal connectives AX, EX, AU, EU, AG, EG, AF, and EF. The syntax
More informationSemantic Equivalences and the. Verification of Infinite-State Systems 1 c 2004 Richard Mayr
Semantic Equivalences and the Verification of Infinite-State Systems Richard Mayr Department of Computer Science Albert-Ludwigs-University Freiburg Germany Verification of Infinite-State Systems 1 c 2004
More informationTimed Automata: Semantics, Algorithms and Tools
Timed Automata: Semantics, Algorithms and Tools Johan Bengtsson and Wang Yi Uppsala University {johanb,yi}@it.uu.se Abstract. This chapter is to provide a tutorial and pointers to results and related work
More informationStochastic, Hybrid and Real-Time Systems: From Foundations To Applications with Modest
LCCC WORKSHOP 2013, LUND Stochastic, Hybrid and Real-Time Systems: From Foundations To Applications with Modest, Arnd Hartmanns Saarland University, Germany based on joint work with Jonathan Bogdoll, Henrik
More informationOverview. Discrete Event Systems Verification of Finite Automata. What can finite automata be used for? What can finite automata be used for?
Computer Engineering and Networks Overview Discrete Event Systems Verification of Finite Automata Lothar Thiele Introduction Binary Decision Diagrams Representation of Boolean Functions Comparing two circuits
More informationTimed Automata lllllllllll Decidability Results
Timed Automata lllllllllll Decidability Results Decidability? a c b OBSTACLE: Uncountably infinite state space Reachable? Stable Quotient Partitioning a c b y y x Reachable? x Stable Quotient Partitioning
More informationmodels, languages, dynamics Eugene Asarin PIMS/EQINOCS Workshop on Automata Theory and Symbolic Dynamics LIAFA - University Paris Diderot and CNRS
models, s, LIAFA - University Paris Diderot and CNRS PIMS/EQINOCS Workshop on Automata Theory and Symbolic Dynamics Context A model for verification of real-time systems Invented by Alur and Dill in early
More informationFormal Methods in Software Engineering
Formal Methods in Software Engineering Modeling Prof. Dr. Joel Greenyer October 21, 2014 Organizational Issues Tutorial dates: I will offer two tutorial dates Tuesdays 15:00-16:00 in A310 (before the lecture,
More informationOverview. overview / 357
Overview overview6.1 Introduction Modelling parallel systems Linear Time Properties Regular Properties Linear Temporal Logic (LTL) Computation Tree Logic syntax and semantics of CTL expressiveness of CTL
More informationIntroduction to Embedded Systems
Introduction to Embedded Systems Sanjit A. Seshia UC Berkeley EECS 149/249A Fall 2015 2008-2015: E. A. Lee, A. L. Sangiovanni-Vincentelli, S. A. Seshia. All rights reserved. Chapter 13: Specification and
More informationComputing Accumulated Delays in Real-time Systems
Computing Accumulated Delays in Real-time Systems P~jeev Alur 1, Costas Courcoubetis u *, Thomas A. Henzinger 3 ** i AT&T Bell Laboratories, Murray Hill 2 Department of Computer Science, University of
More informationTimed Games and. Stochastic Priced Timed Games
STRATEGO Timed Games and TIGA Stochastic Priced Timed Games Synthesis & Machine Learning Kim G. Larsen Aalborg University DENMARK Overview Timed Automata Decidability (regions) Symbolic Verification (zones)
More informationThe Element of Surprise in Timed Games
In Proc. of CONCUR 2003: 14th International Conference on Concurrency Theory, Lectures Notes in Computer Science, Springer-Verlag, 2003. The Element of Surprise in Timed Games Luca de Alfaro 1, Marco Faella
More informationModel checking, verification of CTL. One must verify or expel... doubts, and convert them into the certainty of YES [Thomas Carlyle]
Chater 5 Model checking, verification of CTL One must verify or exel... doubts, and convert them into the certainty of YES or NO. [Thomas Carlyle] 5. The verification setting Page 66 We introduce linear
More informationDesign and Verification of Long Running Transactions in a Timed Framework
Design and Verification of Long Running Transactions in a Timed Framework Ruggero Lanotte a, Andrea Maggiolo Schettini b, Paolo Milazzo b, Angelo Troina c, a Dipartimento di Scienze della Cultura, Politiche
More informationPartial Order Reductions for Timed Systems
Partial Order Reductions for Timed Systems Johan Bengtsson 1 Bengt Jonsson 1 Johan Lilius 2 Wang Yi 1 1 Department of Computer Systems, Uppsala University, Sweden. Email: {bengt,johanb,yi}@docs.uu.se 2
More informationCOMPLEXITY ANALYSIS OF THE PRESBURGER REACHABILITY PROBLEM FOR DISCRETE TIMED AUTOMATA CHENG LI
COMPLEXITY ANALYSIS OF THE PRESBURGER REACHABILITY PROBLEM FOR DISCRETE TIMED AUTOMATA By CHENG LI A thesis submitted in partial fulfillment of the requirements for the degree of MASTER OF SCIENCE IN ELECTRICAL
More informationTimed Control with Observation Based and Stuttering Invariant Strategies
Author manuscript, published in "5th Int. Symp. on Automated Technology for Verification and Analysis (ATVA'07) 4762 (2007) 307--321" Timed Control with Observation Based and Stuttering Invariant Strategies
More informationPushdown timed automata:a binary reachability characterization and safety verication
Theoretical Computer Science 302 (2003) 93 121 www.elsevier.com/locate/tcs Pushdown timed automata:a binary reachability characterization and safety verication Zhe Dang School of Electrical Engineering
More informationLaboratoire Spécification & Vérification. Language Preservation Problems in Parametric Timed Automata. Étienne André and Nicolas Markey
Language Preservation Problems in Parametric Timed Automata Étienne André and Nicolas Markey June 2015 Research report LSV-15-05 (Version 1) Laboratoire Spécification & Vérification École Normale Supérieure
More informationComplexity Issues in Automated Addition of Time-Bounded Liveness Properties 1
Complexity Issues in Automated Addition of Time-Bounded Liveness Properties 1 Borzoo Bonakdarpour and Sandeep S. Kulkarni Software Engineering and Network Systems Laboratory, Department of Computer Science
More informationClock Matrix Diagrams
Clock Matrix Diagrams U N I V E R S I T A S S A R A V I E N I S S Bachelor s Thesis Daniel Fass daniel@react.cs.uni-sb.de Reactive Systems Group Department of Computer Science Universität des Saarlandes
More informationComplexity Issues in Automated Addition of Time-Bounded Liveness Properties 1
Complexity Issues in Automated Addition of Time-Bounded Liveness Properties 1 Borzoo Bonakdarpour and Sandeep S. Kulkarni Software Engineering and Network Systems Laboratory, Department of Computer Science
More informationCEGAR:Counterexample-Guided Abstraction Refinement
CEGAR: Counterexample-guided Abstraction Refinement Sayan Mitra ECE/CS 584: Embedded System Verification November 13, 2012 Outline Finite State Systems: Abstraction Refinement CEGAR Validation Refinment
More informationAutomated Verification of a Parametric Real-Time Program: The ABR Conformance Protocol
Automated Verification of a Parametric Real-Time Program: The ABR Conformance Protocol Béatrice Bérard and Laurent Fribourg LSV Ecole Normale Supérieure de Cachan & CNRS 61 av. Pdt. Wilson - 94235 Cachan
More informationVerification and Performance Evaluation of Timed Game Strategies
Verification and Performance Evaluation of Timed Game Strategies Alexandre David 1, Huixing Fang 2, Kim G. Larsen 1, and Zhengkui Zhang 1 1 Department of Computer Science, Aalborg University, Denmark {adavid,kgl,zhzhang}@cs.aau.dk
More informationReachability Results for Timed Automata with Unbounded Data Structures
Acta Informatica manuscript No. (will be inserted by the editor) Reachability Results for Timed Automata with Unbounded Data Structures Ruggero Lanotte Andrea Maggiolo-Schettini Angelo Troina Received:
More informationModeling and Analysis of Hybrid Systems
Modeling and Analysis of Hybrid Systems Algorithmic analysis for linear hybrid systems Prof. Dr. Erika Ábrahám Informatik 2 - Theory of Hybrid Systems RWTH Aachen University SS 2015 Ábrahám - Hybrid Systems
More informationRobustness and Implementability of Timed Automata
Robustness and Implementability of Timed Automata Martin De Wulf, Laurent Doyen, Nicolas Markey, and Jean-François Raskin Computer Science Departement, Université Libre de Bruxelles, Belgium Abstract.
More informationBridging the Semantic Gap Between Heterogeneous Modeling Formalisms and FMI
Bridging the Semantic Gap Between Heterogeneous Modeling Formalisms and FMI Stavros Tripakis Aalto University and University of California, Berkeley Abstract FMI (Functional Mockup Interface) is a standard
More informationHybrid Systems Modeling, Analysis and Control
Hybrid Systems Modeling, Analysis and Control Radu Grosu Vienna University of Technology Lecture 6 Continuous AND Discrete Systems Control Theory Continuous systems approximation, stability control, robustness
More informationFrom Timed Automata to Stochastic Hybrid Games
From Timed Automata to Stochastic Hybrid Games Model Checking, Performance Analysis, Optimization, Synthesis, and Machine Learning Kim G. Larsen Aalborg University, DENMARK CISS Center For Embedded Software
More information