Semantic Equivalences and the. Verification of Infinite-State Systems 1 c 2004 Richard Mayr

Size: px
Start display at page:

Download "Semantic Equivalences and the. Verification of Infinite-State Systems 1 c 2004 Richard Mayr"

Transcription

1 Semantic Equivalences and the Verification of Infinite-State Systems Richard Mayr Department of Computer Science Albert-Ludwigs-University Freiburg Germany Verification of Infinite-State Systems 1 c 2004 Richard Mayr

2 Formal Verification Proving the correctness of a given hardware- or software system w.r.t. specification, or finding the errors in it. a given Specification can be described by Specification languages Temporal logic formulae Abstract prototype systems The goal: If the system is correct, then prove it (automatically or semi-automatically). If the system is not correct then explain why. Ideally by a short counterexample. Verification of Infinite-State Systems 2 c 2004 Richard Mayr

3 Verification Methods Semiautomatic methods Manual or semiautomatic abstraction techniques. Reduction to problems which automatic methods can handle. Theorem provers (e.g., Isabelle, PVS). Automatic methods Reachability analysis Temporal logics and model checking (e.g., SPIN, SMV). Semantic equivalence checking Semantic preorder checking (i.e., A B, B implements A). Simulation preorder Trace preorder Verification of Infinite-State Systems 3 c 2004 Richard Mayr

4 Formal Verification Methods Finite-state systems: Theory relatively well understood. Problems with handling very large state spaces. Techniques used: BDDs minimization (preserving interesting properties) symmetry reduction PO-reduction search heuristics Many software systems are infinite-state. How to handle them? Verification of Infinite-State Systems 4 c 2004 Richard Mayr

5 What makes systems infinite? Unbounded recursion: Abstract models: pushdown automata, context-free processes Process creation and concurrency: Abstract models: Petri nets, Basic Parallel Processes, PA-processes Counters: Abstract models: counter machines (reversal-bounded, flat, 1-counter) Buffers: Abstract models: FIFO-channel systems, Lossy FIFO-channel systems Real time: Abstract models: Timed automata. Unbounded data structures: Abstract models: Extended automata Verification of Infinite-State Systems 5 c 2004 Richard Mayr

6 Model Checking and Related Methods Reachability analysis: Symbolic representations of (infinite) sets of states. Algorithms for computing Pre (set of predecessors) of a given set of states Post (set of successors) of a given set of states = Useful for checking safety-properties. Model checking with branching-time temporal logics: EF, EG, CTL, CTL, modal µ-calculus. Model checking with linear-time temporal logics: LTL, linear-time µ-calculus. Semantic equivalence/preorder checking of abstract specification and more refined model. E.g., simulation, bisimulation. Verification of Infinite-State Systems 6 c 2004 Richard Mayr

7 Highlights of my own work Process Rewrite Systems [Mayr, 1997]. A unified formalism for describing many classes of systems by term rewriting. Strictly more general than Petri nets and pushdown automata. Decidable reachability problem. Temporal logic EF Decidability of model checking for process classes PA and PAD [Mayr, 1997,1998]. Construction of characteristic EF-formulae for finite-state systems w.r.t. strong and weak bisimulation [Jančar, Kučera, Mayr, 1998]. Undecidability of boundedness for lossy counter machines [Mayr, 2000]. Very general undecidability result with consequences for lossy FIFO-channel systems, transfer Petri nets, parameterized systems, etc. Verification of Infinite-State Systems 7 c 2004 Richard Mayr

8 More Highlights Undecidability of weak bisimulation equivalence for 1-counter processes [Mayr, 2003]. Weak bisimilarity undecidable for Petri nets with just 1 unbounded place. Thus undecidable for almost all classes of infinite-state systems. Polynomial time algorithm for checking strong/weak bisimulation equivalence between context-free processes and finite-state systems [Kučera, Mayr, 1999]. Works by construction of the bisimulation-base, a compact representation of the whole infinite equivalence relation. Why simulation is harder than bisimulation [Kučera, Mayr, 2002]. Applied verification: A scalable automatic method for analyzing buffer overflow conditions in UML RT and Promela models. IBOC-tool. Verification of Infinite-State Systems 8 c 2004 Richard Mayr

9 Semantic Equivalences Consider systems/states as equivalent if they have the same behavior/properties. What is the same behavior? Notions of semantic equivalence. Does implementation A really implement specification B? Notions of semantic preorder. Central notions: Simulation and Bisimulation Definition Game theoretic characterization Logical characterization Verification of Infinite-State Systems 9 c 2004 Richard Mayr

10 General Model Labeled transition graph: (V, a, Act) V Act a V Act V Set of vertices. (Vertices interpreted as states.) Set of atomic actions. Directed edges, labeled with atomic actions. Consider semantic equivalences R V V in a single transition graph. States of different graphs can be compared by putting the graphs side-by-side and considering them as a single graph. Verification of Infinite-State Systems 10 c 2004 Richard Mayr

11 Semantic Equivalences: Definition Simulation: A relation R V V is a simulation if whenever (X, Y ) R then for each a Act: X with X a X Y with Y a Y and (X, Y ) R. Simulation preorder is the largest simulation relation, denoted by. Simulation equivalence is defined as Bisimulation: A relation R is a bisimulation iff it is a symmetric simulation. The largest bisimulation is an equivalence, denoted by. Verification of Infinite-State Systems 11 c 2004 Richard Mayr

12 Simulation Games Simulation game between two players: Attacker and Defender. Initial configuration: Pair of states (X, Y ). Attacker wants to show X Y. Defender wants to show X Y. In every round of the game: Attacker makes a move on the left side, e.g., X a X. Defender must respond by a move on the right side with the same action, e.g., Y a Y. The new configuration is (X, Y ). Next round. If one player cannot move then the other player wins. The defender wins every infinite game. Theorem: X Y iff the defender has a winning strategy. Verification of Infinite-State Systems 12 c 2004 Richard Mayr

13 Bisimulation Games Bisimulation game between two players: Attacker and Defender. Initial configuration (X, Y ). Attacker wants to show X Y. Defender wants to show X Y. In every round of the game: Attacker chooses a side (either X or Y ) and makes a move (e.g., X a X or Y a Y ). Defender must respond by a move on the other side with the same action (e.g., Y a Y or X a X ). The new configuration is (X, Y ). If one player cannot move then the other player wins. The defender wins every infinite game. Theorem: X Y iff the defender has a winning strategy. Verification of Infinite-State Systems 13 c 2004 Richard Mayr

14 Differences between Simulation and Bisimulation X Y a a a a b c b c b c X Y, but X Y. Verification of Infinite-State Systems 14 c 2004 Richard Mayr

15 Weak Simulation and Weak Bisimulation Need to abstract from internal actions in system models. E.g., prove the semantic equivalence of a more detailed implementation and an abstract specification. Weak simulation and weak bisimulation abstract from internal τ-actions. Defined with long moves τ a, τ instead of the normal internal actions before and after every visible action. a. Arbitrarily many On finite-state systems weak equivalences/preorders can be reduced to strong ones by computing the transitive closure w.r.t. τ-actions. On infinite-state systems this is not effectively possible in general. Verification of Infinite-State Systems 15 c 2004 Richard Mayr

16 (but not vice-versa). Connections to Temporal Logics On finite labeled transition graphs deciding,, is polynomial. For image-finite graphs is the equivalence induced by branching-time logics. For every branching-time temporal logic L with (e.g., L = CTL) we have Hennessy-Milner Logic L action-based µ-calculus X Y iff X,Y cannot be distinguished in L Every finite labeled transition graph can be described up-to (strong and weak) bisimulation equivalence in the temporal logic EF (a fragment of CTL) [Jančar, Kučera, Mayr]. Verification of Infinite-State Systems 16 c 2004 Richard Mayr

17 General Trends 1. On infinite-state systems, weak equivalences are computationally harder than strong ones. 2. Simulation is computationally harder than bisimulation on almost all natural classes of systems. Verification of Infinite-State Systems 17 c 2004 Richard Mayr

18 Decidability Results Stronger and stronger positive decidability results for strong bisimulation: Strong bisimilarity decidable for 1-counter machines [Jančar]. Strong bisimilarity decidable for normed pushdown automata [Stirling]. Strong bisimilarity decidable for general pushdown automata [Sénizergues]. Stronger and stronger negative decidability results for weak bisimulation: Weak bisimilarity undecidable for general pushdown automata [Srba]. Weak bisimilarity undecidable for normed pushdown automata [Srba]. Weak bisimilarity undecidable for normed 1-counter machines; even for normed 1-counter nets (Petri nets with only 1 unbounded place) [Mayr]. Verification of Infinite-State Systems 18 c 2004 Richard Mayr

19 Simulation vs. Bisimulation Complexity Simulation Bisimulation normed PA-normed PA undecidable decidable PDA-PDA undecidable decidable, EXPTIME-hard PDA-FS EXPTIME-complete PSPACE-complete BPA-FS EXPTIME-complete polynomial Verification of Infinite-State Systems 19 c 2004 Richard Mayr

20 Why is simulation harder than bisimulation? One can reduce bisimulation checking to simulation checking (in polynomial time) for any finitely generated class of transition systems that satisfies one of these properties [Kučera, Mayr, 2002]. The systems can test for non-enabledness of actions (e.g., test for zero). Satisfied, e.g., for pushdown automata. The class is closed under parallel composition of processes and synchronization (over the atomic actions). Satisfied, e.g., for Petri nets. Most classes of systems satisfy one of these requirements. checking must be at least as hard as bisimulation checking. Thus, simulation Verification of Infinite-State Systems 20 c 2004 Richard Mayr

21 Bisim. Sim.: Method 1 Given two labeled transition graphs S and T. Construct modified transition graphs S and T with the property: S T S T How? Encode the bisimulation game between S and T in a simulation game between S and T. Remark: One can easily reduce simulation preorder to simulation equivalence. Given systems S, T. Define S, T by S a S, S a T, T a T. Then S T S T Verification of Infinite-State Systems 21 c 2004 Richard Mayr

22 The Power of the Defender in Simulation Games How can the defender in the simulation game force the attacker to something? He threatens to become universal, i.e, to go to a universal state. (At a universal state every action is enabled and stays enabled forever, i.e., Act true.) a a,b,c c a a b a,b,c b c b c Verification of Infinite-State Systems 22 c 2004 Richard Mayr

23 The Power of the Defender in Bisimulation Games How can the defender in the bisim. game force the attacker to do something? He threatens to make the two processes equal. A technique by Jančar, Srba. (Here slightly improved): X X a a a a a Y Y 1 Y Z.1 Z.2 Z.1 Z.2 Verification of Infinite-State Systems 23 c 2004 Richard Mayr

24 Bisim. Game Sim. Game 1. Case (simple): If in the bisimulation game between S and T the attacker moves on the left side, i.e., S a S i, then the defender moves on the right side T a T j. Directly encoded in the simulation game between S and T. In simulation games the attacker always moves on the left side. One round of the bisimulation game encoded in one round of the simulation game. Verification of Infinite-State Systems 24 c 2004 Richard Mayr

25 Bisim. Game Sim. Game (cont.) 2. Case (more complex): Assume that in the bisimulation game between S and T the attacker moves on the right side, i.e., T a T i and the defender responds by S a S j. Encoding in the simulation game: Attacker moves S a i Ŝ (chooses i, demands move to T i on right side) Defender responds T a i T i,j (encodes i, chooses j) Attacker moves Ŝ a j S j (must make this move; otherwise defender wins) a j Defender moves T i,j T i c (All other moves lead to a universal state, T i,j U for all c aj.) One round of the bisimulation game encoded in two rounds of the simulation game. Verification of Infinite-State Systems 25 c 2004 Richard Mayr

26 Requirements for the Construction 1. Problem: The attacker (moving on the left side in S) cannot know which actions are currently enabled on the right side (in T ). What happens if the attacker demands something impossible, i.e., a move in T that is not enabled? The defender notices this and goes to a universal state (and thus wins the game). This response must be possible only if the required move is really not enabled. Analogously, if the defender demands an impossible move on the attacker s side, then the attacker can win by performing a special action. Conclusion: A test for enabledness of actions is required. pushdown automata, but not for Petri nets. Possible, e.g., for Verification of Infinite-State Systems 26 c 2004 Richard Mayr

27 Formal Def. of Construction 1. Given two labeled transition graphs S and T (with initial states s 0, t 0 ). Define new systems S := Attacker-extension(S) T := Defender-extension(T ) with initial states s 0, t 0. and obtain S T S T Verification of Infinite-State Systems 27 c 2004 Richard Mayr

28 i r[a i, j, 1] r[a i, j, d] λ j i a i s t δ 1 i δ d i a 1 a k a 1 a k a1 a k a 1 a k s(a 1, 1) s(a 1, n 1 ) s(a k, 1) s(a k, n k ) t(a 1, 1) t(a 1, m 1 ) t(a k, 1) t(a k, m k ) t(a i, j) t(a i, j) succ(s, a 1 ) succ(s, a k ) succ(t, a 1 ) succ(t, a k ) Λ s Θ t γ Act a 1 δ 1 1 δ n 1 1 a 1 a k δ 1 k a k δ n k k s(a 1, 1) s(a 1, n 1 ) s(a k, 1) s(a k, n k ) λ j i λ j i r[a i, j, 1] r[a i, j, d] δ d i a i t(a i, j) δ 1 i t(a i, j) succ(s, a 1 ) succ(s, a k ) Act {δ 1 i } Act {δ d i } Act Act Verification of Infinite-State Systems 28 c 2004 Richard Mayr

29 Bisim. Sim.: Method 2 Given two labeled transition graphs S and T. Construct new transition graphs S := A comp(s, T ) and T := D comp(s, T ) with the property: S T S T Roughly speaking A comp(s, T ) := S T D comp(s, T ) := modified-sync.(s, T ) One round in the bisimulation game between S and T is emulated by two rounds in the simulation game between S and T. Intuition: Both S and T contain copies of both S and T. They always know which moves are possible in S and T. The construction enforces that these copies are kept consistent. Verification of Infinite-State Systems 29 c 2004 Richard Mayr

30 Bisim. Sim.: Method 2 (cont.) One round in the bisimulation game between S amd T : Attacker moves S a S i Defender replies T a T j This is emulated in two rounds in the simulation game between S and T. Attacker moves S = A comp(s, T ) x i A comp(s i, T ) Defender replies T = D comp(s, T ) x i D comp(s i, ˆT j ) Attacker moves A comp(s i, T ) x j A comp(s i, T j ) Defender replies D comp(s i, ˆT j ) x j D comp(s i, T j ) Conclusion: No test for enabledness of actions required, but parallel comp. and sync. are needed. Works, e.g., for Petri nets and subclasses, but not for PDA. Verification of Infinite-State Systems 30 c 2004 Richard Mayr

31 s t s(a a 1, 1) 1 s(a 1, n a 1) k s(a s(a 1, 1) lacements k, 1) s(a s(a 1, n k, 1) k ) s(a t(a k, 1) 1, 1) s s(a t(a k, n 1, m k ) t 1) t(a t(a 1, a1) k, 1) 1 t(a t(a 1, ma k, 1) k s(a k ) t(a k 1,, 1) t(a s(a k 1,, mn k 1) ) s(a k, 1) s(a k, n k ) t(a 1, 1) t(a δ1 1 1, m 1) δ n 1 t(a 1 k, 1) t(a δk 1 k, m k ) δ n k k s Formally: Method 2 a 1 a k a 1 a k a 1 a k a 1 a k s λ 1 1 s(a 1, 1) λ m 1t s(a 1, n 1) s(a 1, 11) s(a k, 1) s(a k, n k ) t(a 1, 1) t(a 1, m 1) t(a k, 1) t(a k, m k ) s(a λ 1 1, n 1) k λ m k s(a k k, 1) succ(s, a 1) succ(s, a k ) succ(t, a 1) succ(t, a k ) s(a k, n k ) t(a 1, 1) s t t(a 1, m 1) t(a k, 1) t(a k, m k ) ucc(s, a 1) δ1 1 δ n 1 1 δk 1 δ n k k λ 1 1 λ m 1 ucc(s, a 1 k ) λ 1 k λ m k k ucc(t, a 1) s(a 1, 1) s(a 1, n 1) s(a k, 1) s(a k, n k ) t(a 1, 1) t(a 1, m 1) t(a k, 1) t(a k, m k ) ucc(t, a k ) δ 1 1 δ n 1 1 δ 1 k δ n k k λ 1 1 λ m 1 1 λ 1 k λ m k k succ(s, a 1) succ(s, a k ) succ(t, a 1) succ(t, a k ) (s(a i, 1), t(a i, l)) δ 1 i (s(a i, n i), t(a i, l)) δ n i i (s(a i, 1), t(a i, l)) (s(a i, n i), t(a i, l)) t Act Act {δ 1 i } Act {δ n i i } Act λ l i λ l i (s, t) δ j i δ j i Act Act {λ 1 i } Act {λ m i i } (s(a i, j), t(a i, 1)) (s(a i, j), t(a i, m i)) Act λ 1 i λ m i i (s(a i, j), t(a i, 1)) (s(a i, j), t(a i, m i)) Fig. 2. States s and t of S and T, then the A-composition of S and T, and finally the D-composition of S and T. Verification of Infinite-State Systems 31 c 2004 Richard Mayr

32 Applied Verification Development of the practical tool IBOC (Incomplete Boundedness Checker). Analyzes systems described in UML RT and PROMELA. Solves questions for systems with asynchronous communication via buffers. Can one get a buffer overflow? Are the reachable buffer lengths bounded? If yes, then by what constant? Automatic incomplete boundedness check for communication buffers between capsules/processes, without exploring the state space. Gives answers YES or NOT PROVEN hints for abstraction refinement. Works by static analysis, without exploring the reachable state-space. Can derive upper bounds on reachable communication buffer content lengths in most cases. Verification of Infinite-State Systems 32 c 2004 Richard Mayr

33 Applied Verification (cont.) Technique 1: Abstract interpretation and overapproximation. Abstraction preserves Simulation preorder. Upper bounds on reachable channel contents. Technique 2: Static analysis for tracking ranges of crucial variables. Analyzing possible combinations of the effects of cycles in the control-flow graph. Linear programming. Scalable: Works in polynomial time on average-case UML RT/PROMELA models. (Exponential in the worst case). Approach can be generalized to related problems, e.g., memory allocation (memory leaks!), dynamic process creation/destruction, etc. Verification of Infinite-State Systems 33 c 2004 Richard Mayr

34 Case study: UML RT PBX Private Branch Exchange, a telephone switching system. System defined in UML RT 29 capsules 736 control states 57 communication buffers 308 different message types control-state combinations alone, not even counting buffer contents. Run times of the IBOC-tool (on 1 GHz Pentium III): 30 seconds to prove boundedness of the whole system. 1 minute to compute upper bounds on the lengths of all 57 communication buffers. Paper to appear in TACAS Verification of Infinite-State Systems 34 c 2004 Richard Mayr

35 Case Study: PROMELA CORBA General Inter-ORB Protocol (GIOP). System model defined in PROMELA. 5 processes 135 control states 11 communication channels 108 different message types IBOC proved that there are only two causes of unboundedness: Flooding by user requests. Unboundedly many register messages for object migrations. If these two causes are removed then IBOC proves boundedness and computes upper bounds in about 10 seconds (on 1 GHz Pentium III). Paper to appear in SPIN Verification of Infinite-State Systems 35 c 2004 Richard Mayr

36 Conclusion Automated verification of infinite-state systems is harder than for finite-state ones, but feasible. It requires careful analysis of the problem complexities in all input parameters, and the combination of many techniques, e.g., Abstraction Semantic equivalences State-space reduction techniques Symbolic representation of infinite sets and relations Over- and under-approximation Acceleration Verification of Infinite-State Systems 36 c 2004 Richard Mayr

Some techniques and results in deciding bisimilarity

Some techniques and results in deciding bisimilarity Some techniques and results in deciding bisimilarity Petr Jančar Dept of Computer Science Technical University Ostrava (FEI VŠB-TU) Czech Republic www.cs.vsb.cz/jancar Talk at the Verification Seminar,

More information

Simulation Preorder on Simple Process Algebras

Simulation Preorder on Simple Process Algebras Simulation Preorder on Simple Process Algebras Antonín Kučera and Richard Mayr Faculty of Informatics MU, Botanická 68a, 6000 Brno, Czech Repubic, tony@fi.muni.cz Institut für Informatik TUM, Arcisstr.,

More information

The State Explosion Problem

The State Explosion Problem The State Explosion Problem Martin Kot August 16, 2003 1 Introduction One from main approaches to checking correctness of a concurrent system are state space methods. They are suitable for automatic analysis

More information

Introduction to Temporal Logic. The purpose of temporal logics is to specify properties of dynamic systems. These can be either

Introduction to Temporal Logic. The purpose of temporal logics is to specify properties of dynamic systems. These can be either Introduction to Temporal Logic The purpose of temporal logics is to specify properties of dynamic systems. These can be either Desired properites. Often liveness properties like In every infinite run action

More information

Recent results on Timed Systems

Recent results on Timed Systems Recent results on Timed Systems Time Petri Nets and Timed Automata Béatrice Bérard LAMSADE Université Paris-Dauphine & CNRS berard@lamsade.dauphine.fr Based on joint work with F. Cassez, S. Haddad, D.

More information

Finite-State Model Checking

Finite-State Model Checking EECS 219C: Computer-Aided Verification Intro. to Model Checking: Models and Properties Sanjit A. Seshia EECS, UC Berkeley Finite-State Model Checking G(p X q) Temporal logic q p FSM Model Checker Yes,

More information

Models for Efficient Timed Verification

Models for Efficient Timed Verification Models for Efficient Timed Verification François Laroussinie LSV / ENS de Cachan CNRS UMR 8643 Monterey Workshop - Composition of embedded systems Model checking System Properties Formalizing step? ϕ Model

More information

Undecidability of Weak Bisimulation Equivalence in Unary One-Counter Petri Nets

Undecidability of Weak Bisimulation Equivalence in Unary One-Counter Petri Nets T E H U N I V E R S I T Y O H F R G E D I N B U Undecidability of Weak Bisimulation Equivalence in Unary One-Counter Petri Nets Jana Hofmann Master of Science Computer Science School of Informatics University

More information

Model Checking: An Introduction

Model Checking: An Introduction Model Checking: An Introduction Meeting 3, CSCI 5535, Spring 2013 Announcements Homework 0 ( Preliminaries ) out, due Friday Saturday This Week Dive into research motivating CSCI 5535 Next Week Begin foundations

More information

Abstractions and Decision Procedures for Effective Software Model Checking

Abstractions and Decision Procedures for Effective Software Model Checking Abstractions and Decision Procedures for Effective Software Model Checking Prof. Natasha Sharygina The University of Lugano, Carnegie Mellon University Microsoft Summer School, Moscow, July 2011 Lecture

More information

Sanjit A. Seshia EECS, UC Berkeley

Sanjit A. Seshia EECS, UC Berkeley EECS 219C: Computer-Aided Verification Explicit-State Model Checking: Additional Material Sanjit A. Seshia EECS, UC Berkeley Acknowledgments: G. Holzmann Checking if M satisfies : Steps 1. Compute Buchi

More information

Introduction. Pedro Cabalar. Department of Computer Science University of Corunna, SPAIN 2013/2014

Introduction. Pedro Cabalar. Department of Computer Science University of Corunna, SPAIN 2013/2014 Introduction Pedro Cabalar Department of Computer Science University of Corunna, SPAIN cabalar@udc.es 2013/2014 P. Cabalar ( Department Introduction of Computer Science University of Corunna, SPAIN2013/2014

More information

Introduction to Model Checking. Debdeep Mukhopadhyay IIT Madras

Introduction to Model Checking. Debdeep Mukhopadhyay IIT Madras Introduction to Model Checking Debdeep Mukhopadhyay IIT Madras How good can you fight bugs? Comprising of three parts Formal Verification techniques consist of three parts: 1. A framework for modeling

More information

Bounded Model Checking with SAT/SMT. Edmund M. Clarke School of Computer Science Carnegie Mellon University 1/39

Bounded Model Checking with SAT/SMT. Edmund M. Clarke School of Computer Science Carnegie Mellon University 1/39 Bounded Model Checking with SAT/SMT Edmund M. Clarke School of Computer Science Carnegie Mellon University 1/39 Recap: Symbolic Model Checking with BDDs Method used by most industrial strength model checkers:

More information

A Brief Introduction to Model Checking

A Brief Introduction to Model Checking A Brief Introduction to Model Checking Jan. 18, LIX Page 1 Model Checking A technique for verifying finite state concurrent systems; a benefit on this restriction: largely automatic; a problem to fight:

More information

Lecture 2: Symbolic Model Checking With SAT

Lecture 2: Symbolic Model Checking With SAT Lecture 2: Symbolic Model Checking With SAT Edmund M. Clarke, Jr. School of Computer Science Carnegie Mellon University Pittsburgh, PA 15213 (Joint work over several years with: A. Biere, A. Cimatti, Y.

More information

3-Valued Abstraction-Refinement

3-Valued Abstraction-Refinement 3-Valued Abstraction-Refinement Sharon Shoham Academic College of Tel-Aviv Yaffo 1 Model Checking An efficient procedure that receives: A finite-state model describing a system A temporal logic formula

More information

Undecidability Results for Bisimilarity on Prefix Rewrite Systems

Undecidability Results for Bisimilarity on Prefix Rewrite Systems Undecidability Results for Bisimilarity on Prefix Rewrite Systems Petr Jančar 1 and Jiří Srba 2 1 Center of Applied Cybernetics, Department of Computer Science Technical University of Ostrava, Czech Republic

More information

Automatic Synthesis of Distributed Protocols

Automatic Synthesis of Distributed Protocols Automatic Synthesis of Distributed Protocols Rajeev Alur Stavros Tripakis 1 Introduction Protocols for coordination among concurrent processes are an essential component of modern multiprocessor and distributed

More information

New Complexity Results for Some Linear Counting Problems Using Minimal Solutions to Linear Diophantine Equations

New Complexity Results for Some Linear Counting Problems Using Minimal Solutions to Linear Diophantine Equations New Complexity Results for Some Linear Counting Problems Using Minimal Solutions to Linear Diophantine Equations (Extended Abstract) Gaoyan Xie, Cheng Li and Zhe Dang School of Electrical Engineering and

More information

Chapter 4: Computation tree logic

Chapter 4: Computation tree logic INFOF412 Formal verification of computer systems Chapter 4: Computation tree logic Mickael Randour Formal Methods and Verification group Computer Science Department, ULB March 2017 1 CTL: a specification

More information

Integer Linear Programming Based Property Checking for Asynchronous Reactive Systems

Integer Linear Programming Based Property Checking for Asynchronous Reactive Systems IEEE TRANSACTIONS ON SOFTWARE ENGINEERING 1 Integer Linear Programming Based Property Checking for Asynchronous Reactive Systems Stefan Leue Department of Computer and Information Science University of

More information

Double Header. Model Checking. Model Checking. Overarching Plan. Take-Home Message. Spoiler Space. Topic: (Generic) Model Checking

Double Header. Model Checking. Model Checking. Overarching Plan. Take-Home Message. Spoiler Space. Topic: (Generic) Model Checking Double Header Model Checking #1 Two Lectures Model Checking SoftwareModel Checking SLAM and BLAST Flying Boxes It is traditional to describe this stuff (especially SLAM and BLAST) with high-gloss animation

More information

Timo Latvala. March 7, 2004

Timo Latvala. March 7, 2004 Reactive Systems: Safety, Liveness, and Fairness Timo Latvala March 7, 2004 Reactive Systems: Safety, Liveness, and Fairness 14-1 Safety Safety properties are a very useful subclass of specifications.

More information

Petri Nets (for Planners)

Petri Nets (for Planners) Petri (for Planners) B. Bonet, P. Haslum... from various places... ICAPS 2011 & Motivation Petri (PNs) is formalism for modelling discrete event systems Developed by (and named after) C.A. Petri in 1960s

More information

Theoretical Foundations of the UML

Theoretical Foundations of the UML Theoretical Foundations of the UML Lecture 17+18: A Logic for MSCs Joost-Pieter Katoen Lehrstuhl für Informatik 2 Software Modeling and Verification Group moves.rwth-aachen.de/teaching/ws-1718/fuml/ 5.

More information

Temporal Logic Model Checking

Temporal Logic Model Checking 18 Feb, 2009 Thomas Wahl, Oxford University Temporal Logic Model Checking 1 Temporal Logic Model Checking Thomas Wahl Computing Laboratory, Oxford University 18 Feb, 2009 Thomas Wahl, Oxford University

More information

Techniques to solve computationally hard problems in automata theory

Techniques to solve computationally hard problems in automata theory Techniques to solve computationally hard problems in automata theory Richard Mayr University of Edinburgh, UK IST Vienna, 4. Nov. 2014 Resources: www.languageinclusion.org Mayr (Edinburgh) Hard Problems

More information

Reasoning about Strategies: From module checking to strategy logic

Reasoning about Strategies: From module checking to strategy logic Reasoning about Strategies: From module checking to strategy logic based on joint works with Fabio Mogavero, Giuseppe Perelli, Luigi Sauro, and Moshe Y. Vardi Luxembourg September 23, 2013 Reasoning about

More information

arxiv: v2 [cs.fl] 3 Dec 2012

arxiv: v2 [cs.fl] 3 Dec 2012 BPA Bisimilarity is EXPTIME-hard Stefan Kiefer 1 University of Oxford, UK arxiv:1205.7041v2 [cs.fl] 3 Dec 2012 Abstract Given a basic process algebra (BPA) and two stack symbols, the BPA bisimilarity problem

More information

Timed Automata. Semantics, Algorithms and Tools. Zhou Huaiyang

Timed Automata. Semantics, Algorithms and Tools. Zhou Huaiyang Timed Automata Semantics, Algorithms and Tools Zhou Huaiyang Agenda } Introduction } Timed Automata } Formal Syntax } Operational Semantics } Verification Problems } Symbolic Semantics & Verification }

More information

Approximation Metrics for Discrete and Continuous Systems

Approximation Metrics for Discrete and Continuous Systems University of Pennsylvania ScholarlyCommons Departmental Papers (CIS) Department of Computer & Information Science May 2007 Approximation Metrics for Discrete Continuous Systems Antoine Girard University

More information

Temporal Logic. Stavros Tripakis University of California, Berkeley. We have designed a system. We want to check that it is correct.

Temporal Logic. Stavros Tripakis University of California, Berkeley. We have designed a system. We want to check that it is correct. EE 244: Fundamental Algorithms for System Modeling, Analysis, and Optimization Fall 2016 Temporal logic Stavros Tripakis University of California, Berkeley Stavros Tripakis (UC Berkeley) EE 244, Fall 2016

More information

SIMULATION PROBLEMS OVER ONE-COUNTER NETS

SIMULATION PROBLEMS OVER ONE-COUNTER NETS Logical Methods in Computer Science Vol. 12(1:6)2016, pp. 1 46 www.lmcs-online.org Submitted Jun. 17, 2015 Published Mar. 14, 2016 SIMULATION PROBLEMS OVER ONE-COUNTER NETS a PIOTR HOFMAN a, S LAWOMIR

More information

Alan Bundy. Automated Reasoning LTL Model Checking

Alan Bundy. Automated Reasoning LTL Model Checking Automated Reasoning LTL Model Checking Alan Bundy Lecture 9, page 1 Introduction So far we have looked at theorem proving Powerful, especially where good sets of rewrite rules or decision procedures have

More information

Characterizing Fault-Tolerant Systems by Means of Simulation Relations

Characterizing Fault-Tolerant Systems by Means of Simulation Relations Characterizing Fault-Tolerant Systems by Means of Simulation Relations TECHNICAL REPORT Ramiro Demasi 1, Pablo F. Castro 2,3, Thomas S.E. Maibaum 1, and Nazareno Aguirre 2,3 1 Department of Computing and

More information

TUM{INFO{10-I /1.{FI Alle Rechte vorbehalten Nachdruck auch auszugsweise verboten c1998 SFB 342 Methoden und Werkzeuge fur die Nutzung parallele

TUM{INFO{10-I /1.{FI Alle Rechte vorbehalten Nachdruck auch auszugsweise verboten c1998 SFB 342 Methoden und Werkzeuge fur die Nutzung parallele TECHNISCHE UNIVERSIT AT M U N C H E N INSTITUT F UR INFORMATIK Sonderforschungsbereich 342: Methoden und Werkzeuge fur die Nutzung paralleler Rechnerarchitekturen Lossy Counter Machines Richard Mayr TUM-I9827

More information

Flat counter automata almost everywhere!

Flat counter automata almost everywhere! Flat counter automata almost everywhere! Jérôme Leroux and Grégoire Sutre Projet Vertecs, IRISA / INRIA Rennes, FRANCE Équipe MVTsi, CNRS / LABRI, FRANCE Counter-automata verification A simple counter-automata:

More information

Computation Tree Logic (CTL) & Basic Model Checking Algorithms

Computation Tree Logic (CTL) & Basic Model Checking Algorithms Computation Tree Logic (CTL) & Basic Model Checking Algorithms Martin Fränzle Carl von Ossietzky Universität Dpt. of Computing Science Res. Grp. Hybride Systeme Oldenburg, Germany 02917: CTL & Model Checking

More information

Overview. Discrete Event Systems Verification of Finite Automata. What can finite automata be used for? What can finite automata be used for?

Overview. Discrete Event Systems Verification of Finite Automata. What can finite automata be used for? What can finite automata be used for? Computer Engineering and Networks Overview Discrete Event Systems Verification of Finite Automata Lothar Thiele Introduction Binary Decision Diagrams Representation of Boolean Functions Comparing two circuits

More information

Languages, regular languages, finite automata

Languages, regular languages, finite automata Notes on Computer Theory Last updated: January, 2018 Languages, regular languages, finite automata Content largely taken from Richards [1] and Sipser [2] 1 Languages An alphabet is a finite set of characters,

More information

MODEL CHECKING. Arie Gurfinkel

MODEL CHECKING. Arie Gurfinkel 1 MODEL CHECKING Arie Gurfinkel 2 Overview Kripke structures as models of computation CTL, LTL and property patterns CTL model-checking and counterexample generation State of the Art Model-Checkers 3 SW/HW

More information

Automata-Theoretic Model Checking of Reactive Systems

Automata-Theoretic Model Checking of Reactive Systems Automata-Theoretic Model Checking of Reactive Systems Radu Iosif Verimag/CNRS (Grenoble, France) Thanks to Tom Henzinger (IST, Austria), Barbara Jobstmann (CNRS, Grenoble) and Doron Peled (Bar-Ilan University,

More information

Verification. Arijit Mondal. Dept. of Computer Science & Engineering Indian Institute of Technology Patna

Verification. Arijit Mondal. Dept. of Computer Science & Engineering Indian Institute of Technology Patna IIT Patna 1 Verification Arijit Mondal Dept. of Computer Science & Engineering Indian Institute of Technology Patna arijit@iitp.ac.in Introduction The goal of verification To ensure 100% correct in functionality

More information

Robot Games of Degree Two

Robot Games of Degree Two Robot Games of Degree Two V. Halava 1,2 R. Niskanen 2 I. Potapov 2 1 Department of Mathematics and Statistics University of Turku, Finland 2 Department of Computer Science University of Liverpool, UK 9th

More information

Model Checking. Boris Feigin March 9, University College London

Model Checking. Boris Feigin March 9, University College London b.feigin@cs.ucl.ac.uk University College London March 9, 2005 Outline 1 2 Techniques Symbolic 3 Software 4 Vs. Deductive Verification Summary Further Reading In a nutshell... Model checking is a collection

More information

DP lower bounds for equivalence-checking and model-checking of one-counter automata

DP lower bounds for equivalence-checking and model-checking of one-counter automata Information and Computation 188 (2004) 1 19 www.elsevier.com/locate/ic DP lower bounds for equivalence-checking and model-checking of one-counter automata Petr Jančar, a,1 Antonín Kučera, b,1 Faron Moller,

More information

DES. 4. Petri Nets. Introduction. Different Classes of Petri Net. Petri net properties. Analysis of Petri net models

DES. 4. Petri Nets. Introduction. Different Classes of Petri Net. Petri net properties. Analysis of Petri net models 4. Petri Nets Introduction Different Classes of Petri Net Petri net properties Analysis of Petri net models 1 Petri Nets C.A Petri, TU Darmstadt, 1962 A mathematical and graphical modeling method. Describe

More information

Reachability Analysis of Pushdown Automata with an Upper Stack

Reachability Analysis of Pushdown Automata with an Upper Stack Reachability Analysis of Pushdown Automata with an Upper Stack Adrien Pommellet 1 Marcio Diaz 1 Tayssir Touili 2 1 Université Paris-Diderot and LIPN, France 2 LIPN, CNRS, and Université Paris 13, France

More information

POLYNOMIAL SPACE QSAT. Games. Polynomial space cont d

POLYNOMIAL SPACE QSAT. Games. Polynomial space cont d T-79.5103 / Autumn 2008 Polynomial Space 1 T-79.5103 / Autumn 2008 Polynomial Space 3 POLYNOMIAL SPACE Polynomial space cont d Polynomial space-bounded computation has a variety of alternative characterizations

More information

Parameterized model-checking problems

Parameterized model-checking problems Parameterized model-checking problems Stéphane Demri Laboratoire Spécification et Vérification (LSV) CNRS UMR 8643 & ENS de Cachan Parameterized model-checking problems p. 1 Plan of the talk 1. State explosion

More information

On the coinductive nature of centralizers

On the coinductive nature of centralizers On the coinductive nature of centralizers Charles Grellois INRIA & University of Bologna Séminaire du LIFO Jan 16, 2017 Charles Grellois (INRIA & Bologna) On the coinductive nature of centralizers Jan

More information

From Liveness to Promptness

From Liveness to Promptness From Liveness to Promptness Orna Kupferman Hebrew University Nir Piterman EPFL Moshe Y. Vardi Rice University Abstract Liveness temporal properties state that something good eventually happens, e.g., every

More information

A brief history of model checking. Ken McMillan Cadence Berkeley Labs

A brief history of model checking. Ken McMillan Cadence Berkeley Labs A brief history of model checking Ken McMillan Cadence Berkeley Labs mcmillan@cadence.com Outline Part I -- Introduction to model checking Automatic formal verification of finite-state systems Applications

More information

Software Verification using Predicate Abstraction and Iterative Refinement: Part 1

Software Verification using Predicate Abstraction and Iterative Refinement: Part 1 using Predicate Abstraction and Iterative Refinement: Part 1 15-414 Bug Catching: Automated Program Verification and Testing Sagar Chaki November 28, 2011 Outline Overview of Model Checking Creating Models

More information

Learning to Verify Branching Time Properties

Learning to Verify Branching Time Properties Learning to Verify Branching Time Properties Abhay Vardhan and Mahesh Viswanathan Dept. of Computer Science, Univ. of Illinois at Urbana-Champaign, USA Abstract. We present a new model checking algorithm

More information

A Logical Viewpoint on Process-Algebraic Quotients

A Logical Viewpoint on Process-Algebraic Quotients ! A Logical Viewpoint on Process-Algebraic Quotients Antonín Kučera and avier sparza Faculty of nformatics, Masaryk University, Botanická 68a, 62 Brno, Czech Republic, nstitut für nformatik, Technische

More information

A Survey of Partial-Observation Stochastic Parity Games

A Survey of Partial-Observation Stochastic Parity Games Noname manuscript No. (will be inserted by the editor) A Survey of Partial-Observation Stochastic Parity Games Krishnendu Chatterjee Laurent Doyen Thomas A. Henzinger the date of receipt and acceptance

More information

Symbolic Trajectory Evaluation (STE): Orna Grumberg Technion, Israel

Symbolic Trajectory Evaluation (STE): Orna Grumberg Technion, Israel Symbolic Trajectory Evaluation (STE): Automatic Refinement and Vacuity Detection Orna Grumberg Technion, Israel Marktoberdort 2007 1 Agenda Model checking Symbolic Trajectory Evaluation Basic Concepts

More information

Synthesis of Winning Strategies for Interaction under Partial Information

Synthesis of Winning Strategies for Interaction under Partial Information Synthesis of Winning Strategies for Interaction under Partial Information Oberseminar Informatik Bernd Puchala RWTH Aachen University June 10th, 2013 1 Introduction Interaction Strategy Synthesis 2 Main

More information

Computation Tree Logic

Computation Tree Logic Chapter 6 Computation Tree Logic Pnueli [88] has introduced linear temporal logic to the computer science community for the specification and verification of reactive systems. In Chapter 3 we have treated

More information

Lecture 7 Synthesis of Reactive Control Protocols

Lecture 7 Synthesis of Reactive Control Protocols Lecture 7 Synthesis of Reactive Control Protocols Richard M. Murray Nok Wongpiromsarn Ufuk Topcu California Institute of Technology AFRL, 25 April 2012 Outline Review: networked control systems and cooperative

More information

Chapter 5: Linear Temporal Logic

Chapter 5: Linear Temporal Logic Chapter 5: Linear Temporal Logic Prof. Ali Movaghar Verification of Reactive Systems Spring 94 Outline We introduce linear temporal logic (LTL), a logical formalism that is suited for specifying LT properties.

More information

Communication in Petri nets

Communication in Petri nets Communication in Petri nets Kamal Lodaya work in progress with Ramchandra Phawade The Institute of Mathematical Sciences, Chennai February 2010 Petri nets - introduction Mathematical model. Widely used

More information

Computer Aided Verification

Computer Aided Verification Computer Aided Verification For Designing correct systems Hao Zheng zheng@cse.usf.edu Dept. of Computer Science & Eng. University South Florida Outlines Basic concepts of verification Challenges to verification

More information

Weak Bisimilarity with Infinite-State Systems can be Decided in Polynomial Time

Weak Bisimilarity with Infinite-State Systems can be Decided in Polynomial Time Weak Bisimilarity with Infinite-State Systems can be Decided in Polynomial Time Antonín Kučera 1 and Richard Mayr 2 1 Faculty of Informatics, Masaryk University, Botanická 68a, 60200 Brno, Czech Republic,

More information

Models of Concurrency

Models of Concurrency Models of Concurrency GERARDO SCHNEIDER UPPSALA UNIVERSITY DEPARTMENT OF INFORMATION TECHNOLOGY UPPSALA, SWEDEN Thanks to Frank Valencia Models of Concurrency p.1/57 Concurrency is Everywhere Concurrent

More information

CTL Model checking. 1. finite number of processes, each having a finite number of finite-valued variables. Model-Checking

CTL Model checking. 1. finite number of processes, each having a finite number of finite-valued variables. Model-Checking CTL Model checking Assumptions:. finite number of processes, each having a finite number of finite-valued variables.. finite length of CTL formula Problem:Determine whether formula f 0 is true in a finite

More information

Overview. overview / 357

Overview. overview / 357 Overview overview6.1 Introduction Modelling parallel systems Linear Time Properties Regular Properties Linear Temporal Logic (LTL) Computation Tree Logic syntax and semantics of CTL expressiveness of CTL

More information

A Game-Theoretic Approach to Simulation of Data-Parameterized Systems

A Game-Theoretic Approach to Simulation of Data-Parameterized Systems A Game-Theoretic Approach to Simulation of Data-Parameterized Systems Orna Grumberg 1, Orna Kupferman 2, and Sarai Sheinvald 2 1 Department of Computer Science, The Technion, Haifa 32000, Israel 2 School

More information

Scalable and Accurate Verification of Data Flow Systems. Cesare Tinelli The University of Iowa

Scalable and Accurate Verification of Data Flow Systems. Cesare Tinelli The University of Iowa Scalable and Accurate Verification of Data Flow Systems Cesare Tinelli The University of Iowa Overview AFOSR Supported Research Collaborations NYU (project partner) Chalmers University (research collaborator)

More information

Symbolic Data Structure for sets of k-uples of integers

Symbolic Data Structure for sets of k-uples of integers Symbolic Data Structure for sets of k-uples of integers Pierre Ganty 1, Cédric Meuter 1, Laurent Van Begin 1, Gabriel Kalyon 1, Jean-François Raskin 1, and Giorgio Delzanno 2 1 Département d Informatique,

More information

Formal Verification of Mobile Network Protocols

Formal Verification of Mobile Network Protocols Dipartimento di Informatica, Università di Pisa, Italy milazzo@di.unipi.it Pisa April 26, 2005 Introduction Modelling Systems Specifications Examples Algorithms Introduction Design validation ensuring

More information

Concurrency Makes Simple Theories Hard

Concurrency Makes Simple Theories Hard Concurrency Makes Simple Theories Hard Stefan Göller 1 and Anthony Widjaja Lin 2 1 Fachbereich Informatik, University of Bremen, Germany 2 Department of Computer Science, Oxford University, United Kingdom

More information

Helsinki University of Technology Laboratory for Theoretical Computer Science Research Reports 66

Helsinki University of Technology Laboratory for Theoretical Computer Science Research Reports 66 Helsinki University of Technology Laboratory for Theoretical Computer Science Research Reports 66 Teknillisen korkeakoulun tietojenkäsittelyteorian laboratorion tutkimusraportti 66 Espoo 2000 HUT-TCS-A66

More information

Software Verification

Software Verification Software Verification Grégoire Sutre LaBRI, University of Bordeaux, CNRS, France Summer School on Verification Technology, Systems & Applications September 2008 Grégoire Sutre Software Verification VTSA

More information

The algorithmic analysis of hybrid system

The algorithmic analysis of hybrid system The algorithmic analysis of hybrid system Authors: R.Alur, C. Courcoubetis etc. Course teacher: Prof. Ugo Buy Xin Li, Huiyong Xiao Nov. 13, 2002 Summary What s a hybrid system? Definition of Hybrid Automaton

More information

Simulation and Bisimulation over Multiple Time Scales in a Behavioral Setting

Simulation and Bisimulation over Multiple Time Scales in a Behavioral Setting 2014 22nd Mediterranean Conference on Control and Automation (MED) University of Palermo. June 16-19, 2014. Palermo, Italy Simulation and Bisimulation over Multiple ime Scales in a Behavioral Setting Anne-Kathrin

More information

Some Remarks on Alternating Temporal Epistemic Logic

Some Remarks on Alternating Temporal Epistemic Logic Some Remarks on Alternating Temporal Epistemic Logic Corrected version: July 2003 Wojciech Jamroga Parlevink Group, University of Twente, Netherlands Institute of Mathematics, University of Gdansk, Poland

More information

A Unifying Approach to Decide Relations for Timed Automata and their Game Characterization

A Unifying Approach to Decide Relations for Timed Automata and their Game Characterization A Unifying Approach to Decide Relations for Timed Automata and their Game Characterization Shibashis Guha Indian Institute of Technology Delhi Chinmay Narayan Indian Institute of Technology Delhi Shanara

More information

ESE601: Hybrid Systems. Introduction to verification

ESE601: Hybrid Systems. Introduction to verification ESE601: Hybrid Systems Introduction to verification Spring 2006 Suggested reading material Papers (R14) - (R16) on the website. The book Model checking by Clarke, Grumberg and Peled. What is verification?

More information

Lecture 11: Timed Automata

Lecture 11: Timed Automata Real-Time Systems Lecture 11: Timed Automata 2014-07-01 11 2014-07-01 main Dr. Bernd Westphal Albert-Ludwigs-Universität Freiburg, Germany Contents & Goals Last Lecture: DC (un)decidability This Lecture:

More information

Model Theory of Modal Logic Lecture 4. Valentin Goranko Technical University of Denmark

Model Theory of Modal Logic Lecture 4. Valentin Goranko Technical University of Denmark Model Theory of Modal Logic Lecture 4 Valentin Goranko Technical University of Denmark Third Indian School on Logic and its Applications Hyderabad, January 28, 2010 Model Theory of Modal Logic Lecture

More information

FORMAL METHODS LECTURE III: LINEAR TEMPORAL LOGIC

FORMAL METHODS LECTURE III: LINEAR TEMPORAL LOGIC Alessandro Artale (FM First Semester 2007/2008) p. 1/39 FORMAL METHODS LECTURE III: LINEAR TEMPORAL LOGIC Alessandro Artale Faculty of Computer Science Free University of Bolzano artale@inf.unibz.it http://www.inf.unibz.it/

More information

Computer-Aided Program Design

Computer-Aided Program Design Computer-Aided Program Design Spring 2015, Rice University Unit 3 Swarat Chaudhuri February 5, 2015 Temporal logic Propositional logic is a good language for describing properties of program states. However,

More information

Liveness in L/U-Parametric Timed Automata

Liveness in L/U-Parametric Timed Automata Liveness in L/U-Parametric Timed Automata Étienne André and Didier Lime [AL17] Université Paris 13, LIPN and École Centrale de Nantes, LS2N Highlights, 14 September 2017, London, England Étienne André

More information

Communication and Concurrency: CCS. R. Milner, A Calculus of Communicating Systems, 1980

Communication and Concurrency: CCS. R. Milner, A Calculus of Communicating Systems, 1980 Communication and Concurrency: CCS R. Milner, A Calculus of Communicating Systems, 1980 Why calculi? Prove properties on programs and languages Principle: tiny syntax, small semantics, to be handled on

More information

Robust Controller Synthesis in Timed Automata

Robust Controller Synthesis in Timed Automata Robust Controller Synthesis in Timed Automata Ocan Sankur LSV, ENS Cachan & CNRS Joint with Patricia Bouyer, Nicolas Markey, Pierre-Alain Reynier. Ocan Sankur (ENS Cachan) Robust Control in Timed Automata

More information

Linear Temporal Logic and Büchi Automata

Linear Temporal Logic and Büchi Automata Linear Temporal Logic and Büchi Automata Yih-Kuen Tsay Department of Information Management National Taiwan University FLOLAC 2009 Yih-Kuen Tsay (SVVRL @ IM.NTU) Linear Temporal Logic and Büchi Automata

More information

Hoare Logic I. Introduction to Deductive Program Verification. Simple Imperative Programming Language. Hoare Logic. Meaning of Hoare Triples

Hoare Logic I. Introduction to Deductive Program Verification. Simple Imperative Programming Language. Hoare Logic. Meaning of Hoare Triples Hoare Logic I Introduction to Deductive Program Verification Işıl Dillig Program Spec Deductive verifier FOL formula Theorem prover valid contingent Example specs: safety (no crashes), absence of arithmetic

More information

Real-Time Systems. Lecture 10: Timed Automata Dr. Bernd Westphal. Albert-Ludwigs-Universität Freiburg, Germany main

Real-Time Systems. Lecture 10: Timed Automata Dr. Bernd Westphal. Albert-Ludwigs-Universität Freiburg, Germany main Real-Time Systems Lecture 10: Timed Automata 2013-06-04 10 2013-06-04 main Dr. Bernd Westphal Albert-Ludwigs-Universität Freiburg, Germany Contents & Goals Last Lecture: PLC, PLC automata This Lecture:

More information

Limiting Behavior of Markov Chains with Eager Attractors

Limiting Behavior of Markov Chains with Eager Attractors Limiting Behavior of Markov Chains with Eager Attractors Parosh Aziz Abdulla Uppsala University, Sweden. parosh@it.uu.se Noomene Ben Henda Uppsala University, Sweden. Noomene.BenHenda@it.uu.se Sven Sandberg

More information

Automata-theoretic Decision of Timed Games

Automata-theoretic Decision of Timed Games Automata-theoretic Decision of Timed Games Marco Faella a, Salvatore La Torre b, Aniello Murano a a Università degli Studi di Napoli Federico II, 80126 Napoli {faella, murano}@na.infn.it b Università degli

More information

Trace Refinement of π-calculus Processes

Trace Refinement of π-calculus Processes Trace Refinement of pi-calculus Processes Trace Refinement of π-calculus Processes Manuel Gieseking manuel.gieseking@informatik.uni-oldenburg.de) Correct System Design, Carl von Ossietzky University of

More information

On Model Checking for Visibly Pushdown Automata

On Model Checking for Visibly Pushdown Automata Japan Institute of Advanced Industrial Science and Technology Research Center for Specification and Verification LATA 2012 On Model Checking for Visibly Pushdown Automata Nguyen Van Tang and Hitoshi Ohsaki

More information

MODEL CHECKING TIMED SAFETY INSTRUMENTED SYSTEMS

MODEL CHECKING TIMED SAFETY INSTRUMENTED SYSTEMS TKK Reports in Information and Computer Science Espoo 2008 TKK-ICS-R3 MODEL CHECKING TIMED SAFETY INSTRUMENTED SYSTEMS Jussi Lahtinen ABTEKNILLINEN KORKEAKOULU TEKNISKA HÖGSKOLAN HELSINKI UNIVERSITY OF

More information

Model checking the basic modalities of CTL with Description Logic

Model checking the basic modalities of CTL with Description Logic Model checking the basic modalities of CTL with Description Logic Shoham Ben-David Richard Trefler Grant Weddell David R. Cheriton School of Computer Science University of Waterloo Abstract. Model checking

More information

The Downward-Closure of Petri Net Languages

The Downward-Closure of Petri Net Languages The Downward-Closure of Petri Net Languages Peter Habermehl 1, Roland Meyer 1, and Harro Wimmel 2 1 LIAFA, Paris Diderot University & CNRS e-mail: {peter.habermehl,roland.meyer}@liafa.jussieu.fr 2 Department

More information

Petri nets. s 1 s 2. s 3 s 4. directed arcs.

Petri nets. s 1 s 2. s 3 s 4. directed arcs. Petri nets Petri nets Petri nets are a basic model of parallel and distributed systems (named after Carl Adam Petri). The basic idea is to describe state changes in a system with transitions. @ @R s 1

More information

Motivation. CS389L: Automated Logical Reasoning. Lecture 10: Overview of First-Order Theories. Signature and Axioms of First-Order Theory

Motivation. CS389L: Automated Logical Reasoning. Lecture 10: Overview of First-Order Theories. Signature and Axioms of First-Order Theory Motivation CS389L: Automated Logical Reasoning Lecture 10: Overview of First-Order Theories Işıl Dillig Last few lectures: Full first-order logic In FOL, functions/predicates are uninterpreted (i.e., structure

More information