The Concurrent Consideration of Uncertainty in WCETs and Processor Speeds in Mixed Criticality Systems

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1 The Concurrent Consideration of Uncertainty in WCETs and Processor Speeds in Mixed Criticality Systems Zhishan Guo and Sanjoy Baruah Department of Computer Science University of North Carolina at Chapel Hill

2 Real-Time Systems Temporal Correctness PHYSICAL SYSTEMS

3 Real-Time Systems Temporal Correctness PHYSICAL SYSTEMS

4 Real-Time Systems MODEL Temporal Correctness PHYSICAL SYSTEMS

5 Real-Time Systems Temporal Correctness MODEL PHYSICAL SYSTEMS Unavoidable PESSIMISM due to UNCERTAINTY of system behaviors

6 Real-Time Systems Temporal Correctness MODEL PHYSICAL SYSTEMS Unavoidable PESSIMISM due to UNCERTAINTY of system behaviors: - WCET estimations - Executing speeds - Periods - Etc.

7 Real-Time Systems Temporal Correctness MODEL PHYSICAL SYSTEMS Unavoidable PESSIMISM due to UNCERTAINTY of system behaviors: - WCET estimations - E.g., x := a + b 3~321 cycles

8 Q: Is there a way to efficiently implement those functionalities while guaranteeing their correctness?

9 Mixed-Criticality MC: functionalities of different criticality are implemented upon a shared platform.

10 Mixed-Criticality & Vestal Model MC: functionalities of different criticality are implemented upon a shared platform. The resources over-provisioned to the critical functionalities (that are highly unlikely to be used during run-time) can now be used to execute the lesscritical functionalities instead. Example: x := a + b 3~321 cycles

11 Mixed-Criticality & Vestal Model MC: functionalities of different criticality are implemented upon a shared platform. The resources over-provisioned to the critical functionalities (that are highly unlikely to be used during run-time) can now be used to execute the lesscritical functionalities instead. Example: x := a + b 3~321 cycles Static Analysis; Pessimistic Measurement Based; t Optimistic

12 Mixed-Criticality & Vestal Model MC: functionalities of different criticality are implemented upon a shared platform. The resources over-provisioned to the critical 272 papers cited functionalities (that are highly unlikely to be used during run-time) can now be used to execute the lesscritical functionalities instead. Example: x := a + b 3~321 cycles 6 th Edition, Static Analysis; Pessimistic Measurement Based; t Optimistic

13 Q: Is the Vestal (Multi-WCET) model representative enough for all kinds of uncertainties?

14 Uncertainty in Execution Speed Uncertainty arises from estimations executing speeds Advanced hardware features Main frequency is forced down when ambient temperature is too high, to prevent permanent damage to the chip. Detect if signals are late at the circuit level; and recover by delaying next clock tick.

Detect if signals are late at the circuit level; and recover by delaying next clock tick.

15 Uncertainty in Execution Speed Uncertainty arises from estimations executing speeds Advanced hardware features Main frequency is forced down when ambient temperature is too high, to prevent permanent damage to the chip. Detect if signals are late at the circuit level; and recover by delaying next clock tick. GALS: Globally Asynchronous Locally Synchronous locally synchronous modules that communicate asynchronously local clocks may be paused, stretched, or data-driven

16 Model - Varying-Speed Processors Processor speed s(t) 0 Time t

17 Model - Varying-Speed Processors Normal mode vs. Degraded mode Processor speed s(t) s n s d 0 t Normal mode Degraded mode Non-functional

18 Model - Varying-Speed Processors Normal mode vs. Degraded mode Processor speed 1 Processor speed < 1, but ρ Processor speed < ρ s n s d 0 May switch mode at any time Normal mode Degraded mode Non-functional t

19 If uncertainty arises solely from the platform s executing speed The Vestal Model Varying-Speed Model MC job NP hard, with tight speedup of Polynomial time solvable (via LP, optimally) [1,2] MC task NP hard, with tight speedup of Polynomial time solvable (Fluid, optimally) [1] [1] S. Baruah and Z. Guo. Mixed-criticality scheduling upon varying-speed processors. In Proceedings of the 34th IEEE Real-Time Systems Symposium, RTSS [2] Z. Guo and S. Baruah. Implementing mixed-criticality systems upon a preemptive varyingspeed processor. Leibniz Transactions on Embedded Systems (LITES), 1(2):3:1 3:19, 2014.

20 Measurement Speedup Bound Given any MC task system τ Any Hypothetical Clairvoyant Algorithm Speed 1 Speed < 1, but ρ Correct

21 Measurement Speedup Bound Given any MC task system τ Algorithm A (with speedup b 1) Any Hypothetical Clairvoyant Algorithm Speed b Speed < b, but ρ b Speed 1 Speed < 1, but ρ Correct Correct

22 If uncertainty arises solely from the platform s executing speed The Vestal Model Varying-Speed Model MC job NP hard, with tight speedup of Polynomial time solvable (via LP, optimally) [1,2] MC task NP hard, with tight speedup of Polynomial time solvable (Fluid, optimally) [1] [1] S. Baruah and Z. Guo. Mixed-criticality scheduling upon varying-speed processors. In Proceedings of the 34th IEEE Real-Time Systems Symposium, RTSS [2] Z. Guo and S. Baruah. Implementing mixed-criticality systems upon a preemptive varyingspeed processor. Leibniz Transactions on Embedded Systems (LITES), 1(2):3:1 3:19, 2014.

23 Real-Time Systems Temporal Correctness MODEL PHYSICAL SYSTEMS Unavoidable PESSIMISM due to UNCERTAINTY of system behaviors: - WCET estimations - Executing speeds - Periods - Etc.

24 If uncertainty arises from both the WCET estimations and platform s speed Given: A set of MC jobs Criticality level (HI/LO) Release time WCET estimations Deadline

25 If uncertainty arises from both the WCET estimations and platform s speed Given: A set of MC jobs Criticality level (HI/LO) Release time WCET estimations Deadline Varying-speed uniprocessor Preemptive (0 cost) Minimum degraded speed s d Minimum normal speed s n =1

26 If uncertainty arises from both the WCET estimations and platform s speed Given: A set of MC jobs Criticality level (HI/LO) Release time WCET estimations Deadline Varying-speed uniprocessor Preemptive (0 cost) Minimum degraded speed s d Minimum normal speed s n =1 Desired run-time behavior: HI-critical jobs must always meet deadlines LO-critical jobs should meet deadlines (when possible)

27 Example Processor: s n =1, s d =0.5 Job Crit. a i C i d i J1 HI 0 [2,3] 8 J2 HI 2 [1,1] 5 J3 LO 0? t Necessary: HI-critical jobs must be feasible on a minimum speed processor (thus EDF acceptable)

28 Processor Speed Example Processor: s n =1, s d =0.5 Job Crit. a i C i d i J1 HI 0 [2,3] 8 C 1LO C 1LO C 1HI J2 HI 2 [1,1] 5 C 2 J3 LO 0? t s d Necessary: HI-critical jobs must be feasible on a minimum speed processor (thus EDF acceptable)

29 Processor Speed Example Processor: s n =1, s d =0.5 Job Crit. a i C i d i J1 HI 0 [2,3] 8 C 1LO C 1LO C 1HI J2 HI 2 [1,1] 5 C 2 J3 LO 0? 3 On a faster processor, we would like to have LO jobs completed on time as well. s n s d t Necessary: HI-critical jobs must be feasible on a minimum speed processor (thus EDF acceptable)

30 Processor Speed Example Processor: s n =1, s d =0.5 Job Crit. a i C i d i J1 HI 0 [2,3] 8 C 1LO C 1LO C 1HI J2 HI 2 [1,1] 5 C 2 J3 LO On a faster processor, we would like to have LO jobs completed on time as well. s n s d t Necessary: HI-critical jobs must be feasible on a minimum speed processor (thus EDF acceptable)

31 Processor Speed Example Processor: s n =1, s d =0.5 Job Crit. a i C i d i J1 HI 0 [2,3] 8 C 1LO C 1LO C 1HI J2 HI 2 [1,1] 5 C 2 C 2 J3 LO On a faster processor, we would like to have LO jobs completed on time as well. s n s d t Necessary: HI-critical jobs must be feasible on a minimum speed processor (thus EDF acceptable)

32 Processor Speed Example Processor: s n =1, s d =0.5 Job Crit. a i C i d i J1 HI 0 [2,3] 8 J2 HI 2 [1,1] 5 J3 LO On a faster processor, we would like to have LO jobs completed on time as well. s n s d Mode Switch C 1 LO C 1LO C 1 C t HI Necessary: HI-critical jobs must be feasible on a minimum speed processor (thus EDF acceptable)

Example: Vestal model only Processor: s n =1, s d =0.5 Job Crit. a i C i d i J1 HI 0 [2,3] 8 J2 HI 2 [1,1] 5 J3 LO 0 1 3 C 1LO Job Crit.

33 Example: Vestal model only Processor: s n =1, s d =0.5 Job Crit. a i C i d i J1 HI 0 [2,3] 8 J2 HI 2 [1,1] 5 J3 LO C 1LO Job Crit. a i C i d i J1 HI 0 [2,6] 8 J2 HI 2 [1,2] t J3 LO Necessary: HI-critical jobs must be feasible on a minimum speed processor (thus EDF acceptable)

34 LE-EDF Latest Execution times, with EDF scheduling Offline : LE-EDF to HI jobs -> HI sub-jobs Online: EDF to all jobs

35 LE-EDF A generalized MC framework (uniprocessor)

36 LE-EDF A generalized MC framework (uniprocessor) With time complexity of O(n 2 )

37 LE-EDF A generalized MC framework (uniprocessor) With time complexity of O(n 2 ) When uncertainties arise solely in WCETs (v.s. Vestal) LE-EDF strictly dominates OCBP [4] (theoretically) LE-EDF may dominate MCEDF [5] (example + experimentally)

38 LE-EDF A generalized MC framework (uniprocessor) With time complexity of O(n 2 ) When uncertainties arise solely in WCETs (v.s. Vestal) LE-EDF strictly dominates OCBP [4] (theoretically) LE-EDF may dominate MCEDF [5] (example + experimentally) When uncertainties arise solely in processor speeds LE-EDF retains the optimality property (vs. LP-based) more efficient implementation (based on EDF)

39 LE-EDF A generalized MC framework (uniprocessor) With time complexity of O(n 2 ) When uncertainties arise solely in WCETs (v.s. Vestal) LE-EDF strictly dominates OCBP [4] (theoretically) LE-EDF may dominate MCEDF [5] (example + experimentally) When uncertainties arise solely in processor speeds LE-EDF retains the optimality property (vs. LP-based) more efficient implementation (based on EDF) Speedup v.s. clairvoyant 4/3

40 Future Work 3+ criticality levels Multiprocessor Tasks, DAG tasks Non-preemptive or Limited-preemptive

41 Thank you! Zhishan Guo RTNS 15, Lille

42 Model We focus on the mode-switch job, Under the multi-wcet model C ilo = 1, C ihi = 2 (solely due to processor uncertainty) s(t) c ilo c ihi t s We know nothing about the job s execution length under HI mode before t s t

43 Model We focus on the mode-switch job, Under the multi-wcet model C ilo = 1, C ihi = 2 (solely due to processor uncertainty) s(t) c ilo Under the varying-speed model C i = 1, s N = 1, s D = 0.5 In the case we detect degradation occurs at t s s(t) c ihi c ilo c ihi t s t s We know nothing about the job s execution length under HI mode before t s t The job will need at most 2δ t time units more (after t s ) to finish execution! t

44 Model We focus on the mode-switch job, Under the multi-wcet model C ilo = 1, C ihi = 2 (solely due to processor uncertainty) s(t) c ilo Under the varying-speed model C i = 1, s N = 1, s D = 0.5 In the case we detect degradation occurs at t s s(t) c ihi c ilo c ihi t s t s We know nothing about the job s execution length under HI mode before t s t The job will need at most 2δ t time units more (after t s ) to finish execution! A slower processor -> longer WCETs Such transformation comes at a cost! t

45 OCBP

46 MC-EDF

47 LE-EDF

48 Processor Speed Example Processor: s n =1, s d =0.5 Job Crit. a i C i d i J1 HI 0 [2,3] 8 J2 HI 2 [1,1] 5 J3 LO Mode Switch C 1LO C 1 C 2 C 1 LO HI On a faster processor, we would like to have LO jobs completed on time as well. s n s d t Necessary: HI-critical jobs must be feasible on a minimum speed processor (thus EDF acceptable)

49 LE-EDF Latest Execution times, with EDF scheduling Offline : LE-EDF to HI jobs -> HI sub-jobs Online: EDF to all jobs

50 Algorithm Latest Execution times, with EDF scheduling Offline : LE-EDF to HI jobs Upon a degraded-speed platform Reserve capacity for HI jobs, interval by interval Chop HI jobs into sub-jobs, some parts with earlier d line

51 Algorithm Latest Execution times, with EDF scheduling Offline : LE-EDF to HI jobs Upon a degraded-speed platform Reserve capacity for HI jobs, interval by interval Chop HI jobs into sub-jobs, some parts with earlier d line Online: EDF HI sub-jobs and LO jobs Giving HI sub-jobs higher priority only when tie-breaking jobs with same deadlines. Drop LO job only at their deadlines

52 Algorithm Latest Execution times, with EDF scheduling Offline : LE-EDF to HI jobs -> HI sub-jobs Online: EDF to all jobs

53 Algorithm Latest Execution times, with EDF scheduling Offline : LE-EDF to HI jobs Upon a degraded-speed platform Reserve capacity for HI jobs, interval by interval Chop HI jobs into sub-jobs, some parts with earlier d line Online: EDF HI sub-jobs and LO jobs Giving HI sub-jobs higher priority only when tie-breaking jobs with same deadlines. Drop LO job only at their deadlines Not necessarily a mode-switch for the system, even under detection of degradation!

54 LE-EDF Latest Execution times, with EDF scheduling Offline (i) Consider HI jobs only, executed as late as possible, upon a degraded processer, to determine the intervals for HI execution

55 LE-EDF Latest Execution times, with EDF scheduling Offline (i) Consider HI jobs only, executed as late as possible, upon a degraded processer, to determine the intervals for HI execution

56 LE-EDF Latest Execution times, with EDF scheduling Offline (i) Consider HI jobs only, executed as late as possible, upon a degraded processer, to determine the intervals for HI execution (ii) Construct a EDF schedule for all HI jobs, using only the intervals reserved in (i)

57 LE-EDF Latest Execution times, with EDF scheduling Offline (iii) Chop HI jobs into sub-jobs

58 Model - Varying-Speed Processors Processor speed s(t) 0 Time t

59 Model - Varying-Speed Processors Processor speed s(t) 0 a b Time t Computing capacity within interval [a,b):

60 Model - Varying-Speed Processors Normal mode vs. Degraded mode Process speed s n Process speed < s n, but s d Degraded mode: Computing capabilities are diminished

61 Model - Varying-Speed Processors Normal mode vs. Degraded mode Processor speed s(t) s n s d 0 t Degraded mode: Computing capabilities are diminished

62 Model - Varying-Speed Processors Normal mode vs Degraded mode Processor speed s(t) s n s d 0 t Normal mode Degraded mode

63 Model - Varying-Speed Processors Normal mode vs Degraded mode s n s d 0 t May switch mode at any time Normal mode Degraded mode

Mixed-criticality scheduling upon varying-speed multiprocessors

Mixed-criticality scheduling upon varying-speed multiprocessors Zhishan Guo Sanjoy Baruah The University of North Carolina at Chapel Hill Abstract An increasing trend in embedded computing is the moving