Short Circuit Detection Utilization Analysis under Uniprocessor EDF Scheduling

Transcription

1 Short Circuit Detection Utiization Anaysis under Uniprocessor EDF Scheduing Aaron Wicock Department of Computer Science Wayne State University Detroit, Michigan Abstract Accounting for a possibe short circuits in a direct current circuit can prove to be an arduous process. To avoid unintended operation and circuit damage, short circuit protection may be impemented via hardware or software. This paper views the short circuit detection probem as a hardware-software codesign probem in which an inductor instaed in a DC circuit is designed aongside a microcontroer. Athough short circuit detection is often a mission-critica process, we provide a framework depicting methods by which a short circuit may be detected by a microcontroer. Additionay, we estabish the utiization requirement of the proposed methods and subsequenty the remaining utiization under Uniprocessor EDF scheduing. I. INTRODUCTION Eectronic circuits are often accompanied by a form of short circuit protection (e.g. a fuse, therma breaker, or other device) which hats current fow when the current passing through the circuit is too high. This protection is paced to avoid currents that, when high enough, can cause damage to the circuit through joue heating. Additionay, some fuses, as a resut of a short, must be repaced. This impementation of short circuit detection is rooted excusivey in hardware and may require maintenance. To provide an aternative method for short detection, we view the short detection probem a hardwaresoftware co-design probem for which the impementation of a cyber-physica system provides a sound soution. The proposed soution reies on an inductor instaed in a DC circuit which is designed aongside a microcontroer. The proposed soution detects short circuits through a safe, repeatabe process by which a microcontroer operating under rea-time constraints utiizes the properties of inductance to identify shorts in an eectrica system. Reated works incude the use of Zone Seective Interocking on systems with aternating current as in [4] but not for DC. Simiar in nature is the appication of the Rogowski coi in [6] which is used to measure current but not resitrct its rise using the inductive properties of the coi. In this work, we focus on direct current (DC) circuits where current rises are more rapid than aternating current (AC) and everage the properties of the inductor to sow the current rise and detect the short. We aso rey on the work of [1] and [2] to provide the accompanying rea-time system mode that reates processor utiization to the physica properties of the inductor thus aowing the reader to trade utiization for board space consumed. Reying on the inductive properties of a DC resistor-inductor (RL) circuit and the eariest deadine first (EDF) scheduabiity of rea-time tasks on preemptive uniprocessor systems, we propose that a short in a DC RL circuit may be detected through anaysis of the rate of current rise and the process of detection modeed by a rea-time periodic task. We propose that the reationship between rea-time utiization of the processor and the spatia properties of the inductor may be estabished such that fixed parameters on either the software or hardware ends of the cyber-physica system may be used to provide optima vaues for the opposite side of the reation. Due to the interdiscipinary nature of this paper, a arge eectronics engineering background has been incorporated. This background information is not a contribution of the paper and serves ony as context for the proposed soution. Section II provides an overview of the eectronics background required to interpret the circuits provided and the nomencature used. Section III provides basic information about the inductor and the aws within eectronics that define the spatia properties of an inductor and, subsequenty, its inductance. Section I provides the first contribution of the paper a mode for identifying the properties of the circuits anayzed and the association of the mode with a rea-time system task. Section depicts methods of short detection given the constraints provided in our mode. Section I provides a rea-time systems overview based on previous work not contributed by this paper. The resutant reationship provided at the end of section I is contributory. Section II provides the mode optimization for both fixed board constraints and fixed rea-time utiization as contributions from this paper. We find the contributions of this paper to be surmised as the foowing: 1. Short detection methods for DC RL circuits. 2. An equivocation between inductor spatia parameters and rea-time processor utiization under preemptive uniprocessor EDF scheduing. 3. A process for identifying inductor orientation and minimum spatia properties given a fixed reatime utiization under preemptive uniprocessor EDF scheduing. 4. A process for identifying minimum rea-time utiization under preemptive uniprocessor EDF scheduing given fixed inductor spatia parameters.

2 II. ELECTRONICS BACKGROUND To provide background for understanding the proposed mode, the foowing section incudes an overview of DC circuits, RL circuits, eectronic nomencature, Ohm s aw, and the definition of a short. This information is known, thoroughy researched and not a contribution of this paper. This section servers excusivey as a brief overview. A. DC Circuits Direct current (DC) circuits are circuits in which the direction of current fow does not change [5]. This current fow differs from AC eectric power suppied to residentia or industria faciities where current fow switches back and forth. An exampe DC circuit is provided in Figure 1 depicting a votage source with a singe resistor. D. Short For the purposes of this paper, a short is defined as the fow of current through an aternate, unintended path in a circuit with itte or no impedance. A short is not defined herein as unintended operation, mafunction, or dysfunctiona operation of a circuit though it is possibe for unintended operation to resut from a short. To soidify this definition, we rey on Ohm s aw to identify the current incurred by a short using Figure 2 as an exampe. 0Ω 1Ω B. Nomencature Fig. 1. An Exampe DC Circuit 1Ω For the purpose of understanding the eectronics background and the system mode, the foowing nomencature: C. Ohms Law Term Symbo Unit otage ot Current I Ampere Resistance R Ohm Magnetic Fied B Tesa Magnetic Fux Φ Weber Inductance L Henry Eectromotive Force E ot To assist in mathematica modeing of DC circuits we introduce Ohm s Law, a fundamenta formua in eectronics estabishing the reationship between votage, current, and resistance: = IR (1) where is votage, I is current, and R is resistance or impedence. Ohm s aw estabishes that for a given votage, an increase in resistance brings a decrease in current and vice versa. Equation (1) wi be referenced frequenty throughout the paper. An exampe appication can be computed using Equation (1) to determine the current fow through the DC circuit in Figure 1. It is known that is 5 ots and R is 1 Ohm. This gives: = I 1Ω I = 5A Fig. 2. A DC Circuit with a Short Figure 2 depicts a short wherein the resistance of the centermost pathway is zero whie the outermost pathway is nonzero. Since both resistors are suppied the same votage, the resistors are considered to be in parae. To find the combined resistance of resistors in parae, we rey on the foowing equation: 1 = (2) R T ota R 1 R 2 R n where R i is the vaue of resistor at index i and n is the number of resistors in parae. Appying Equation (2) to Figure 2 we may rearrange the equation to sove for R T ota : 1 R T ota = 1 R R 2 R T ota = R 1 R 2 R 1 + R 2 Fiing in vaues from Figure 2 then gives: R T ota = 0 1 = 0 1 Appying Ohm s aw using the vaue R T ota as the resistance of the DC circuit we find: = IR I = R I = im R 0 R = + This indicates that a short incurred with itte or no impedance aong the shorted path wi produce theoreticay infinite current. E. Dangers of Shorts Shorts in a DC circuit have the potentia to cause unintended operation and thus unpredictabe operation. In the best case, shorts are handed in hardware and aow the system to operate normay whie the worst case is eft to specuation. However, a known issue with shorts is joue heating. Per Jame s Joue s first aw, Joue heating is the process whereby current through a conductor reeases heat proportiona to the square of the

3 current passing through the conductor. This may be modeed mathematicay as: H RI 2 t (3) where H is heat energy reeased measured in joues, R is resistance, I is current, and t is time measured in seconds [3]. Joue heating may raise the temperature of the conductor to unsafe eves or physicay degrade the conductor to the point of disconnection - producing an open in the circuit. This potentia for permanent system damage serves as motivation to detect and mitigate damage from shorts. F. RL Circuit A cornerstone of the mode presented here is the DC RL circuit. The DC RL circuit is a DC circuit composed of resistors and inductors to which votage is suppied. In the mode to be presented, we rey on a first order RL circuit in which ony one resistor and one inductor are used. An exampe RL circuit is provided in Figure 3. A. Inductor Parameters 2H Fig. 3. A DC RL Circuit III. INDUCTOR BASICS 1Ω When assessing the voume of an inductor, its spatia properties may be simpified as seen in Figure 4: N A Fig. 4. Inductor spatia parameters In the figure above, N represents the number of competed turns in the inductor - in the case of the figure there are five (5) competed cois. A represents the area of a coi assuming a cois are of uniform area. represents the ength of the inductor from the beginning of the first coi to the end of the ast coi. These properties correate with the inductance of the inductor in the foowing formua: L = µ 0N 2 A The derivation of Equation (4) wi be provide ater in this section. B. Types For the purpose of carifying the assumptions of this paper, inductors are divided into two distinct types: air core and magnetic core. Air core inductors or air core cois are cassified as inductors that do not contain a magnetic core. This refers to cois wound around a ceramic, pastic, or non-magnetic core. In contrast, magnetic core inductors contain cores composed of iron. Magnetic cores increase inductance and therefore aow our air core based mode to serve as the worst case anaysis of inductance provided for given inductor parameters. C. Magnetic Fied To vaidate the derivation of Equation (4), we provide the background information provided by the study of eectromagnetism, namey magnetic fieds and magnetic fux. A magnetic fied is a vector fied identifying the magnitude and direction of magnetic effect from eectric currents or magnetic materias [5]. Magnetic fieds for an air core inductor may be modeed using the equation: B = µ 0 N I (5) where B is the magnetic fied, µ 0 is the permeabiity of free space measured as tesa meter ampere, N is the number of turns, is the ength of the soenoid in meters, and I is the current through the inductor. In our proposed mode, the inductor used wi have constant ength and number of turns. Since the permeabiity of free space is defined as: 7 tesa meter µ 0 = 4 π 10 ampere this eaves I as the ony variabe in Equation (5) for our mode. D. Magnetic Fux Defined as the measure of magnetism passing through a given area, magnetic fux is the product of a magnetic fied and the area of the surface it penetrates. This is defined by the equation: Φ = BA (6) where B is the magnetic fied, A is the area the magnetic fied penetrates measured in square meters, and Φ is magnetic fux. To combine and simpify these equations, we may substitute Equation (5) into Equation (6) to give: (4) N Φ = µ 0 IA (7)

4 E. Faraday s Law Given Equation (7) we now use Faraday s Law to reate magnetic fux to eectromotive force. Faraday s Law of induction predicts how an eectromagnetic fied produces eectromotive forces (emf) through eectromagnetic induction. Per Faraday s Law, the eectromotive force of an air core soenoid can be modeed as: E = N Φ t where E is eectromotive force, N is the number of turns, Φ is the magnetic fux, and t is time measured in seconds. Recaing that the ony variabe in Equations (5), (6), and (7) is I, we may substitute Φ from Equation (7) into Equation (8) with the change in Φ being I. This gives: F. Lenz s Law E = µ 0N 2 A I t In addition to Faraday s Law, Lenz s Law states that an induced current fows in the direction opposite the current that produced it. This is identified in the Equation (8) and in the foowing equation for inductance by the negative sign preceding the equation body: E = L I t (8) (9) (10) where E is eectromotive force, N is the number of turns, Φ is the magnetic fux, and t is time measured in seconds. By equating Equations (9) and (10), we may sove for L to define a reationship between the inductance of an inductor and its spatia parameters: L I 2 t = E = µn A I t L = µn 2 A. (11) We rey on Equation (11) to act as the function by which board space may be optimized for inductance and as a cornerstone for rea-time anaysis. indicating that current approaches R and thus conforms to Ohm s aw. Thus far, Equation (11) indicates that variations in the physica size of an inductor correate with its inductance. From Equation (13) we know the current at time t is not ony dependent on suppied votage and resistance but aso inductance since an increase in the vaue of L wi decrease the time R. In conjunction, this indicates that variations in the physica parameters of an inductor correate with the time taken to approach R for a given DC RL circuit. H. Mounting Orientations Before anayzing the space consumed by inductors, we observe two possibe orientations in which an inductor may be mounted to a printed circuit board (PCB). One mounting orientation is such that the inductor cois extend perpendicuar to the face of the PCB as depicted in Figure 5. The shaded region indicates the board space consumed. We wi hereafter refer to this orientation as perpendicuar mounting. Fig. 5. Perpendicuar Mounting. Another mounting orientation we define as parae mounting such that the inductor cois extend parae to the face of the PCB as depicted in Figure 6. G. Current as a Function of Time As previousy mentioned, Lenz s Law states that induced current fows in the direction opposite the current that produced it. Because of this property, the current through an inductor cannot change instantaneousy from zero to the fina current vaue defined by Ohm s Law in Equation (1). Instead, current through an inductor approaches R asymptoticay as modeed by the equation: I(t) = R (1 e t R L ) (12) where I is current, is a constant votage to the circuit containing the inductor, R is resistance, L is inductance and t is time measured in seconds. Notice that taking the imit as t approaches infinity of Equation (9) gives: im I(t) im t x R (1 e t R L ) = R (13) I. Board Space Consumed Fig. 6. Parae Mounting. For each mounting orientation, different formuas can be derived for modeing the board area consumed with regard to ength and area of the inductor.

5 1) Perpendicuar Mounting: In perpendicuar mounting, the board area consumed is defined as: A perpendicuar = 4 π A (14) 0Ω 1Ω where A is the area of the inductor coi from Equation (4). The height of the inductor h is equivaent to from Equation (4) thereby producing an inductor voume inductor of: inductor = 4 π A (15) 2) Parae Mounting: In parae mounting, the board area consumed is defined as: A A parae = 2 (16) π where A is the area of the inductor coi from Equation (4). The height of the inductor h is no onger equivaent to from Equation (4) as the ength of the inductor is parae to the board. Instead, h is defined as: A h parae = 2 (17) π The voume for parae mounting is equivaent to that of perpendicuar mounting. I. SYSTEM MODEL Reying on the aforementioned background information, we propose a system mode composed of three primary components: 1. A DC RL Circuit that utiizes the properties of an inductor to sow current rise time via inductance. This system reates board space consumed by the inductor to its inductance. 2. An Operating Current Mode (OCM) to identify the maximum operating current of the system and the critica current at which circuit damage occurs. This mode determines the difference between the maximum current and critica current thereby determining the minimum time required for a short to cause current rise between the two vaues. 3. A rea-time system periodic task utiization anaysis under uniprocessor EDF scheduing to determine the remaining utiization on the processor handing short circuit detection. Using the minimum time from the previous component, the rea-time mode coses the reation of board space to processor utiization. A. The DC RL Circuit As previousy mentioned, a DC RL circuit is one containing both a resistor and inductor. Our mode assumes a first order RL circuit in which ony one resistor and one inductor are present aside from the votage suppy. Figure 7 depicts a first order DC RL circuit used in this mode where a short has aready been paced. 2H B. Operating Current Mode Fig. 7. DC RL Circuit Athough our mode uses a singe form of DC RL circuit, circuits appear in many forms and for the purposes of this paper require a uniform framework by which the operating currents and other attributes of the circuit may be anayzed. Hereafter, circuits are modeed in the foowing manner: C = (Γ I, I crit ) (18) where C is the circuit described using parameters Γ I and I crit. Γ I is defined such that: Γ I = (γ 0, γ 1,..., γ n ) (19) γ n = (I, ) (20) Here Γ I is composed of n operating current sets γ i where i is the index of an operating current set. Each operating current set is a 2-tupe comprised of an operating current I and operating votage. Ony I and are needed as Ohm s Law wi sove for the resistance R of each operating current set. otage and resistance are not assumed as the appication of transistors may ater the impedence of a circuit and thus not require a change in votage to ater current. Simiary, change in votage suppy without atering the circuit woud resut in steady impedence but an atered current. I crit is defined as the critica current of the system as determined by the user. The critica current represents the current vaue at which the system physicay degrades or, in practice, the current vaue the user wishes to avoid reaching. A fina derivabe parameter I (max), is extracted from the OCM as foows: I max = max i Γ I {γ i } (21) Note that shoud I crit be equivaent to I (max), any current fow over I (max) is assumed to be damaging and thus damage may not be prevented through this short detection mode.. SHORT DETECTION METHODS Detecting the short in the DC RL circuit provided by Figure 7 is possibe via two methods presented here: utiizing the maximum operating current or the maximum derivative of current with respect to time ( di ). The former reies on max the OCM to find the maximum operating current whie the atter reies on the properties of an inductor.

6 A. Maximum Operating Current One method of identifying a short in a DC circuit modeed using operating current sets is to remove power from the circuit when a current is detected above I max. When an Anaog-to- Digita Converter (ADC) returns a vaue above I max after taking into consideration the ADC toerance, power to the system shoud be removed such that suppied votage across the system becomes zero. A current above I max is indicative of mafunction and potentiay a short which has forced the current fow to rise above the maximum expected operating current. B. Maximum di/ Another method of detection requires observing the rate of change of current. From (13) it is known that given a constant votage and resistance, current wi approach and converge to di R. During convergence, the sope of approaches zero. Given the known inductance of the inductor, the derivative of (12) wi provide the vaue of di at any given time. Deriving (12) gives: t I(t) = t ( R (1 e t R L )) = t R dd t R e t R L = R t e t R L di(t) = R R L e t R L di(t) = L e t R L (22) With t being the ony variabe in (22), the greatest possibe vaues of di occurs at t = 0 and R = 0 whie excuding infinite inductance (L = + ). This maximum vaue of di is deemed di = (23) max L Given that (22) may ony occur at t = 0 and R = 0, these scenarios occur when votage is first appied and current has not begun to fow and when no impedence is encountered such as in a shorted RL circuit as depicted in Figure 7. Since a non-superconducting materias wi provide some (often negigabe) impedence, di shoud never reach L. It is possibe for an ADC samping to occur at t = 0 at which point di may be di L. However, consecutive ADC sampes reading max = L woud indicate R 0 and therefore a short has taken pace. Note that unike using I max to determine the presence of a short, using di max aows for short detection before I max has been reached. It is possibe for a short to occur at an operating current eve beow I max and for current rise to reach di max before I exceeds I max. 1) Minimum Time to Detection: Athough using di to detect a short is possibe, a vauabe detection occurs before critica current eves are reached. Per the OCM, this requires that enough sampes occur in the time taken for current to rise from I max to I crit. This ength of time is deemed the minimum time to detection where t d = I crit I max L (24) This time frame signifies the worst case as it the time taken for current to rise from the maximum of a operating currents (I max ) to the critica current (I crit ) under the assumption that no resistance (R = 0) is encountered during the short. This worst case time span is ony achievabe in a DC RL circuit where the current fow is shorted via a superconductor with no resistance. I. REAL-TIME SYSTEM MODEL Thus far, the spatia properties of an inductor have been reated to its inductance. Thereafter, inductance is found to determine the maximum possibe current rise at any given time L and subsequenty the shortest time span over which a short woud need to be detected. Using the minimum time to detection t d, we may not produce a rea-time system mode. Before doing so, we present estabished background information on rea-time systems task modeing. A rea-time system is one in which the correctness of a computation has a ogica and tempora component. The utiity of computationa resuts depends on the computationa resut itsef and the time at which it is produced [1]. Here we rey on two components from rea-time systems: the periodic task mode and uniprocessor EDF scheduing. A. Periodic Task Mode In rea-time systems, periodic tasks are defined by an offset a i, execution requirement e i a reative deadine d i, and a period p i. The offset identifies when the first job in the periodic task set is reease. The execution requirement identifies the maximum execution time required by the task. The reative deadine is the time between each arriva and deadine of a job produced by the periodic task. The period is the time between successive job arrivas. We use the periodic task mode to produce a short circuit detection task [1]. The worst case time to detection may be converted into a rea-time periodic task T sc = (a i, e i, d i, p i ) with the foowing parameters a i = 0 (25) e i = user-defined (26) d i = p i (27) p i = t d 2 (28) where a i is the offset, e i is the execution time in seconds, d i is the reative deadine in seconds, and p i is the period in seconds. Assessing the architecture of different processors and ADCs chosen to monitor the DC RL circuit is eft to the reader. Thus, the resutant execution time for samping the ADC and cacuating current in software is not assessed here but identified as e i.

7 B. Preemptive Uniprocessor EDF Scheduing With the periodic task T sc defined, we asses utiization on a preemptive uniprocessor under EDF Scheduing. According to [2], a set of periodic tasks is scheduabe with EDF if and ony if: n e i 1 (29) p i i=1 where i is the index of a task in the set, e i is the execution time and p i is the period. Equation (29) estabishes that the utiization cannot exceed 100% [2]. Since we use a singe task this makes the utiization for T sc : U(T sc ) = 2 e i t d (30) The execution requirement is doubed as it is assumed two ADC sampes are needed to determine L. Given a known utiization for T sc this aows for the computation of remaining utiization: U remain = 1 2 e i (31) t d 2e i U remain = 1 ( I crit I max µn 2 A ) (32) Using (32) a reationship is estabished between the spatia components of the inductor and the utiization of the corresponding short circuit detection task. II. MODEL OPTIMIZATION Having estabished the reationship between the board space consumed by an inductor and the rea-time utiization under EDF scheduabiity, we propose an optima soution for fixed vaues on either end of the reationship. Given a fixed utiization we propose a minimized board space consumption and given a fixed aowabe board space we propose a minimized rea-time utiization. Before optimization anaysis of the mode, we carify and expain two key points: the assumption of constant turn density and the optima inductor orientation. A. Assumption of Constant Turn Density Equation (4) shows contains the term N which is referred to as turn density. It is important to note that purey eongating an inductor by extending in Figure 4 wi not increase inductance but instead decrease it. Turn density must stay constant with an increase in ength for inductance to increase. Thus if an inductor is to be extended an from ength to 2, the number of turns N shoud be doubed to 2 N accordingy to maintain turn density. This doubing woud resut in the inductance of this hypotetica inductor to be: L = µ 0(2 N) 2 A 2 = µ 0 4 N 2 A 2 = 2 µ0n 2 A To assist in optimization, we assume the turn density remains constant such that an increase in gives an identica increase in N. B. Optima Inductor Orientation To find the inductor orientation providing the highest inductance for a given space, we must consider two constraints: 1. The area A from Equation (4) requires a square area with regard to board space. That is, the pane on which A rests is square. 2. The board space aowed must be defined in three dimensions: a ength, wih w, and height h. Assuming the aowabe board space is defined as a 3-tupe (, w, h), the optima orientation for an inductor is as foows: Given three dimensions, a ength, wih, and height, the two dimensions whose minimum squared mutipied by the third dimension produce the argest voume form the pane to which the inductor coi mounting is perpendicuar. For exampe, provided the foowing 3-tupe: (3, 2, 1) three pairs of dimensions may be seected and the square minimums are given: A. (3, 2) (min(3, 2)) 2 = = 4 B. (3, 1) (min(3, 1)) 2 = = 1 C. (2, 1) (min(2, 1)) 2 = = 3 Set A produces the argest voume meaning the pane formed by dimensions and w of unit ength 3 and 2 respectivey is the pane to which the inductor cois shoud be perpendicuar. The other pairs of dimensions produce voumes ess than the paired dimensions (, w). In this exampe, the cois are perpendicuar to the pane formed by the ength and wih thus making the optima inductor orientation parae mounting. C. Assumed OCM and Execution Requirement To fi in the parameters which woud be provided a priori, we rey on an assumed OCM and execution requirement eaving the inductor parameters and utiization requirement undefined for the purpose of anaysis. The assumed OCM is defined as: C = (Γ I, 10A) Γ I = (γ 0 ) γ 0 = (5A, ) We assume an execution time e i of 1 µs to sampe the ADC and cacuate current fow. D. Fixed Board Constraints The first approach to optimization is made wherein the board space is fixed. This reies on the aforementioned optima inductor orientation. Suppose aotted board space is restricted to the 3-tupe (15mm, 10mm, 5mm). For this 3- tupe, the optima inductor orientation is such that the ength (15mm) and wih (10mm) form the pane to which the coi direction is perpendicuar. Using Equation (14) this indicates the 15mm 10mm area comprises A perpendicuar and the 5mm dimension is defined as the inductor ength. Soving Equation (14) for the area of the inductor A gives: A = π 4 A perpendicuar = π 4 150mm2

8 Converting these vaues to meters and appying Equation (32) gives the remaining utiization provided by the maximum sized inductor that can fit within the board constraints: U remain = 1 ( s 10A 5A 0.005m µ 0 (N) 2 π m 2 ) where µ 0 is defined as: 7 tesa meter µ 0 = 4 π 10 ampere This utiization remaining is the maximum remaining utiization assuming a smaer samping period is not chosen. We eave the number of turns N to be decided by the reader. E. Fixed Utiization The second approach to optimization is made by fixing the utiization aowed for the short detection process. Suppose the aotted utiization is Reying on Equation (30) we find the minimum time to detection t d is soved as: e i t d = 2 U(T sc ) = s = s 0.25 From Equation (24) we find: L = t d = I crit I max 10A 5A s = H This resut indicates that, given the presented assumptions, the inductor used in the DC RL circuit must have inductance of at east H. An inductor with inductance greater than H wi provide a arger window for time to detection and aow for a ower utiization U(T sc ). III. CONCLUSION In this paper, an cyber-physica system is modeed in which the inductive properties of a DC RL circuit are everaged to construct a rea-time periodic task which reies on rate of change of current to detect shorts in an eectronic system. A reationship is estabished between utiization on a preemptive uniprocessor under EDF scheduabiity and the board space consumed by the inductor paced in-circuit. ACKNOWLEDGMENT This research has been supported in part by the US Nationa Science Foundation (CNS Grant Nos , , & ) and a Thomas C. Rumbe Graduate Feowship from Wayne State University. The author woud ike to thank Nathan Fisher for his guidance and encouragement from start to finish on this adventure and for his persistent support through the unexpected. REFERENCES [1] S. Baruah and J. Goossens, Scheduing Rea-time Tasks: Agorithms and Compexity, [2] G. Buttazzo, Hard rea-time computing systems. Boston: Kuwer Academic Pubishers, [3] H. Crew, Genera physics. An eementary text-book for coeges. New York, [4] F. Du, W. Chen, Y. Zhuo and M. Anheuser, A New Method of Eary Short Circuit Detection, Journa of Power and Energy Engineering, vo. 02, no. 04, pp , [5] H. Young, R. Freedman, A. Ford and F. Sears, Sears and Zemansky s university physics. [6] Y. Wang, X. Zhai, Z. Song and Y. Geng, A new method to detect the short circuit current in DC suppy system based on the fexibe Rogowski coi, st Internationa Conference on Eectric Power Equipment - Switching Technoogy, 2011.