6.4.5 MOS capacitance-voltage analysis

Transcription

1 6.4.5 MOS capactace-voltage aalyss arous parameters of a MOS devce ca be determed from the - characterstcs.. Type of substrate dopg. Isulator capactace = /d sulator thckess d 3. The mmum depleto capactace m dm 4. Mmum depleto capactace dm = s /W m substrate dopg 5. Substrate dopg flat-bad capactace FB 6. flat-bad capactace FB FB 7., FB, substrate dopg T 8. Fast terface state desty t 9. Moble o charges m

2 apactace-voltage characterstcs (Strog accumulato pot ) Accumulato The semcoductor capactace accumulato s very hgh because the slope s so steep. The accumulato charge chages a lot wth surface potetal. Hece, the seres capactace accumulato s bascally the sulator capactace,. (whchever smaller) The MOS structure appears almost lke a parallel-plate capactor, domated by the sulator propertes = /d. As the voltage becomes less egatve, the semcoductor surface s depleted. Thus the depleto-layer capactace d s added seres wth. The total capactace s d ( ) d epleto d Strog verso d s W s W ss W qna Semcoductor permttvty Wdth of depleto layer /

3 apactace-voltage characterstcs (epleto pot, 3, ad 4) epleto The capactace decreases as W grows from flatbad (pot ), past weak verso (pot 3), utl fally strog verso s reached at T (pot 4). Sce the charge creases as ~ s, the depleto capactace wll obvously decrease as / s. epleto 3 Strog 5 verso 4

4 . Type of substrate dopg Ifthehgh-frequecy capactace s large for egatve gate bases ad small for postve bases, t s a p-type substrate, ad vce versa. For the low frequecy - curve for p-type materal, as the gate bas s made more postve (or less egatve), the capactace goes dow slowly depleto ad the rses rapdly verso. As a result, the low frequecy - s ot qute symmetrc shape. low-frequecy hgh-frequecy

5 . Isulator capactace = /d sulator thckess d The sulator capactace = /d accumulato or strog verso (at low frequeces) gves us the sulator thckess d. d m d m

6 3. The mmum depleto capactace m dm The mmum MOS capactace, m, s the seres combato of ad mmum depleto capactace dm = s /W m, correspodg to the maxmum depleto wdth. We ca prcple use the measuremet of m to deduce dm. m d m d m

7 4. Mmum depleto capactace dm = s /W m substrate dopg The mmum MOS capactace, m, s the seres combato of ad mmum depleto capactace dm = s /W m, correspodg to the maxmum depleto wdth. We ca prcple use the measuremet of m to deduce dm. We ca use deduced dm to fd W m ad the to determe the substrate dopg N a. W m (.) ss v qna / skt l( N q Na a / ) /

8 5. Substrate dopg flat-bad capactace FB ebye legth s determed from the substrate dopg. L kt s q p0 The semcoductor capactace at flat bad FB s determed from the ebye legth capactace. ebye The overall MOS flat bad capactace, FB, s the seres combato of ebye ad. s L FB ebye ebye

9 6. Flat-bad capactace FB FB We ca thus determe FB correspodg to the FB. FB m d m d m FB

10 7., FB, substrate dopg T Oce, FB, ad substrate dopg are obtaed, all terms the T expresso are kow. T FB ms d F Iterestgly, the threshold voltage T does ot correspod to exactly the mmum of the - characterstcs, m, but a slghtly hgher capactace marked as pot 4. I fact, t correspods to the seres combato of ad dm. T d m The reaso for ths s that whe we chage the gate bas aroud strog verso, the chage of charge the semcoductor s the sum of the chage depleto charge ad the moble verso charge, where the two are equal magtude at the oset of strog verso. d m m

11 8. Fast terface state desty, t These defects ca chage ther charge state relatvely fast respose to chages of the gate bas. A fast terface state movg above the Ferm level would ted to gve up ts trapped electro to the semcoductor (or equvaletly capture a hole). The same fast terface state below the Ferm level captures a electro (or gves up a hole). (Note: To talk terms of electro or holes depeds o whch s the majorty carrer the semcoductor.) The fast terface states gve rse to a capactace whch s parallel wth the depleto capactace the chael(ad hece s addtve), ad ths combato s seres wth the sulator capactace. The fast terface states cotrbute to the low frequecy capactace LF, but ot the hgh frequecy capactace HF. t q LF HF LF HF cm e

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13 8. Moble o charge, m Bas-temperature stress test Heat up the MOS devce to ~ o (to make the os more moble) ad apply a postve gate bas to geerate a feld of ~M/cm wth the oxde. After coolg the capactor to room temperature, the - characterstcs are measured. The capactor s heated up aga, a egatve bas s appled so that the os drft to the gate electrode. Ad aother - measuremet s made. The postve bas repels postve moble os such as Na + to the oxde-slco terface so that they cotrbute fully to a flat bad voltage we ca call FB+. The egatve bas attracts postve moble os, so they are too far away from the terface to affect the semcoductor bad-bedg, but duce a equal ad opposte charge o the gate electrode. FB+ s determed. from the dfferece of the two flat bad voltages, we ca determe the moble o cotet usg ( ) m FB FB

14 6.4.6 Tme depedet capactace measuremets

15 eep depleto ad Zerbst techque eep depleto If the gate bas s vared rapdly from accumulato to verso, the depleto wdth ca mometarly become greater tha the theoretcal maxmum for gate bas beyod T. Ths causes the MOS capactace to drop below the theoretcal mmum, m, for a traset perod. Zerbst techque Ths capactace traset, -t, forms the bass of a powerful techque to measure the lfetme.

16 6.4.7 urret-oltage characterstcs of MOS gate oxdes There ca be some leakage curret for real sulators.

17 Fowler-Nordhem ad drect tuelg Tuelg currets are becomg a major problem moder devces because the useful feature of hgh put mpedace for MOS devces s degraded. Fowler-Nordhem tuelg urret for electros gog from the S coducto bad to the coducto bad of SO, ad the havg the electros hop alog the oxde to the gate electrode. rect tuelg As the gate oxdes are made ther, that the electros the coducto bad of S ca tuel through the gate oxde ad emerge the gate, wthout havg to go va the coducto bad of the gate oxde.

18 Pursut of hgh gate capactace It s ecessary to crease the gate capactace (= /d) order to crease the dra curret. Hgh-k delectrcs Use sulators wth a delectrc costat hgher tha SO, stead of reducg the gate oxde thckess d. Reducg d too much wll crease the gate oxde feld ad cause the tuelg. Fowler-Nordhem tuelg curret as a fucto of electrc feld across the oxde I FN Ε ox B exp( ) E ox I E B FN ox Fowler-Nordhem tuelg curret Electrc feld the gate oxde ostat, fucto of m * ad barrer heght

19 Tme-depedet delectrc breakdow(tb) Prologed charge trasport through gate oxdes ca ultmately cause catastrophc electrcal breakdow of the oxdes, kow as tme-depedet delectrc breakdow (TB).. Electro tuelg to the coducto bad of the gate oxde from the egatve electrode cathode), the gag eergy from the electrc feld, thus becomg hot electros the gate oxde.. If they ga suffcet eergy, they ca cause mpact ozato wth the oxde ad create electro-hole pars. 3. These mpact-geerated holes, wth very low mobltes, are trapped at defect stes wth the oxde, ear the cathode. 4. The resultg bad dagram s altered by ths sheet of trapped postve charge, whch causes the teral electrc feld betwee ths pot ad the gate to crease. 5. As a result, the barrer for electro tuelg from the gate to the oxde s reduced. 6. More electros ca tuel to the oxde, ad cause more mpact ozato. 7. We get a postve feedback effect that ca lead to a ruaway TB process.

20 storto of bad edges by trapped holes ad electros from mpact ozato leadg TB

21 6. Trasstor Operato 6. The Jucto FET 6.3 The Metal-Semcoductor FET 6.4 The Metal-Isulator-Semcoductor FET 6.5 The MOS Feld-Effect Trasstor We aalyze the coductace of the chael ad fd the I - characterstcs as a fucto of gate voltage.

22 6.5. Output characterstcs

23 ate voltage s sd s s permttvty of the sulator Isulator capactace per ut area harge semcoductor The duced charge s the semcoductor s composed of moble charge ad fxed charge the depleto rego d. FB ms s s

24 s s ms FB Moble charge The duced charge s the semcoductor s composed of moble charge ad fxed charge the depleto rego d. s d ms T d s ) ( T d s FB Wth a voltage appled, there s a voltage rse x from the source to each pot x the chael. x F s x ) ( at threshold ) ( x F a s x F FB d x F FB N q ) ( F (5.60) W N N N qa N qax N N N N q W d a d a p d a d a 0 / 0 ) ( threshold at

25 urret If we eglect the varato of d (x) wth bas x, the equato ca be smplfed to ) ( x F a s x F FB d x F FB N q ) ( ) ( x T x The coductace of the dfferetal elemet dx s At pot x we have x d x Z dx I ) ( Z Wdth of the chael Surface electro moblty dx Z x / ) ( Itegratg from source to dra, x x T L d Z dx I 0 0 ) ( ] ) [( T L Z I

26 urret I Z L [( T ) ] where Z kn L determes the coductace ad trascoductace of the -chael MOSFET.

27 oductace ad trascoductace The coductace of the chael the lear rego ] ) [( T L Z I N k L Z ) ( T L Z I g T where > T for a chael to exst. As the dra curret creased, the voltage across the oxde decreases ear the dra, ad becomes smaller there. As a result the chael becomes pched off at the dra ed, ad the curret saturates. T sat.) ( The dra curret at saturato remas essetally costat for larger values of dra voltage.) ( ) (.) ( sat L Z L Z sat I T The trascoductace the saturato rego ) (.) (.) ( T m L Z sat I sat g

28 Sgs of,, ad T (output characterstcs) The dervatos preseted before are based o the -chael devce. For the p-chael ehacemet trasstor the voltage,,ad T are egatve, ad curret flows from source to dra. -chael p-chael The output characterstcs plot the dra curret as a fucto of the dra bas, wth gate bas as a parameter.