VLSI Implementation and Performance Evaluation of Low Pass Cascade & Linear Phase FIR Filter

Transcription

1 Intrnatonal Journal of Engnrng and Tchncal Rsarch IJETR ISS: 3-869, Volum-3, Issu-6, Jun 5 VLSI Implmntaton and Prformanc Evaluaton of Low Pass Cascad & Lnar Phas Fltr Jaya Gupta, Arpan Shah, Ramsh Bhart Abstract In ths papr, w prsnt a VLSI mplmntaton of low pass cascad & lnar phas fltr for low powr dsgn. A dynamc powr can b control usng powr supply. W proposd a VHDL mplmntaton of low pass fltr. A output of th systm n dscrt form wll transfr to MATLAB for frquncy rspons gnraton. To mak th pplnng mor synchronous w hav us a array basd ROM to stor ntr-stag output. A cascad & lnar phas wll b placd n th systm and powr consumpton and frquncy rspons wll analyss. Indx Trms, Dynamc powr, ROM I. ITRODUCTIO A fnt mpuls rspons fltr s a fltr whos mpuls rspons s of fnt duraton or rspons to any fnt lngth nput, bcaus t sttls to ro n fnt tm []. Th mpuls rspons of an th-ordr dscrt-tm fltr lasts xactly + sampl from frst nonro lmnt through last nonro lmnt, bfor t thn sttls to ro. fltr can b dscrt-tm or contnuous-tm and dgtal or analog []. fltr output s shown by followng quaton, k n h xn k y k x[n] rprsnts th fltr nput. H k rprsnts th fltr coffcnts. y[n] rprsnts th fltr output. s th numbr of fltr coffcnts ordr of th fltr. On takng -transform of th abov quaton w gt, h X h X h X... h X Th quaton of Y can b drctly rprsntd by a block dagram as shown n fg and ths structur s calld Drct form structur or Fd.R fltr [3]. Th drct form structur provds a drct rlaton btwn tm doman and - doman quatons. Jaya Gupta, studnt, M.Tch, VLSI Tchnology, Jagan ath Unvrsty, Japur, Inda Arpan Shah, Assstant Profssor Dpartmnt of ECE, Jagan ath Unvrsty, Japur, Inda Ramsh Bhart, Assocat Profssor Dpartmnt of ECE, Jagan ath Unvrsty, Japur, Inda Fg Drct Form structur of Fltr Th frquncy rspons of fltr s prsntd by H j d. So th quaton for DFT coffcnts Hk can b wrttn as j jk H k H d k 3 w Whr, k=,, - Th sampls of mpuls rspons h s gvn by, Whn s odd, H k RH k jnk h 4 Whn s vn, H k RH k jnk h 5 ow th Transfr Functon H of th fltr s gvn by - transform of h. n H h 6 X n j Th magntud rspons H s gvn by A,whr A h h cos 7 n 64

2 VLSI Implmntaton and Prformanc Evaluaton of Low Pass Cascad & Lnar Phas Fltr Hr 3,,,,, j Th frquncy rspons H s gvn by, H j H 8 j Coffcnt Computaton for Cascad Fltr VHDL Implmntaton Dsgn for Cascad Fltr Frquncy Rspons Analyng for Cascad Fltr II. CASCADE AD LIEAR PHASE FILTER A. Cascad Fltr Th transfr functon of a systm, H... h h h h 9 X Th transfr functon of systm s - th ordr polynomal n. As a altrnatv to th Drct form [4], ths polynomal can b factord nto frst and scond ordr factors and th transfr functon H can b xprssd as a product of frst and scond ordr factors or sctons as shown n quaton [5], H H H H 3 H H X Whr, H h h h ; Scond ordr scton Or, H h h ; Frst ordr scton X H H H Y Fg 3 Block Dagram of Implmntaton of Cascad Fltr Algorthm:. W calculat th coffcnts wth th hlp of followng formula usng MATLAB. h H k RH k jnk. In VHDL mplmntaton, fnd th output of frst stag as H. a Multply th nput wth coffcnt. M n = X * h n b ow add all th multplcants to fnd th output of frst stag. 3. Smlarly n nxt two stags of cascad structur w rpat th nd stp. 4. Thus w calculat th output of last stag as fnal output Y. 5. ow frquncy rspons gnratd by usng MATLAB. B. Lnar phas Fltr If th mpuls rspons s symmtrc about ts orgn, lnar phas rsults. If all ro fltr has a lnar phas rspons, a spcal non-rcursv structur that rducs th numbr of multplcatons by approxmatly on half can b mplmntd. Th mpuls rspons for a casual fltr bgns at ro and nds at - [8]. A lnar phas fltr of lngth s charactrd by h h Th symmtry proprty of a lnar phas fltr s usd to rduc th multplrs rqurd n ths ralaton [9]. Usng ths condton, th -transform of th mpuls rspons can b xprssd as n H Z h For vn, h n n h H 3 n Fg Cascad structur of Fltr Th ndvdual scond ordr or frst ordr sctons can b rald thr n drct form structur or lnar phas structur [6]. Th ovrall systm s obtand by cascadng th ndvdual sctons as shown n fg. Th numbr of calculatons and th mmory rqurmnt dpnds on th ralaton of ndvdual sctons [7]. Th output transform Y H X h X h X... h X

3 Intrnatonal Journal of Engnrng and Tchncal Rsarch IJETR ISS: 3-869, Volum-3, Issu-6, Jun 5 Hr / multplrs ar rqurd []. Coffcnt Computato n for Lnar phas Fltr VHDL Implmntaton Dsgn for Lnar phas Fltr Frquncy Rspons Analyng for Lnar phas Fg 6 Block Dagram of Implmntaton of Lnar Phas Fltr Fg 4 Lnar phas structur of Fltr whn s vn For odd, 3 n H h h 5 n Hr multplrs ar rqurd []. Algorthm:. W calculat th coffcnts wth th hlp of followng formula usng MATLAB. h H k RH k jnk. In VHDL mplmntaton, fnd th output of proposd dsgn of lnar phas fltr. a W sparat th nputs nto st stag and nd stag. b ow add th frst nput of frst stag wth last nput of scond stag and thn ncras th nput of frst stag and dcras th nput of scond stag. L = Q + Q c ow multply th rsult of abov addton wth coffcnts. d ow add all th multplcands to fnd th output. 3. ow frquncy rspons gnratd by usng MATLAB. III. RESULT Arano. of LUT 8 6 Fg 5 Lnar phas structur of Fltr whn s odd Th lnar phas systm rcognton rqur approxmatly only half th numbr of multplrs than drct form and cascad form ralatons []. Th sampls obtand by samplng dal frquncy rspons ar DFT coffcnts. Th complx DFT coffcnts obtan by samplng frquncy rspons always xst as conjugat pars [3]. 4 Basc Cascad Lnar phas Fg 7 Graphcal Comparson of Ara Arano. of LUT 66

4 VLSI Implmntaton and Prformanc Evaluaton of Low Pass Cascad & Lnar Phas Fltr Basc Cascad Dlayns Lnar phas Dlayns am of fltr Basc Cascad Lnar phas Ara no. of LUT Spd dlayns Powr mw Dlay powr product ns-mw Tabl Ovrall Comparson of Basc, Cascad and Lnar Phas Fltrs Dsgn Fg 8 Graphcal Comparson of Dlay PowrmW PowrmW IV. COCLUSIO Tabl shows th Ovrall Comparson of Basc, Cascad and Lnar Phas Fltrs Dsgn. It s clar that thr s a dcras n crcutry, powr consumpton of Cascad as compard to th Lnar Phas dsgn But an ncras n tm consumpton of Cascad as compard to th Lnar Phas dsgn. Th ovrall product of dlay ns and powr mw of Lnar Phas Ftlr s rducd by 4.79% as compard to Cascad Fltr, whch shows th mprovmnt n Lnar Phas Fltr Dsgn rsults. REFERECES Fg 9 Graphcal Comparson of Powr Dlay Powr ProductnsmW Fg Graphcal Comparson of Dlay*Powr Dlay Powr Productns-mW [] A low-powr dgt-basd rconfgurabl fltr, K.-H. Chn and T.-D. Chuh, IEEE Transacton Crcuts Syst. II, vol. 53, no. 8, pp. 67 6, August 6. [] Th multplxd structur of mult-channl fltr and ts rsourcs valuaton, L. Mng and Y. Chao, n Proc. Int. Confrnc. CDCIEM, pp , Mar.. [3] Rconfgurabl archtctur of a RRC ntrpolator for multstandard dgtal up convrtr, Hata, I. Chakrabart, and S. Banrj, n Proc. IEEE 7th IPDPSW, pp. 47 5, May 3. [4] FPGA ralaton of fltrs by ffcnt and flxbl systolaton usng dstrbutd arthmtc, P. K. Mhr, S. Chandraskaran, and A. Amra, IEEE Trans. Sgnal Procss., vol. 56, no. 7, pp , July. 8. [5] Dynamcally rconfgurabl fltr archtcturs wth fast rconfguraton, M. Kumm, Mollr, and P. Zpf, n Proc. 8th Int. Workshop RCoSoC, pp. 8, Jul. 3. [6] Hgh-throughput pplnd ralaton of adaptv fltr basd on dstrbutd arthmtc, P. K. Mhr and S. Y. Park, n Proc. IEEE/IFIP 9th Int. Conf. VLSI-SOC, pp , Oct.. [7] Adaptv fltrs usng modfd sldng-block dstrbutd arthmtc wth offst bnary codng, W. Huang and D. V. Andrson, n Proc. IEEE In. Conf. Acoust., Spch, Sgnal Procss. ICASSP, pp , 9. [8] Dlayd block LMS algorthm and concurrnt archtctur forhghspd mplmntaton of adaptv fltrs, B. K. Mohanty and K. Mhr, prsntd at th IEEE Rgon TECO 8 Conf., Hydrabad, Inda, ov. 8. [9] Two hgh-prformanc adaptv fltr mplmntaton schms usng dstrbutd arthmtc, R. Guo and L. S. DBrunnr, IEEE Trans. Crcuts Syst. II, vol. 58, no. 9, pp. 6 64, Sptmbr. [] FPGA mplmntaton of fast block LMS adaptv fltr usng dstrbutd arthmtc for hgh-throughput, S. Baghl and R. Shak, n Proc. Int. Confrnc. Commun. Sgnal Procss. ICCSP, pp , Fb.,. [] Low powr and lss complx mplmntaton of fast block LMS adaptv fltr usng dstrbutd arthmtc, Baghl and R. Shak, n Proc. IEEE Studnts Tchnol. Symp., pp. 4 9, January 4 6,. 67

5 [] Dsgn and ralaton of dgtal fltrs basd on MATLAB Chonghua L, IEEE Ant-Countrftng Scurty and Idntfcaton n Communcaton ASID, Intrnatonal Confrnc, ISB no , pp. 4, 8- July. [3] Dsgn of Dgt-Sral Fltrs: Algorthms, Archtcturs, and a CAD Tool, Aksoy L., Laar C., Costa E., Flors P and Montro J, IEEE Transactons, Vol., Issu 3, pp , ISS no. 63-8, March 3. [4] Lnar phas low pass fltr dsgn usng Improvd Partcl Swarm Optmaton, Mukhrj S., Kar R., Mandal D. and Mondal S., Rsarch and Dvlopmnt SCORD, IEEE Studnt Confrnc, ISB no , pp , 9- Dc.. Jaya Gupta, Studnt of M.Tch n Jagan ath Unvrsty, Japur. I hav compltd my M.Tch VLSI tchnology n 5 from Jagan ath Unvrsty and B.Tch dgr n 3 from Rajasthan Tchncal Unvrsty. I am currntly workng n th VLSI fld Arpan Shah, Assstant Profssor Dpartmnt Of ECE n Jagan ath Unvrsty, Japur, Inda. H has Compltd hs M.Tch VLSI n and publsh varous rsarch paprs n fld of VLSI and Embddd Systm. H has gudd mor than M.Tch studnts for thr rsarch work. Ramsh Bhart Asso. Prof. Dpt. of ECE n Jagan ath Unvrsty, Japur.H s currntly pursung PhD from Jagan ath Unvrsty. H has compltd hs M.TchE&CE n from MIT Japur, and B.E dgr n 4 from Rajasthan Unvrsty. H s currntly workng n th wrlss communcaton. Intrnatonal Journal of Engnrng and Tchncal Rsarch IJETR ISS: 3-869, Volum-3, Issu-6, Jun