Research Manuscript Title DESIGN OF QCA FULL ADDER CIRCUIT USING CORNER APPROACH INVERTER R.Rathi Devi 1, PG student/ece Department, Vivekanandha College of Engineering for Women rathidevi24@gmail.com S.Thilakavathi 2, Assistant Professor/ ECE Department, Vivekanandha College of Engineering for Women, thilakasundar@gmail.com www.istpublications.com Innovative Science and Engineering Research (IJFISER), Volume-2, Issue-2, JUNE - 2016, Page-105
DESIGN OF QCA FULL ADDER CIRCUIT USING CORNER APPROACH INVERTER R.Rathi Devi 1, PG student/ece Department, Vivekanandha College of Engineering for Women rathidevi24@gmail.com S.Thilakavathi 2, Assistant Professor/ ECE Department, Vivekanandha College of Engineering for Women, thilakasundar@gmail.com ABSTRACT In Quantum-dot Cellular Automata (QCA) the basic Boolean primitive is the majority gates. To design a majority function and inverter gate logic design and to design a adder architecture using majority and inverter operation. In QCA the adder architecture complexity is reduced further than CMOS adder design process. Adder architecture is a vital block in more type of digital core architecture and to control the system functionality. Many logic gates are designed using QCA because it can be easily developed. Proposed work is to develop a 32-bit adder design using Carry Save Adder (CSA) technique. The system uses a corner inverter in the design of QCA full adders that has advantage in reduction of QCA cell count and area consumption. In proposed work molecular QCA is used. A QCA design have four clock zone and this work mainly depends on QCA DESIGNER to design an adder architecture. Keywords: Quantum- dot cellular automata, Full adder, carry save adder, Majority gate, Inverter I. INTRODUCTION QCA is one of the new technologies it is alternative for complementary metal oxide semiconductor technology. QCA technology is very effective because only quantum cell is used and many features already implemented in QCA it take less time. For CMOS technology it is very difficult to scale down due to several reasons. Compared to CMOS QCA has a lot of merits. QCA technology provides a capable opportunity to overcome the impending limits of conventional CMOS technology. Most of the logic circuits are designed using QCA technology such as adder, multiplier, comparator etc. Devices based on quantum design gives the assurance of faster speeds and reduced area. Most quantum device designs examined they uses currents and voltages to encode information. The basic QCA cell represents a logical bit, which is logic 1 or logic 0. In quantum cell electrons are interaction between each other. The electron moves to opposite corners due to repelling force of the quantum cell that results in logic 0 and 1. A QCA design are partitioned the clock zones that have four clock signal. A CSA is a type of digital adder, used in computer micro architecture. II. BASIC CONCEPTS QUANTUM-DOT CELLULAR AUTOMATA QCA is a square nanostructure that has quantum cell. Each cell has four quantum dots. The help of two free electrons the cell can be charged shown in FIG 1. Electron transmission arises from columbic interaction. QCA structures are made by array of quantum cells within which every cell has an electrostatic interaction between electrically charged particles. QCA do not use transistors only use the quantum cell. QCA size is smaller than CMOS it can be implemented in molecule [1], [2]. QCA power consumption is particularly lower than CMOS because there are not any current in the circuit. In QCA cell design the distance between Quantum dots to be about 20nm, and a distance between cells of about 60nm. logic 0 logic1 Innovative Science and Engineering Research (IJFISER), Volume-2, Issue-2, JUNE - 2016, Page-106
Figure 1 QCA cell A nanometer sized structure, quantum dot the electron has to be trapped in three dimensions. Quantum dots play a vital role in electronics and photonic devices (includes laser diodes, LED, solar and photovoltaic cells) because of their unique properties due to quantum detention of electrons in three dimensions [2],[3]. The clocks of a QCA system used for two main reasons: Powering the automaton and controlling data flow direction. The electron can tunnel through to neighboring cells during the clock transition by the contact between electrons. The behavior of each cell in a circuit is controlled by a clock signal. A. QCA gates There are two primary QCA gates 1. QCA corner Inverter (QI) The QCA cells can be used to form the primitive logic gates [3]. The simplest design of corner inverter is shown in FIG 2. B. QCA Majority (QM) gate Figure 2 Corner inverter Important primary QCA gate realizes the three input majority function and five input majority function. Majority gate with three inputs and one output shown in FIG 3. In majority gate structure, the electric field effect of all input on the output is identical and additive, with the input state (binary 0 or binary 1) is in the majority gate output cell [4]. For example, if A and B inputs are binary 1 state and C input is binary 0 state and the output will exist in a binary 1 state since the mutual electrical field effect of inputs A and B collectively is greater than that of input C. Optimize carry propagation time using MG s [6],[10]. Figure 3 Majority Gate A QM gate with one input is predetermined to 0 or 1 acts as an AND or OR gate, respectively. Therefore, the combination of QM and QCA corner inverter make a complete logic set. C. QCA clock The clock signal has four states in each clock zone that is high-to-low, low, low-to-high and high. The cells begin computing during the high-to-low state and hold the value for the duration of the low state. In the low to high state the cell is released and high state then the cell is inactive. The four phases correspond to switch, hold, release and relax. In the switch phase, cells initiate unpolarized and with low potential barriers but the barriers are raised during this phase. In the hold phase, the barriers are consumed high. Innovative Science and Engineering Research (IJFISER), Volume-2, Issue-2, JUNE - 2016, Page-107
Figure 4 Inter dot barriers in a clocking zone In the release phase, the barriers are lowered. In the final phase, namely relax, the barriers remain lowered and keep the cells in an unpolarized state shown in FIG 4. An alternative to zone clocking, called continuous clocking, involves production of a potential field by a system of immersed electrodes with zone clocking, all the cells in a design are grouped into one of four available clocking zones; that is, all the cells in a exacting clocking zone are attached to one of the four available phases of QCA clock. D. QCA fabrication technologies QCA cells are accomplished within different fabrication technologies are used in QCA cell namely Metal Island, Semiconductor, Molecular, and Magnetic [9]. The gain of Molecular implementation includes very high switching speeds, extremely high device density and highly symmetric QCA cell structure [7]. III. NEW QCA FULL ADDER Three Majority gates and two corner inverters can be used to design full adder architecture design. The vertical and horizontal wires are marked with 2 and 0, respectively in clock zones, not including the central cell, which is unmarked [1],[8]. Figure 5 1-bit QFA schematic diagram Innovative Science and Engineering Research (IJFISER), Volume-2, Issue-2, JUNE - 2016, Page-108
Where a, b and c represents the input. Carry and sum represents the outputs. MG represents the Majority Gate. Figure 6 QCA Designer layout The one level layout of QCA Full Adder (QFA) is shown in figure 6. Simulation found 3 inputs, 2 outputs and 60 total QCA cells. The total area occupied by QFA is 0.05 μm 2 which is displayed below the simulation window. Figure 7 Input /Output waveform for QFA Obtained Simulation Result File opened in 0.08 seconds Selection extents: (2471.00,1387.58)[179.33x301.42] = 54054.15 nm^2 = 0.05 um^2 Objects selected: 60 Simulation found 3 inputs 2 outputs 60 total cells Innovative Science and Engineering Research (IJFISER), Volume-2, Issue-2, JUNE - 2016, Page-109
TECHNIQUE TABLE 1 COMPARISON OF AREA CELL COUNT AREA Coplanar 76 0.07µm 2 Corner 60 0.05µm 2 80 60 40 20 0 Coplanar CELL COUNT Corner CELL COUNT Figure 8 Comparison graph of cell count AREA 0.08 Area in µm 2 0.06 0.04 0.02 0 Coplanar Corner AREA Figure 9 Comparison graph of Area IV. CONCLUSION In this paper the design, layout and simulation of adder circuit based on majority gate and corner inverter. These designs are efficient in terms of cell count and area. QCA technology one of the promising nanotechnologies in future that can be used to design a adder architecture. The adder architecture is used in digital core processors, ALU unit and control systems. One bit adder design layout is 60 and the area is 0.05µm 2. In coplanar based adder design the cell count is 76 and the area is 0.07µm 2. In this paper the 16 cell count is reduced and then area is reduced. Further achieve the area the cell count is decreased in design. REFERENCES [1] D. Abedi, G. Jaberipur, and M. Sangsefidi, Coplanar Full Adder in Quantum-Dot Cellular Automata via Clock- Zone Based Crossover IEEE Transactions on Nanotechnology 2015. [2] Stefania Perri, Pasquale Corsonello, Design of Efficient Binary Comparators in Quantum-Dot Cellular Automata IEEE Transactions on Nanotechnology 2013. Innovative Science and Engineering Research (IJFISER), Volume-2, Issue-2, JUNE - 2016, Page-110
[3] J. Huang, M. Momenzadeh, M. B. Tahoori, and F. Lombardi, Defect characterization for scaling of qca devices [quantum dot cellular automata], in Defect and Fault Tolerance in VLSI Systems, 2004. DFT 2004. Proceedings. 19th IEEE International Symposium on. IEEE, 2004, pp. 30 38. [4] Santanu Santra, Utpal Roy, Design and Implementation of Quantum Cellular Automata Based Novel Adder Circuits International Journal of Computer, Electrical, Automation, Control and Information Engineering Vol:8, No:1, 2014. [5] P. D. Tougaw and C. S. Lent, Logical devices implemented using quantum cellular automata, Journal of Applied physics, vol. 75, no. 3, pp. 1818 1825, 1994. [6] Namit Gupta and Nilesh Patidar, Sumant Katiyal, K. K. Choudhary, Design of Hybrid Adder-Subtractor (HAS) using Reversible Logic Gates in QCA International Journal of Computer Applications (0975 8887) Volume 53 No.15, September 2012. [7] Lu, Yuhui, Mo Liu, and Craig Lent. "Molecular quantum-dot cellular automata: From molecular structure to circuit dynamics." Journal of applied physics vol. 102, no. 3, p. 034311, 2007. [8] Momenzadeh, Mariam, Marco Ottavi, and Fabrizio Lombardi. "Modeling QCA defects at molecular-level in combinational circuits." Defect and Fault Tolerance in VLSI Systems, 2005. DFT 2005. 20th IEEE International Symposium on. IEEE, 2005. [9] Weiqiang Liu, Liang Lu, M aire O Neill, A First Step Toward Cost Functions for Quantum-Dot Cellular Automata Designs IEEE TRANSACTIONS ON NANOTECHNOLOGY, VOL. 13, NO. 3, MAY 2014 [10] H. Cho and E. E. Swartzlander, Adder and multiplier design in quantum dot cellular automata, Computers, IEEE Transactions on, vol. 58, no. 6, pp. 721 727, 2009. Innovative Science and Engineering Research (IJFISER), Volume-2, Issue-2, JUNE - 2016, Page-111