Low Power Phase Change Memory via Block Copolymer Self-assembly Technology Beom Ho Mun 1, Woon Ik Park 1, You Yin 2, Byoung Kuk You 1, Jae Jin Yun 1, Kung Ho Kim 1, Yeon Sik Jung 1*, and Keon Jae Lee 1* 1 Department of Materials Science and Engineering, Korea Advanced Institute of Science and Technology (KAIST) 291 Daehak-ro, Yuseong-gu, Daejeon 305-701, Republic of Korea 2 Graduate School of Engineering, Gunma University, 1-5-1 Tenjin, Kiryu, Gunma 376-8515, Japan ABSTRACT We report the demonstration of low power phase change memory (PCM) by forming thin self-assembled SiO x nanostructures between Ge 2 Sb 2 Te 5 (GST) and a TiN heater layer utilizing a block copolymer (BCP) self-assembly technology. The reset current was decreased about threefold as fill factor, which is the occupying area fraction of self-assembled SiO x nanostructures on a TiN heater layer, increased to 75.3%. The electro-thermal simulation shows the better heat efficiency due to the nano-patterned insulating oxide. INTRODUCTION The self-assembly of diblock copolymers has been considered as an alternative method for photolithography generating sub-10 nm patterns because it has the scalability and costeffectiveness [1]. Despite many advantages of BCP lithography, there have been few demonstrations for its practical application to electronic device [2-5]. Recently, we the first have demonstrated the low power PCM device using the thin nanostructured SiO x layer formed by a BCP self-assembly process, in which switching power of memory devices is significantly reduced up to 20 times [6]. Although our previous study demonstrate BCP self-assembled nanostructures improve the PCM device with 2 um diameter hole, The possibility of practical applications in current industry have to be proven through tests on submicron PCM structures. In this study, we formed self-assembled SiO x nanostructures at the interface between a GST thin film and a TiN resistive heater within the 500nm circular hole of a PCM cell by microphaseseparation of two mutually incompatible blocks. This approach has notable advantages: (1) Substantial reduction of reset current; By patterning dielectric SiO x nanostructures on TiN heater layer, the contact area between TiN and GST decreased significantly, resulting in the reset current down from 26 ma to 7.5 ma in our research (Figure 3a). (2) Cost-effectiveness; block copolymer self-assembly is a simple, cost-effective, and scalable maskless nanofabrication technique. (3) Excellent scalability; we previously reported that well-ordered patterns were obtained in 77-nm-wide circular holes [7]. BCP self-assembly can create ordered arrays of sub- 20 nm features [8], (4) Tunability; PS-b-PDMS BCP can be self-assembled into insulating SiOx nanostructures by adjusting the molecular weight and solvent-vapor treatment [9].
EXPERIMENTAL Figure 1. (a) A device architecture of the PCM device. (b - f) Schematic fabrication procedures of the PCM device. To know changes of properties depending on the fill factors, we controlled the geometries of SiO x nanostructures on 500 nm diameter hole such as sphere, ring, and lamella which effectively reduce the contact area between the GST and the TiN thin film to 75.3 % (Figure 1a). Figure 1b - 1f shows the main process flows. A bottom electrode consisting of 100 nm TiN and 50 nm W films was deposited via sputtering on a SiO 2 /Si substrate. A 300 nm SiO 2 dielectric layer was grown by plasma-enhanced chemical vapor deposition (PECVD) and pores of 500 nm diameter were patterned by e-beam lithography (Figure 1b). The surface of this substrate was treated with a hydroxyl-terminated PS homopolymer brush. The brush treatment process prior to BCP film spin-coating improves the uniformity of the self-assembled PS-b-PDMS pattern. PS-b- PDMS BCP was dissolved in toluene and spin-coated onto the substrate (Figure 1c). After spinning, the samples were annealed with different solvent vapors at 25 C for two hours leading to the creation of well-aligned PDMS nanostructures in the PS matrix (Figure 1d). A two-step CF 4 and O 2 plasma etching process for 24 sec respectively removed the PS matrix and then converted PDMS to silica nanostructure, which remained on the substrate (Figure 1e). 260 nm GST films as a phase change material were deposited by DC-sputtering on TiN films with and without the SiO x nanostructures. Ti 50 nm and Ta 250 nm films were finally formed by sputterdeposition (Figure 1f).
RESULTS AND DISCUSSION Figure 2. (a) Cross-sectional SEM images of the PCM cell within the 500 nm diameter hole. (b) The Si 2p XPS spectra of as-spun PS-b-PDMS and PS-b-PDMS etched by CF 4 and O 2 plasma on sapphire substrates. (c h) Top-view SEM images of various self-assembled silicon oxide nanostructures fabricated by different solvent vapors within 500 nm diameter hole. (c) DMF only (d) DMF volume fraction (V DMF ) : toluene volume fraction (V tol ) = 1:1, (e) 5 minutes annealing at toluene only, (f) V hep : V tol = 1:1, (g) V hep : V tol = 2:1, (h) 30 minutes annealing at toluene vapor only. Figure 2a shows the SEM images of a PCM device. The single Si 2p peak of as-spun PSb-PDMS is found initially at 101.9 ev, while this peak shifts to 103.0 ev after CF 4 and O 2 plasma etching process, indicating that the PS phase has been removed and Si-containing PDMS phase is oxidized into silicon oxide (Figure 2b). We controlled the geometries of self-assembled blocking oxide nanostructures, which are thermally stable and insulating. The SEM images of self-assembled SiO x nanostructures formed within a 500 nm diameter hole are shown in Figure 2c 2h. The BCPs used in these experiments are PS-b-PDMS BCPs with various molecular weights. The BCPs have different PDMS volume fractions which is 9.8% (45.5 kg/mol), 17.7% (45.5 kg/mol) and 33.7% (45.5 kg/mol) respectively. By using each BCP we obtained diverse self-assembled silica morphologies. In general, the morphologies of the self-assembled nanostructures can be controlled by the volume fraction, molecular weights and solvent vapor in which the film is exposed to increase chain mobility of the blocks. In order to precisely control the morphology, mixed vapors are used for selective swelling of the BCP. Since heptane vapor shows a similar solubility parameter with PDMS polymer, increment of heptane volume fraction (V hep ) induces a larger swelling effect to PDMS block. On the other hand, dimethylformamide (DMF) vapor has an inverse tendency to heptane vapor. This effect results in an increased the volume fraction of PDMS, which makes it possible to obtain varied morphologies such as sphere (Figure 2c), sphere with cylinder (Figure 2d), cylinder (Figure 2e), cylinder with hexagonally
perforated lamellar (HPL) (Figure 2f) and lamella (Figure 2g) from a single PS-b-PDMS BCP film. As shown in Figure 2e and 2h, the unordered line pattern changes to an ordered ring pattern by increasing the annealing time. Figure 3. Electric properties of the PCM device with and without various SiO x nanostructures. (a) Reset current, (b) Set current, (c) Switching behavior of the PCM device, (d) Cell to cell resistance distribution at reset and set state as the fill factor increase from 0% to 75.3%. (e) Retention, and (f) read cycling endurance characteristic of PCM device with self-assembled SiO x rings. An analysis of the PCM characteristics with various morphologies of self-assembled nanostructures was conducted. As the occupying area fraction of self-assembled SiO x nanostructures on a TiN heater layer increase to 75.3%, the reset current, set current, and threshold voltage were reduced from 26 ma to 7.5 ma (Figure 3a), from 14 ma to 3.6 ma (Figure 3b), and from 3.5 V to 1.2 V (Figure 3c). Entire cells have been obtained with 100 resistance ratio (Figure 3d). SiO x nanostructures with a PCM cells containing self-assembled SiO x ring nanostructure exhibited good stability. The retention of the set/reset state was also measured (Figure 3e). The read endurance test indicates the stability up to 10 5 read cycles at a read voltage of 0.5 V (Figure 3f). Temperature distributions in the PCM device with SiO x ring nanostructures is confirmed that GST film reach 1140.9 K at 12 ma reset pulse but the device without self-assembled nanostructures failed to reach over the melting temperature of a GST film (Figure 4a and 4b).
Figure 4.. The electro-thermal simulation of the PCM cell without (a) and with (b) SiO x ring nanostructures at current pulses of 12 ma. CONCLUSIONS Self-assembled PS-b-PDMS SiO x patterns via BCP lithography are extremely scalable, stable and easily converted to various morphologies. By utilizing this bottom up nanotechnology, we formed diverse self-assembled silica morphologies between a TiN heater layer and GST thin film of the PCM device within a submicron diameter hole. The reset, set and threshold voltage of the PCM with SiO x ring nanostructures were successfully reduced with a good reliability. Electro thermal simulation of the PCM device incorporating BCP nanostructure clearly demonstrated the change of active programming volume and thermal distribution of concentrated temperature. These results imply BCP self-assembly process as a promising method for enhancing the memory device performance. REFERENCES 1. W.I. Park, K. Kim, H.I. Jang, J.W. Jeong, J.M. Kim, J. Choi, J.H. Park and Y.S. Jung, Small 8, 3762 (2012). 2. W.I. Park, J.M. Yoon, M. Park, J. Lee, S.K. Kim, J.W. Jeong, K. Kim, H.Y. Jeong, S. Jeon, K.S. No, J.Y. Lee and Y.S. Jung, Nano Lett 12, 1235 (2012). 3. X.-Y. Bao, H. Yi, C. Bencher, L.-W. Chang, H. Dai, Y. Chen, P.-T.J. Chen and H.-S.P. Wong, IEDM Tech. Dig., 167 (2011). 4. L.-W. Chang, X. Bao, C. Bencher and H.-S.P. Wong, IEDM Tech. Dig., 752 (2010). 5. L.-W. Chang, T.L. Lee, C.H. Wann, C.Y. Chang and H.-S.P. Wong, IEDM Tech. Dig., 879 (2009). 6. W.I. Park, B.K. You, B.H. Mun, H.K. Seo, J.Y. Lee, S. Hosaka, Y. Yin, C.A. Ross, K.J. Lee and Y.S. Jung, Acs Nano 7, 2651 (2013). 7. Y.S. Jung, W. Jung and C.A. Ross, Nano Lett 8, 2975 (2008). 8. Y.S. Jung, J.B. Chang, E. Verploegen, K.K. Berggren and C.A. Ross, Nano Lett 10, 1000 (2010). 9. Y.S. Jung and C.A. Ross, Adv Mater 21, 2540 (2009).