STANDARD MICROCIRCUIT DRAWING MICROCIRCUIT, LINEAR, 4-CHANNEL DIFFERENTIAL, ANALOG MULTIPLEXER, MONOLITHIC SILICON

Similar documents
REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED. A Delete all match referenced tests as specified under Table I. - ro C.

STANDARD MICROCIRCUIT DRAWING MICROCIRCUIT, LINEAR, CMOS 8-BIT DAC WITH OUTPUT AMPLIFIER, MONOLITHIC SILICON

REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED. A Update to current requirements. Editorial changes throughout. - gap Raymond Monnin

STANDARD MICROCIRCUIT DRAWING MICROCIRCUIT, LINEAR, PRECISION TIMER, MONOLITHIC SILICON

REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED. A Changes in accordance with N.O.R R M. A. FRYE

REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED. A Drawing updated to reflect current requirements R. MONNIN

MILITARY SPECIFICATION MICROCIRCUITS, DIGITAL, BIPOLAR, TTL, DECODERS MONOLITHIC SILICON. Inactive for new design after 7 September 1995.

MILITARY SPECIFICATION MICROCIRCUITS, LINEAR, CMOS/ANALOG MULTIPLEXERS/DEMULTIPLEXERS WITH OVERVOLTAGE PROTECTION, MONOLITHIC SILICON, POSITIVE LOGIC

MICROCIRCUIT, HYBRID, CMOS, LINEAR, ANALOG MULTIPLEXER, 64 CHANNEL, +3.3 TO +5 VOLT

REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED

MILITARY SPECIFICATION MICROCIRCUITS, DIGITAL, BIPOLAR, SCHOTTKY TTL, FLIP-FLOPS, CASCADABLE, MONOLITHIC SILICON

MICROCIRCUITS, DIGITAL, TTL, FLIP-FLOPS, MONOLITHIC SILICON. Inactive for new design after 7 September 1995

REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED REV SHEET REV SHEET 15 REV STATUS OF SHEETS SHEET

REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED. C Update boilerplate paragraph to current MIL-PRF requirements. - ro C.

REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A

MICROCIRCUITS, DIGITAL, BIPOLAR LOW-POWER SCHOTTKY TTL, FLIP-FLOPS, CASCADABLE, MONOLITHIC SILICON. Inactive for new design after 18 April 1997.

Reactivated after 17 Jan and may be used for new and existing designs and acquisitions.

REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED R. HEBER devices back to the document. - ro

MILITARY SPECIFICATION MICROCIRCUITS, DIGITAL, BIPOLAR, TTL, MONOSTABLE MULTIVIBRATORS, MONOLITHIC SILICON

DLA LAND AND MARITIME COLUMBUS, OHIO TITLE MICROCIRCUIT, LINEAR, CMOS SPDT SWITCH, MONOLITHIC SILICON REVISIONS

REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED

REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED

MICROCIRCUITS, DIGITAL, BIPOLAR, ADVANCED SCHOTTKY TTL, DECADE COUNTERS, MONOLITHIC SILICON

STANDARD MICROCIRCUIT DRAWING MICROCIRCUIT, DIGITAL, RADIATION HARDENED CMOS, ANALOG MULTIPLEXER/ DEMULTIPLEXER, MONOLITHIC SILICON

MICROCIRCUITS, DIGITAL, LOW-POWER SCHOTTKY TTL, COUNTERS, MONOLITHIC SILICON. Inactive for new design after 18 April 1997.

REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED. A Changes in accordance with NOR 5962-R Monica L.

REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED SIZE A

throughout. --les. Raymond Monnin H Update to reflect latest changes in format and requirements. Correct

Device Type Generic Number Circuit Function 01 DG406A(x)/883B 16-Channel Analog Multiplexer 02 DG407A(x)/883B Dual 8-Channel Analog Multiplexer

Radiation Performance Data Package MUX8522-S

DLA LAND AND MARITIME COLUMBUS, OHIO TITLE MICROCIRCUIT, LINEAR, +5 V PROGRAMMABLE LOW DROPOUT VOLTAGE REGULATOR, MONOLITHIC SILICON

STANDARD MICROCIRCUIT DRAWING. MICROCIRCUIT, DIGITAL-LINEAR, BiCMOS, RADIATION HARDENED, NON-INVERTING QUAD DRIVER, MONOLITHIC SILICON

MILITARY SPECIFICATION MICROCIRCUITS, LINEAR, LOW OFFSET OPERATIONAL AMPLIFIERS, MONOLITHIC SILICON

REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED. C Add radiation hardened level L devices and delete figures 1 and 3. - ro R.

Case Outline(s). The case outlines shall be designated in Mil-Std-1835 and as follows:

DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO TITLE MICROCIRCUIT, LINEAR, PRECISION LOW DROPOUT CONTROLLER, MONOLITHIC SILICON REVISIONS

Radiation Performance Data Package MUX8501-S

Case Outline(s). The case outlines shall be designated in Mil-Std-1835 and as follows:

REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED. B Add class T requirements. Update boilerplate. Redrawn. - rrp R.

REVISIONS. A Changes in accordance with NOR 5962-R thl Monica L. Poelking

REVISIONS. A Changes made in accordance with NOR 5962-R thl Raymond L. Monnin

DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO TITLE MICROCIRCUIT, DIGITAL, DUAL RETRIGGERABLE MONOSTABLE MULTIVIBRATOR, MONOLITHIC SILICON REVISIONS

MILITARY SPECIFICATION MICROCIRCUITS, DIGITAL, CMOS, STATIC SHIFT REGISTER, MONOLITHIC SILICON, POSITIVE LOGIC

DLA LAND AND MARITIME COLUMBUS, OHIO TITLE MICROCIRCUIT, LINEAR, VOLTAGE REFERENCE, MONOLITHIC SILICON

REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED. A Changes in accordance with NOR 5962-R Raymond L. Monnin

REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED. A Add device type 02 and case outline Y. - ro C. SAFFLE SIZE A

CMOS HIGHSPEED 8-BIT A/D CONVERTER WITH TRACK AND HOLD. Case Outline(s). The case outlines shall be designated in Mil-Std-1835 and as follows:

Reactivated after 10 Aug and may be used for new and existing designs and acquisitions.

MILITARY SPECIFICATION MICROCIRCUITS, DIGITAL, SCHOTTKY TTL, ARITHMETIC LOGIC UNIT / FUNCTION GENERATORS, MONOLITHIC SILICON

DLA LAND AND MARITIME COLUMBUS, OHIO

8-channel analog multiplexer/demultiplexer. For operation as a digital multiplexer/demultiplexer, V EE is connected to V SS (typically ground).

MILITARY SPECIFICATION MICROCIRCUITS, DIGITAL, CMOS 4096 BIT STATIC RANDOM ACCESS MEMORY (RAM) MONOLITHIC SILICON

MILITARY SPECIFICATION MICROCIRCUITS, LINEAR, 8 BIT, DIGITAL-TO-ANALOG CONVERTERS, MONOLITHIC SILICON

74HC1GU04GV. 1. General description. 2. Features. 3. Ordering information. Marking. 5. Functional diagram. Inverter

Case Outline(s). The case outlines shall be designated in Mil-Std-1835 and as follows:

Case Outline(s). The case outlines shall be designated in Mil-Std-1835 and as follows:

Temperature range Name Description Version XC7SET32GW 40 C to +125 C TSSOP5 plastic thin shrink small outline package; 5 leads; body width 1.

The 74LV08 provides a quad 2-input AND function.

2-input EXCLUSIVE-OR gate

2-input AND gate with open-drain output. The 74AHC1G09 is a high-speed Si-gate CMOS device.

Standard Products UT54ACS153/UT54ACTS153 Dual 4 to 1 Multiplexers. Datasheet November 2010

Standard Products UT54ACS139/UT54ACTS139 Dual 2-Line to 4-Line Decoders/Demultiplexers. Datasheet November 2010

DATASHEET HI-390. Features. Ordering Information. Pinout Switch States shown for a Logic 1 Input. Applications. Functional Diagram

Dual 3-channel analog multiplexer/demultiplexer with supplementary switches

74HC1G02; 74HCT1G02. The standard output currents are half those of the 74HC02 and 74HCT02.

74HC1G86; 74HCT1G86. 2-input EXCLUSIVE-OR gate. The standard output currents are half those of the 74HC/HCT86.

ORGANIZATION AND APPLICATION The MUX8532 consists of two independent 16 channel multiplexers arranged as shown in the block diagram.

The 74LVC1G02 provides the single 2-input NOR function.

74VHC08; 74VHCT08. The 74VHC08; 74VHCT08 provide the quad 2-input AND function.

The 74HC21 provide the 4-input AND function.

ORGANIZATION AND APPLICATION The MUX8523 consists of two independent 16 channel multiplexers arranged as shown in the block diagram.

DVSA2800D Series HIGH RELIABILITY HYBRID DC-DC CONVERTERS DESCRIPTION FEATURES

Standard Products UT54ACS74/UT54ACTS74 Dual D Flip-Flops with Clear & Preset. Datasheet November 2010

(Note 1) RH1086M ADJ 15V CAPACITOR(S) NOT SHOWN BOTTOM VIEW BOTTOM VIEW V IN ADJ 2 INPUT 1 FINAL SPECIFICATIONS SUBJECT TO CHANGE

HEF4028B. 1. General description. 2. Features. 3. Applications. 4. Ordering information. BCD to decimal decoder

N-channel enhancement mode Field-Effect Transistor (FET) in a small SOT23 (TO-236AB) Surface-Mounted Device (SMD) plastic package using

XC7SET General description. 2. Features. 3. Applications. Ordering information. Inverting Schmitt trigger

Standard Products UT54ACS109/UT54ACTS109 Dual J-K Flip-Flops. Datasheet November 2010

Standard Products ACT Channel Analog Multiplexer Module Radiation Tolerant & ESD Protected

High Speed Quad SPST CMOS Analog Switch

60 V, 0.3 A N-channel Trench MOSFET

The 74LV32 provides a quad 2-input OR function.

Standard Products ACT Channel Analog Multiplexer Module Radiation Tolerant & ESD Protected

74HC2G34; 74HCT2G34. The 74HC2G34; 74HCT2G34 is a high-speed Si-gate CMOS device. The 74HC2G34; 74HCT2G34 provides two buffers.

NPN/PNP low V CEsat Breakthrough in Small Signal (BISS) transistor pair in a SOT457 (SC-74) Surface Mounted Device (SMD) plastic package.

The 74LVC1G11 provides a single 3-input AND gate.

DG211. Features. SPST 4-Channel Analog Switch. Part Number Information. Functional Block Diagrams. Pinout. Data Sheet December 21, 2005 FN3118.

Quad bus transceiver; 3-state. The output enable inputs (OEA and OEB) can be used to isolate the buses.

74AHC1G00; 74AHCT1G00

74AHC2G126; 74AHCT2G126

UT54ACTS74E Dual D Flip-Flops with Clear & Preset July, 2013 Datasheet

Datasheet. Standard Products ACT Channel Analog Multiplexer Module Radiation Tolerant

UT54ALVC2525 Clock Driver 1 to 8 Minimum Skew Data Sheet February 2016

74AHC02; 74AHCT02. The 74AHC02; 74AHCT02 provides a quad 2-input NOR function.

N-channel TrenchMOS logic level FET

74HC General description. 2. Features. 3-to-8 line decoder, demultiplexer with address latches; inverting

Datasheet. Standard Products ACT Channel Analog Multiplexer Module Radiation Tolerant & ESD Protected

NTE74HC109 Integrated Circuit TTL High Speed CMOS, Dual J K Positive Edge Triggered Flip Flop w/set & Reset

PSMN006-20K. N-channel TrenchMOS SiliconMAX ultra low level FET

74HC238; 74HCT to-8 line decoder/demultiplexer

Transcription:

REVISIONS LTR DESCRIPTION DTE (YR-MO-D) PPROVED Update boilerplate paragraphs to current MIL-PRF-38535 requirements. Delete references to device class M requirements. - ro 12-10-29 C. SFFLE REV REV REV STTUS REV OF S 1 2 3 4 5 6 7 8 9 10 PMIC N/ STNDRD MICROCIRCUIT DRWING THIS DRWING IS VILBLE FOR USE BY LL DEPRTMENTS ND GENCIES OF THE DEPRTMENT OF DEFENSE PREPRED BY DN WONNELL CHECKED BY RYMOND MONNIN PPROVED BY RYMOND MONNIN DRWING PPROVL DTE 98-01-06 DL LND ND MRITIME http://www.landandmaritime.dla.mil MICROCIRCUIT, LINER, 4-CHNNEL DIFFERENTIL, NLOG MULTIPLEXER, MONOLITHIC SILICON MSC N/ CGE CODE 67268 5962-97620 1 OF 10 DSCC FORM 2233 PR 97 5962-E348-12

1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device class Q) and space application (device class V). choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness ssurance (RH) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962-97620 01 Q E Federal stock class designator RH designator (see 1.2.1) type (see 1.2.2) class designator \ / (see 1.2.3) \/ Drawing number Case outline (see 1.2.4) Lead finish (see 1.2.5) 1.2.1 RH designator. classes Q and V RH marked devices meet the MIL-PRF-38535 specified RH levels and are marked with the appropriate RH designator. dash (-) indicates a non-rh device. 1.2.2 type(s). The device type(s) identify the circuit function as follows: type Generic number Circuit function 01 HI-1828 4-channel differential analog multiplexer 1.2.3 class designator. The device class designator is a single letter identifying the product assurance level as follows: class Q or V requirements documentation Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style E GDIP1-T16 or CDIP2-T16 16 Dual-in-line 2 CQCC1-N20 20 Square leadless chip carrier 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V. PR 97 STNDRD MICROCIRCUIT DRWING DL LND ND MRITIME 5962-97620 2

1.3 bsolute maximum ratings. 1/ Voltage between supply pins... 40 V +V SUPPLY to ground... 20 V -V SUPPLY to ground... 20 V V L to ground... 30 V nalog input voltage: +V S... +V SUPPLY + 2 V -V S... -V SUPPLY - 2 V Digital input voltage: +V EN +V... +V SUPPLY -V EN V... -V SUPPLY Continuous current, S or D... 20 m Peak current, S or D (pulsed at 1 ms, 10% duty cycle max)... 40 m Junction temperature (T J )... +175 C Power dissipation (P D ) at +75 C : Case E... 1.11 mw Case 2... 1.20 mw Power dissipation (P D ) derating factor above +75 C : Case E... 11.1 mw/ C Case 2... 12.0 mw/ C Storage temperature range... -65 C to +150 C Lead temperature (soldering, 10 seconds)... +275 C Thermal resistance, junction-to-case (θ JC ) : Case E... 35 C/W Case 2... 25 C/W Thermal resistance, junction-to-ambient (θ J ) : Case E... 90 C/W Case 2... 83 C/W 1.4 Recommended operating conditions. Operating supply voltage (±V SUPPLY )... ±15 V mbient operating temperature range (T )... -55 C to +125 C nalog input voltage (V S )... ±V SUPPLY Logic low level (V L )... 0 V to 0.4 V Logic high level (V H )... 4.0 V to +V SUPPLY +5.0 V supply (V L )... +5.0 V RMS current S or D max... 11 m 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. PR 97 STNDRD MICROCIRCUIT DRWING DL LND ND MRITIME 5962-97620 3

2. PPLICBLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPRTMENT OF DEFENSE SPECIFICTION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPRTMENT OF DEFENSE STNDRDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPRTMENT OF DEFENSE HNDBOOKS MIL-HDBK-103 - MIL-HDBK-780 - List of Standard Microcircuit Drawings. Standard Microcircuit Drawings. (Copies of these documents are available online at https://assist.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins venue, Building 4D, Philadelphia, P 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 as specified herein, or as modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full ambient operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturer's PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the "5962-" on the device. For RH product using this option, the RH designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a "QML" or "Q" as required in MIL-PRF-38535. PR 97 STNDRD MICROCIRCUIT DRWING DL LND ND MRITIME 5962-97620 4

TBLE I. Electrical performance characteristics. Test Symbol Conditions -55 C T +125 C +V SUPPLY = +15 V, -V SUPPLY = -15 V, V L = +5 V, +V EN = 0.4 V unless otherwise specified Input leakage current I IH Measure inputs sequentially, Leakage current into the source terminal of an OFF switch Leakage current into the drain terminal of an OFF switch Leakage current from an ON driver into the switch (drain) I IL +I S (OFF) -I S (OFF) connect all unused inputs to GND Measure inputs sequentially, connect all unused inputs to 5 V V S = +10 V, V D = -10 V, V EN = 4 V, Group subgroups type Min Limits Max 1,2,3 01-1.0 1.0 µ -1.0 1.0 1 01-10 +10 n all unused inputs = -10 V 2,3-50 +50 V S = -10 V, V D = +10 V, V EN = 4 V, 1-10 +10 all unused inputs = +10 V 2,3-50 +50 +I D V D = +10 V, V EN = 4 V, 1 01-10 +10 n (OFF) all unused inputs = -10 V 2,3-125 +125 -I D V D = -10 V, V EN = 4 V, 1-10 +10 (OFF) all unused inputs = +10 V 2,3-125 +125 +I D (ON) -I D (ON) V S = V D = +10 V, V EN = 0.4 V, 1 01-10 +10 n all unused inputs = -10 V 2,3-125 +125 V S = V D = -10 V, V EN = 0.4 V, Positive supply current I(+) V L = 0.4 V, V H = 4.0 V, 1-10 +10 all unused inputs = +10 V 2,3-125 +125 V EN = 0.4 V 1,2,3 01 0.5 m Unit Negative supply current I(-) V L = 0.4 V, V H = 4.0 V, 1,2,3 01-1.0 m V EN = 0.4 V Logic supply current I L V L = 0.4 V, V H = 4.0 V, 1,2,3 01 1.0 m V EN = 0.4 V See footnotes at end of table. PR 97 STNDRD MICROCIRCUIT DRWING DL LND ND MRITIME 5962-97620 5

TBLE I. Electrical performance characteristics Continued. Test Symbol Conditions -55 C T +125 C +V SUPPLY = +15 V, -V SUPPLY = -15 V, V L = +5 V, +V EN = 0.4 V unless otherwise specified Group subgroups type Switch ON resistance +R DS1 V S = 10 V, I D = 1 m 1 01 400 Ω Min Limits Max 2,3 500 -R DS1 V S = -10 V, I D = -1 m 1 400 2,3 500 Logic level voltage V L Low digital input for all dc tests 1,2,3 01 0.4 V Break before make time delay V H High digital input for all dc tests 4.0 t OPEN R L = 200 Ω, C L = 12.5 pf, see figure 3 9 01 5 ns Propagation delay times t R L = 10 MΩ, C L = 12.5 pf, 9 01 500 ns Unit address inputs to I/O channel times, see figure 3 10,11 1000 Enable to I/O t ON(EN) R L = 200 Ω, C L = 12.5 pf, 9 01 500 ns t OFF(EN) see figure 3 10,11 1000 ddress capacitance C V+ = V- = 0 V, f = 1 MHz 1/ 4 01 10 pf Output switch capacitance C OS V+ = V- = 0 V, f = 1 MHz 1/ 4 01 25 pf Input switch capacitance C IS V+ = V- = 0 V, f = 1 MHz 1/ 4 01 10 pf Charge transfer error V CTE V S = GND, V GEN = 0 V to 5 V 1/ 4 01 10 mv Off isolation V ISO V EN = 4 V, R L = 1 kω, 1/ 4 01-50 db C L = 15 pf, V S = 7 V rms, f = 100 khz 1/ These parameters are controlled by design or process parameters and are not directly tested. These parameters are characterized upon initial design release and upon design changes which would affect these characteristics. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). The certificate of compliance submitted to DL Land and Maritime-V prior to listing as an approved source of supply for this drawing shall affirm that the manufacturer's product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein. 3.7 Certificate of conformance. certificate of conformance as required for device classes Q and V in MIL-PRF-38535 shall be provided with each lot of microcircuits delivered to this drawing. PR 97 STNDRD MICROCIRCUIT DRWING DL LND ND MRITIME 5962-97620 6

type 01 Case outline E 2 Terminal number Terminal symbol 1 DDRESS 1 NC 2 +5 V SUPPLY DDRESS 1 3 ENBLE +5 V SUPPLY 4 OUT 5 THRU 8 ENBLE 5 IN 8 OUT 5 THRU 8 6 IN 7 NC 7 IN 6 IN 8 8 IN 5 IN 7 9 IN 4 IN 6 10 IN 3 IN 5 11 IN 2 NC 12 OUT 1 THRU 4 IN 4 13 IN 1 IN 3 14 +V SUPPLY IN 2 15 -V SUPPLY OUT 1 THRU 4 16 DDRESS 0 NC 17 --- IN 1 18 --- +V SUPPLY 19 --- -V SUPPLY 20 --- DDRESS 0 FIGURE 1. Terminal connections. DDRESS ON 1 0 EN CHNNELS L L L 1 and 5 L H L 2 and 6 H L L 3 and 7 H H L 4 and 8 X X H NONE FIGURE 2. Truth table. PR 97 STNDRD MICROCIRCUIT DRWING DL LND ND MRITIME 5962-97620 7

FIGURE 3. Timing waveforms. PR 97 STNDRD MICROCIRCUIT DRWING DL LND ND MRITIME 5962-97620 8

4. VERIFICTION 4.1 Sampling and inspection. For device classes Q and V, sampling and inspection procedures shall be in accordance with MIL-PRF-38535 or as modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. 4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and shall be conducted on all devices prior to qualification and technology conformance inspection. 4.2.1 dditional criteria for device classes Q and V. a. The burn-in test duration, test condition and test temperature, or approved alternatives shall be as specified in the device manufacturer's QM plan in accordance with MIL-PRF-38535. The burn-in test circuit shall be maintained under document revision level control of the device manufacturer's Technology Review Board (TRB) in accordance with MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. b. Interim and final electrical test parameters shall be as specified in table II herein. c. dditional screening for device class V beyond the requirements of device class Q shall be as specified in MIL-PRF-38535, appendix B. 4.3 Qualification inspection for device classes Q and V. Qualification inspection for device classes Q and V shall be in accordance with MIL-PRF-38535. Inspections to be performed shall be those specified in MIL-PRF-38535 and herein for groups, B, C, D, and E inspections (see 4.4.1 through 4.4.4). 4.4 Conformance inspection. Technology conformance inspection for classes Q and V shall be in accordance with MIL-PRF-38535 including groups, B, C, D, and E inspections and as specified herein. 4.4.1 Group inspection. a. Tests shall be as specified in table II herein. b. Subgroups 5, 6, 7, and 8 in table I, method 5005 of MIL-STD-883 shall be omitted. c. Subgroup 4 parameters are controlled by design or process parameters and are not directly tested. These parameters are characterized upon initial design release and upon design changes which would affect these characteristics. 4.4.2 Group C inspection. The group C inspection end-point electrical parameters shall be as specified in table II herein. 4.4.2.1 dditional criteria for device classes Q and V. The steady-state life test duration, test condition and test temperature, or approved alternatives shall be as specified in the device manufacturer's QM plan in accordance with MIL-PRF-38535. The test circuit shall be maintained under document revision level control by the device manufacturer's TRB in accordance with MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1005 of MIL-STD-883. 4.4.3 Group D inspection. The group D inspection end-point electrical parameters shall be as specified in table II herein. 4.4.4 Group E inspection. Group E inspection is required only for parts intended to be marked as radiation hardness assured (see 3.5 herein). a. End-point electrical parameters shall be as specified in table II herein. b. For device classes Q and V, the devices or test vehicle shall be subjected to radiation hardness assured tests as specified in MIL-PRF-38535 for the RH level being tested. ll device classes must meet the postirradiation end-point electrical parameter limits as defined in table I at T = +25 C ±5 C, after exposure, to the subgroups specified in table II herein. PR 97 STNDRD MICROCIRCUIT DRWING DL LND ND MRITIME 5962-97620 9

TBLE II. Electrical test requirements. Test requirements Interim electrical parameters (see 4.2) Final electrical parameters (see 4.2) Group test requirements (see 4.4) Group C end-point electrical parameters (see 4.4) Group D end-point electrical parameters (see 4.4) Group E end-point electrical parameters (see 4.4) Subgroups (in accordance with MIL-PRF-38535, table III) class Q 1 1 1,2,3,9 1/ 10,11 1,2,3,4,9, 2/ 10,11 1 1 1 1 class V 1,2,3,9, 1/ 10,11 1,2,3,4,9, 2/ 10,11 --- --- 1/ PD applies to subgroup 1. 2/ See 4.4.1c. 5. PCKGING 5.1 Packaging requirements. The requirements for packaging shall be in accordance with MIL-PRF-38535 for device classes Q and V. 6. NOTES 6.1 Intended use. Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes. 6.1.1 Replaceability. Microcircuits covered by this drawing will replace the same generic device covered by a contractor prepared specification or drawing. 6.2 Configuration control of SMD's. ll proposed changes to existing SMD's will be coordinated with the users of record for the individual documents. This coordination will be accomplished using DD Form 1692, Engineering Change Proposal. 6.3 Record of users. Military and industrial users should inform DL Land and Maritime when a system application requires configuration control and which SMD's are applicable to that system. DL Land and Maritime will maintain a record of users and this list will be used for coordination and distribution of changes to the drawings. Users of drawings covering microelectronic devices (FSC 5962) should contact DL Land and Maritime -V, telephone (614) 692-0544. 6.4 Comments. Comments on this drawing should be directed to DL Land and Maritime -V, Columbus, Ohio 43218-3990, or telephone (614) 692-0540. 6.5 bbreviations, symbols, and definitions. The abbreviations, symbols, and definitions used herein are defined in MIL-PRF-38535 and MIL-HDBK-1331. 6.6 Sources of supply. 6.6.1 Sources of supply for device classes Q and V. Sources of supply for device classes Q and V are listed in MIL-HDBK-103 and QML-38535. The vendors listed in QML-38535 have submitted a certificate of compliance (see 3.6 herein) to DL Land and Maritime -V and have agreed to this drawing. PR 97 STNDRD MICROCIRCUIT DRWING DL LND ND MRITIME 5962-97620 10

STNDRD MICROCIRCUIT DRWING BULLETIN DTE: 12-10-29 pproved sources of supply for SMD 5962-97620 are listed below for immediate acquisition information only and shall be added to MIL-HDBK-103 and QML-38535 during the next revision. MIL-HDBK-103 and QML-38535 will be revised to include the addition or deletion of sources. The vendors listed below have agreed to this drawing and a certificate of compliance has been submitted to and accepted by DL Land and Maritime -V. This information bulletin is superseded by the next dated revision of MIL-HDBK-103 and QML-38535. DL Land and Maritime maintains an online database of all current sources of supply at http://www.landandmaritime.dla.mil/programs/smcr/. Standard microcircuit drawing PIN 1/ Vendor CGE number Vendor similar PIN 2/ 5962-9762001QE 3/ HI1-1828/883 5962-9762001Q2 3/ HI4-1828/883 1/ The lead finish shown for each PIN representing a hermetic package is the most readily available from the manufacturer listed for that part. If the desired lead finish is not listed contact the vendor to determine its availability. 2/ Caution. Do not use this number for item acquisition. Items acquired to this number may not satisfy the performance requirements of this drawing. 3/ Not available from an approved source of supply. The last approved source is listed below. Vendor CGE number Vendor name and address 34371 Intersil Corporation 1001 Murphy Ranch Road Milpitas, C 95035-6803 The information contained herein is disseminated for convenience only and the Government assumes no liability whatsoever for any inaccuracies in the information bulletin.