EE C245 ME C218 Introduction to MEMS Design Fall 2007

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EE C245 ME C218 Introduction to MEMS Design Fall 2007 Prof. Clark T.-C. Nguyen Dept. of Electrical Engineering & Computer Sciences University of California at Berkeley Berkeley, CA 94720 Lecture 11: Bulk Micromachining II C 245: Introduction to MEMS Design Lecture 11 C. Nguyen 10/2/07 1 Lecture Outline Reading: Senturia Chpt. 3, Jaeger Chpt. 11, Handouts: Bulk Micromachining of Silicon, Wafer-to-Wafer Bonding for Microstructure Formation Lecture Topics: Bulk Micromachining Anisotropic Etching of Silicon Boron-Doped Etch Stop Electrochemical Etch Stop Deep Reactive Ion Etching (DRIE) Vapor Phase Etching of Silicon Laser Assisted Silicon Etching Wafer Bonding C 245: Introduction to MEMS Design Lecture 11 C. Nguyen 10/2/07 2 1

Bulk Micromachining EE C245: Introduction to MEMS Design Lecture 11 C. Nguyen 10/2/07 3 Anisotropic Etching of Silicon Etching of Si w/ KOH Si + 2OH - Si(OH) 2 2+ + 4e - 4H 2 O + 4e - 4(OH) - + 2H 2 Crystal orientation dependent etch rates {110}:{100}:{111}=600:400:1 {100} and {110} have 2 bonds below the surface & 2 dangling bonds that can react {111} plane has three of its bonds below the surface & only one dangling bond to react much slower E.R. {111} forms protective oxide {111} smoother than other crystal planes good for optical MEMS (mirrors) Self-limiting etches Front side mask Membrane Back side mask EE C245: Introduction to MEMS Design Lecture 11 C. Nguyen 10/2/07 4 2

Undercutting Via Anisotropic Si Etching Concave corners bounded by {111} are not attacked but convex corners bounded by {111} are attacked Two {111} planes intersecting now present two dangling bonds no longer have just one dangling bond etch rate fast Result: can undercut regions around convex corners Convex corner Suspended Beam Concave corner [Ristic] EE C245: Introduction to MEMS Design Lecture 11 C. Nguyen 10/2/07 5 Corner Compensation Protect corners with compensation areas in layout Below: Mesa array for selfassembly structures [Smith 1995] Mask pattern Shaded regions are the desired result Mask pattern EE C245: Introduction to MEMS Design Lecture 11 C. Nguyen 10/2/07 6 3

Other Anisotropic Silicon Etchants TMAH, Tetramethyl ammonium hydroxide, 10-40 wt.% (90 C) Etch rate (100) = 0.5-1.5 μm/min (~same as KOH) Al safe, IC compatible Etch ratio (100)/(111) = 10-35 Etch masks: SiO 2, Si 3 N 4 ~ 0.05-0.25 nm/min Boron doped etch stop, up to 40 slower EDP (115 C) Carcinogenic, corrosive Etch rate (100) = 0.75 μm/min Al may be etched R(100) > R(110) > R(111) Etch ratio (100)/(111) = 35 Etch masks: SiO 2 ~ 0.2 nm/min, Si 3 N 4 ~ 0.1 nm/min Boron doped etch stop, 50 slower EE C245: Introduction to MEMS Design Lecture 11 C. Nguyen 10/2/07 7 Boron-Doped Etch Stop EE C245: Introduction to MEMS Design Lecture 11 C. Nguyen 10/2/07 8 4

Boron-Doped Etch Stop Control etch depth precisely with boron doping (p++) [B] > 10 20 cm -3 reduces KOH etch rate by 20-100 Can use gaseous or solid boron diffusion Recall etch chemistry: Si + 2OH - Si(OH) 2 2+ + 4e - 4H 2 O + 4e - 4(OH) - + 2H 2 At high dopant levels, injected electrons recombine with holes in valence band and are unavailable for reactions to give OH - Result: Beams, suspended films 1-20 μm layers possible EE C245: Introduction to MEMS Design Lecture 11 C. Nguyen 10/2/07 9 Ex: Micronozzle Micronozzle using anisotropic etch-based fabrication Used for inkjet printer heads & automobile fuel injectors [Maluf] EE C245: Introduction to MEMS Design Lecture 11 C. Nguyen 10/2/07 10 5

Ex: Microneedle Below: micro-neurostimulator Used to access central nervous system tissue (e.g., brain) and record electrical signals on a cellular scale Wise Group, Univ. of Michigan Selectively diffuse p++ into substrate Deposit interconnect pattern and insulate conductors Multi-Channel Recording Array Structure Pattern dielectric and metallize recording sites Dissolve away the wafer (no mask needed) EE C245: Introduction to MEMS Design Lecture 11 C. Nguyen 10/2/07 11 Ex: Microneedles (cont.) 64-Site Mulitplexed Stimulating Array [Wise, U. of Michigan] Micromachined with on-chip CMOS electronics Both stimulation and recording modes 400 μm site separations, extendable to 3D arrays Could be key to neural prosthesis systems focusing on the central nervous system EE C245: Introduction to MEMS Design Lecture 11 C. Nguyen 10/2/07 12 6

Electrochemical Etch Stop EE C245: Introduction to MEMS Design Lecture 11 C. Nguyen 10/2/07 13 Electrochemical Etch Stop When silicon is biased with a sufficiently large anodic potential relative to the etchant get oxidation (i.e., electrochemical passivation), which then prevents etching For passivation to occur, current flow is required If current flow can be prevented no oxide growth, and etching can proceed Can prevent current flow by adding a reversebiased diode structure Masking Material + V pass - Etchant Diffuse n- n- type type to to make make a pn-junction V pass Etchant Solution (100) p-type Si Electrode (100) p-type Si Electrode Oxide Forms EE C245: Introduction to MEMS Design Lecture 11 C. Nguyen 10/2/07 14 + - n-type No Oxide Formation 7

pn-junction Diode EE C245: Introduction to MEMS Design Lecture 11 C. Nguyen 10/2/07 15 Electrochemical Etch Stop Electrochemical etch stop n-type epitaxial layer grown on p-type wafer forms p-n junction diode V p > V n electrical conduction (current flow) V p < V n reverse bias current (very little current flow) Passivation potential: potential at which thin SiO 2 film forms different for p-si and n-si, but basically need the Si to be the anode in an electrolytic setup Setup: p-n diode in reverse bias p-substrate floating etched n-layer above passivation potential not etched EE C245: Introduction to MEMS Design Lecture 11 C. Nguyen 10/2/07 16 8

Electrochemical Etching of CMOS N-type Si well with circuits suspended f/ SiO 2 support beam Thermally and electrically isolated If use TMAH etchant, Al bond pads safe [Reay, et al. (1994)] [Kovacs Group, Stanford] EE C245: Introduction to MEMS Design Lecture 11 C. Nguyen 10/2/07 17 Ex: Bulk Micromachined Pressure Sensors Piezoresistivity: change in electrical resistance due to mechanical stress In response to pressure load on thin Si film, piezoresistive elements change resistance Membrane deflection < 1 μm [Maluf] EE C245: Introduction to MEMS Design Lecture 11 C. Nguyen 10/2/07 18 9

Below: catheter tip pressure sensor [Lucas NovaSensor] Only 150 400 900 μm 3 Ex: Pressure Sensors EE C245: Introduction to MEMS Design Lecture 11 C. Nguyen 10/2/07 19 Deep Reactive-Ion Etching (DRIE) The Bosch process: Inductively-coupled plasma Etch Rate: 1.5-4 μm/min Two main cycles in the etch: Etch cycle (5-15 s): SF 6 (SF x + ) etches Si Deposition cycle: (5-15 s): C 4 F 8 deposits fluorocarbon protective polymer (CF 2 - ) n Etch mask selectivity: SiO 2 ~ 200:1 Photoresist ~ 100:1 Issue: finite sidewall roughness scalloping < 50 nm Sidewall angle: 90 o ±2 o EE C245: Introduction to MEMS Design Lecture 11 C. Nguyen 10/2/07 20 10

DRIE Issues: Etch Rate Variance Etch rate is diffusion-limited and drops for narrow trenches Adjust mask layout to eliminate large disparities Adjust process parameters (slow down the etch rate to that governed by the slowest feature) Etch Etch rate rate decreases with with trench trench width width EE C245: Introduction to MEMS Design Lecture 11 C. Nguyen 10/2/07 21 DRIE Issues: Footing Etch depth precision Etch stop: buried layer of SiO 2 Due to 200:1 selectivity, the (vertical) etch practically just stops when it reaches SiO 2 Problem: Lateral undercut at Si/SiO 2 interface footing Caused by charge accumulation at the insulator Poor charge relaxation and lack of neutralization of e - s at insulator Ion flux into substrate builds up (+) potential Charging-induced potential perturbs the E-field Distorts the ion trajectory Result: strong and localized damage to the structure at Si-SiO 2 interface footing EE C245: Introduction to MEMS Design Lecture 11 C. Nguyen 10/2/07 22 11

Recipe-Based Suppression of Footing Use higher process pressure to reduce ion charging [Nozawa] High operating pressure concentration of (-) ions increases and can neutralize (+) surface charge Issue: must introduce as a separate recipe when the etch reaches the Si-insulator interface, so must be able to very accurately predict the time needed for etching Adjust etch recipe to reduce overetching [Schmidt] Change C 4 F 8 flow rate, pressure, etc., to enhance passivation and reduce overetching Issue: Difficult to simultaneously control footing in a narrow trench and prevent grass in wide trenches Use lower frequency plasma to avoid surface charging [Morioka] Low frequency more ions with low directionality and kinetic energy neutralizes (-) potential barrier at trench entrance Allows e - s to reach the trench base and neutralize (+) charge maintain charge balance inside the trench EE C245: Introduction to MEMS Design Lecture 11 C. Nguyen 10/2/07 23 EE C245: Introduction to MEMS Design Lecture 11 C. Nguyen 10/2/07 24 12

Metal Interlayer to Prevent Footing (a) Photolithography 1 (sacrificial) (f) Silicon Thinning (b) Preparatory trenches (g) Photolithography 2 (c) Metal interlayer deposition (h) DRIE Pre-defined metal interlayer grounded to substrate supplies e s to neutralize (+) charge and prevent charge accumulation at the Si-insulator interface (d) Lift-off (remove PR) (e) Anodic Bonding (i) Remove metal interlayer (j) Metallize EE C245: Introduction to MEMS Design Lecture 11 C. Nguyen 10/2/07 25 DRIE Examples High aspectratio gear Tunable Capacitor [Yao, Rockwell] Microgripper [Keller, MEMS Precision Instruments] EE C245: Introduction to MEMS Design Lecture 11 C. Nguyen 10/2/07 26 13