Lecture (08) Synchronous Sequential Logic By: Dr. Ahmed ElShafee ١ Dr. Ahmed ElShafee, ACU : Spring 2018, CSE303 Logic design II Analysis of Clocked Sequential Circuits The behavior of a clocked sequential circuit can be described by means of state equation. A state equation (also called transition equation) specifies the next state as a function of the present state and inputs. For example, the characteristic equations of T flip-flop, D flipflop, and JK flip-flop specifies their next states as: Q(t+1) = T Q, Q(t+1) = D, and Q(t+1) = JQ + K Q, respectively. An example of sequential circuit is analyzed in next slide. ٢
A(t+1) = A(t) x(t)+ B(t) x(t) B(t+1) = A (t) x(t), y(t) = (A(t) + B(t)) x (t) or in compact form A(t+1) = A x+ B x B(t+1) = A x, y = (A + B) x ٣ A(t+1) = A x+ B x B(t+1) = A x, y = (A + B) x ٤
A(t+1) = A x+ B x B(t+1) = A x, y = (A + B) x ٥ ٦
The logic diagram of a sequential circuit consists of flip flops and gates. The interconnections among the gates form a combinational circuit and may be specified algebraically with Boolean expressions. The knowledge of the type of flip flops and a list of the Boolean expressions of the combinational circuit provide the information needed to draw the logic diagram of the sequential circuit. ٧ The part of the combinational circuit that generates external outputs is described algebraically by a set of Boolean functions called output equations. The part of the circuit that generates the inputs of flip flops is described algebraically by a set of Boolean functions called flip flop input equations (or excitation equations). ٨
Example For the circuit in Fig; we have Input equations: DA= Ax+ Bx,DB= A x Output equations: y= (A+ B) x Input equations: DA= Ax+ Bx, DB= A x. Output equations: y= (A+ B) x These equations provide the necessary information for drawing the logic diagram of the sequential circuit. ٩ Example D A = A x y, A(t + 1) = A x y ١٠
Example ١١ Example Input equations: J A = B, K A = Bx, J B = x, K B = A x ١٢
Input equations: J A = B, K A = Bx, J B = x, K B = A x ١٣ Input equations: J A = B, K A = Bx, J B = x, K B = A x Characteristic equation: Q(t+1) = J Q + K Q A(t+1) = J A A + K A A = BA + (Bx ) A = BA + B A + xa B(t+1) = J B B + K B B = x B + (A x) B = x B + ABx+ A Bx ١٤
A(t+1) = BA + B A + xa B(t+1) = x B + ABx+ A Bx S0: A = 0, B = 0 on x = 1, A(t+1) = 0, B(t+1) = 0 S0 S0 on x = 0, A(t+1) = 0, B(t+1) = 1 S0 S1 S1: A ١٥ = 0, B = 1 Example Input equations: T A = Bx, T B = x Output equation: y = AB ١٦
Input equations: T A = Bx, T B = x Output equation: y = AB ١٧ Input equations: T A = Bx, T B = x Output equation: y = AB Characteristic equation: Q(t+1) = T Q A(t+1) = (T A A) = (Bx A) = (Bx) A + (Bx)A = AB + Ax + A Bx B(t+1) = (T B B) = (x B) ١٨
A(t+1) = (Bx A) B(t+1) = (x B) y = AB 00/0: A = 0, B = 0, y = 0 on x = 1: A(t+1) = 0, B(t+1) = 1, y = 0 00/0 01/0 on x = 0: A(t+1) = 0, B(t+1) = 0, y = 0 ١٩ 00/0 00/0 Mealy model and the Moore model The most general model of a sequential circuit has inputs, outputs, and internal states. It is customary to distinguish between two models of sequential circuits: the Mealy model and the Moore model. They differ only in the way the outputs is generated. In the Mealy model, the output is a function of both the present state and the input. In the Moore model, the output is a function of only the present state. ٢٠
٢١ The analysis of sequential circuits starts from a circuit diagram and culminates in a state table or diagram. The design (synthesis) of a sequential circuit starts from a set of specifications and culminates in a logic diagram. Two sequential circuits may exhibit the same input-output behavior, but have a different number of internal states (flipflops) in their state diagram. Reducing the number of internal states may simplify a design. The reduction in the number of flip-flops in a sequential circuit is referred to as state-reduction problem. ٢٢
If identical input sequences are applied to the two circuits and identical outputs occur for all input sequences, then the two circuits are said to be equivalent (as far as the input-out is concerned) and one may be replaced by the other. The problem of state reduction is to find ways of reducing the number of states in a sequential circuit without altering the input-output relationship. The following algorithm for the state reduction of a completely specified state table is given without proof: Two states are said to be equivalent if for each member of the set of inputs, they give exactly the same output and send the circuit either to the same state or to an equivalent state. ٢٣ When two states are equivalent one of them can be removed without altering the input-output relationship. ٢٤
٢٥ Stat e inpu t Next state outpu t a 0 a 0 a 1 b 0 b 0 C 0 c 1 D 0 d 0 E 0 e 1 F 1 f 1 F 1 f 0 G 0 g 1 F 1 f 0 G 0 g 0 f 0 ٢٦
Example final result Reduced state diagram ٢٧ State Reduction and Assignment In order to design a sequential circuit with physical components, it is necessary to assign unique coded binary values to the states. For a circuit with m states, the codes must contains n bits, where m 2 n. Unused states are treated as don t care conditions during the design Sometimes, the name transition table is used for a state table with a binary assignment. This convention distinguishes it from a state table with symbolic names for the states. ٢٨
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Design procedure Design procedures or methodologies specify hardware that will implement a desired behavior. The design effort for small circuits may be manual, but industry relies on automated synthesis tools for designing massive integrated circuits. The building block used by synthesis tools is the D flip-flop. Together with additional logic, it can implement the behavior of JK and T flip-flop. ٣١ The procedure for designing synchronous sequential circuits can be summarized by a list of recommended steps: 1. From specification of the desired operation, derive a state diagram for the circuit. 2. Reduce the number of states if necessary. 3. Assign binary values to the states. 4. Obtain the binary-coded state table (transition table). 5. Choose the type of flip-flops to be used. 6. Derive the simplified flip-flop input equations and output equations. 7. Draw the logic diagram. ٣٢
Example Specification: Suppose we wish to design a circuit that detects a sequence of three or more consecutive 1 s in a string of bits coming through an input line, if next input is 0 circuit return to initial state. If three or more consecutive 1 s in a string followed by 0 output is one then return to initial state. ٣٣ Specification: State diagram (no further reduction) ٣٤
Binary coded state table (Transition table): ٣٥ Synthesis using D flip-flops: the characteristic equations of T flip-flop, D flip-flop, and JK flip-flop specifies their next states as: Q(t+1) = T Q, Q(t+1) = D, and Q(t+1) = J Q + K Q, respectively. ٣٦
From Transition table: A(t + 1) = D A (A, B, x) = (3, 5, 7) B(t + 1) = D B (A, B, x) = (1, 5, 7) y(a, B, x) = (6, 7) ٣٧ A(t + 1) = D A (A, B, x) = (3, 5, 7) B(t + 1) = D B (A, B, x) = (1, 5, 7) y(a, B, x) = (6, 7) ٣٨
A(t + 1) = D A (A, B, x) = (3, 5, 7) B(t + 1) = D B (A, B, x) = (1, 5, 7) y(a, B, x) = (6, 7) ٣٩ A(t + 1) = D A (A, B, x) = (3, 5, 7) B(t + 1) = D B (A, B, x) = (1, 5, 7) y(a, B, x) = (6, 7) ٤٠
٤١ Design procedure excitation tables The design of a sequential circuit with flip-flops other than the D type flip-flop is complicated by the fact that the input equations for the circuit must be derived indirectly from the state table. When D type flip-flop are employed, the input equations are obtained directly from the state table. This is not the case for the JK and T types of flip-flops (refer to the characteristic equations Q(t+1) = T Q, Q(t+1) = D, and Q(t+1) = JQ + K Q, ). ٤٢
In order to determine the input equations for these flip- flops, it is necessary to derive a functional relationship between the state table and the input equations. A table called excitation table lists the required inputs for a given change of state. ٤٣ ٤٤
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٥١ Design a three bit binary counter. ٥٢
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٥٧ Thanks,.. ٥٨ Dr. Ahmed ElShafee, ACU : Spring 2018, CSE303 Logic design II