EE 23 Lecture 3 THE MOS TRANSISTOR Model Simplifcations THE Bipolar Junction TRANSISTOR
Quiz 3 Determine I X. Assume W=u, L=2u, V T =V, uc OX = - 4 A/V 2, λ=
And the number is? 3 8 5 2? 6 4 9 7
Quiz 3 (solution) Determine I X. Assume W=u, L=2u, V T =V, uc OX = - 4 A/V 2, λ= I G = V V GS T W V = < L 2 W 2 μc ( V V ) ( + λv ) V V V V V 2L DS I μc V V V V V V V V D OX GS T DS GS T DS GS T OX GS T DS GS T DS GS T Cutoff Triode Saturation Guess Saturation: W I = μc V V 2L ( ) 2 D OX GS T V V V > V V GS T DS GS T
Quiz 3 (solution) Determine I X. Assume W=u, L=2u, V T =V, uc OX = - 4 A/V 2, λ= Guess Saturation: W I = μc ( V V ) 2 D OX GS T 2L V V V > V V GS T DS GS T u I = 2 D 2 2u I D ( ) 4 2 = 25. ma 2V V 7V > 2V V
Review from Last Time: n-channel MOSFET Operation and Model V DS V GS I D V BS I B I G (V BS small) Saturation region of operation Inversion layer disappears near drain Saturation first occurs when V DS =V GS -V T I D =? I G = I B =
Review from Last Time: Transistor Size Comparison with 24AWG Copper Cable (Drawn to scale) State of Art transistor dimensions about 2 times smaller (lateral) than μ fiber The gates of about 4 transistors can be placed on the cross-section of this fiber (maybe only 4 transistors)
Review from Last Time: MOS Transistors I= G Standard square-law model V <V GS T μ C W V L 2 2L n OX DS I= V -V V V V V V -V D GS T DS GS T DS GS T μ C W 2 n OX ( V ) ( ) GS -V T +λv DS V GS V T V DS > V GS -V T μ C n OX λ. V T W/L V -4 A V.5V to 3V varies by design 2
Review from Last Time: MOS Transistors p-channel MOSFET I= G Standard square-law model V <V GS T μ C W V L 2 2L p OX DS I= V -V V V V V V -V D GS T DS GS T DS GS T μ C W 2 p OX ( V ) ( ) GS -V T +λv DS V GS V T V DS < V GS -V T V T < I D V DS
Review from Last Time: MOS Transistor Models simplifications I= G I= V <V D GS T V = V V DS GS T Equivalent Circuit Models D D D S S G GS T GS T S
Review from Last Time: MOS Transistor Models simplifications V DS I= G I= V > V D GS T V = V V DS GS T I D Equivalent Circuit Models
Review from Last Time: MOS Transistor Models simplifications I= G V <V GS T I= D V DS V V GS T RFET R FET L V -V μc W GS T OX Better Switch-level dc model good enough for predicting basic operation of many digital circuits and can be used to predict speed performance if parasitic capacitances are added
Review from Last Time: MOS Transistor Models Voltage Variable Resistor (VVR) operation D V CONT FET S R FET L V -V μc W GS T OX Analog application of MOSFET in triode region
Review from Last Time: Voltage Variable Resistor R 2 A =+ V R R2 A=+ V R Applications include Automatic Gain Control (AGC) R FET FET L V -V μc W GS T OX
MOS Transistor Models simplifications I D V GS6 V GS5 V GS4 V GS3 V GS2 I= G μc W 2L 2 ( ) ( ) OX I= V -V +λv D GS T DS Can often assume λ= Saturation V GS V DS Saturation Region Model used for many analog applications
MOS Transistor Models simplifications I= G μc W 2 ( ) 2L Saturation OX I= V -V D GS T With λ= Saturation Region Model good enough for many analog applications
MOS Transistor Models simplifications μc W OX V GS -V T +λv DS 2L 2 ( ) ( ) Saturation Region Model good enough for many analog applications
MOS Transistor Models (Summary)
MOS Transistor Models (Summary) μc W OX V -V +λv 2L ( 2 ) ( ) GS T DS D V CONT FET S
MOS Transistor Applications (Digital Circuits) Assume ~ V H = V DD > V T Assume ~ V L = V < V T MOSFET Model I= G I= V <V D GS T V = V V DS GS T Assume V T ~V DD /5
MOS Transistor Applications (Digital Circuits) R V DD Assume ~ V H = V DD > V T Assume ~ V L = V < V T X M I= V <V D GS T V = V V DS GS T Assume V T ~V DD /5 If ~ X= V DD, V DS = V so = V ~ If ~ X= V, I D = A so =V DD -I D R = V DD ~ So this circuit performs as a Boolean inverter Assume ~ V L < V T Assume ~ V H > V T X Truth Table
MOS Transistor Applications (Digital Circuits) V DD R Assume ~ V H = V DD > V T Assume ~ V L = V < V T A B 2 MOSFET Model I= G I= V <V D GS T V = V V DS GS T Assume V T ~V DD /5
MOS Transistor Applications (Digital Circuits) V DD R Assume ~ V H = V DD > V T Assume ~ V L = V < V T A B 2 I= V <V D GS T V = V V DS GS T Assume V T ~V DD /5 If ~ A= V DD, ~ B= V V DD, DS =V DS2 = V so = V ~ If ~ A= V DD, ~ B= V V, DS = V (and I D2 =A) so = V ~ If ~ A= V, ~ B= V DD, V DS2 = V (and I D =A) so = V ~ If ~ A= V, ~ B= V, I D2 = A and I D =A so I R =A, thus = V DD = I R R=V DD ~
A B MOS Transistor Applications (Digital Circuits) R V DD 2 A B Truth Table If ~ A= V DD, ~ B= V V DD, DS =V DS2 = V so = V ~ If ~ A= V DD, ~ B= V, V DS = V (and I D2 =A) so = V ~ If ~ A= V, ~ B= V DD, V DS2 = V (and I D =A) so = V ~ If ~ A= V, ~ B= V, I D2 = A and I D =A so I R =A, thus = V DD = I R R=V DD ~ 2-input NOR Gate
MOS Transistor Applications (Digital Circuits) V DD R Assume ~ V H = V DD > V T Assume ~ V L = V < V T A M B M 2 I= V <V D GS T V = V V DS GS T Assume V T ~V DD /5 If ~ A= V DD, ~ B= V V DD, DS =V DS2 = V so =V ~ If ~ A= V DD, If ~ A= V, If ~ A= V, ~ B= V V, DS = V and I D2 =A so I R =A thus =V DD -I R R= V DD ~ ~ B= V V DD, DS2 = V and I D =A so I R =A thus =V DD -I R R= V DD ~ ~ B= V, I D = A and I D2 =A so I R =A thus =V DD -I R R= V DD ~
V DD R A M B M 2 MOS Transistor Applications (Digital Circuits) A B Truth Table If ~ A= V DD, ~ B= V V DD, DS =V DS2 = V so =V ~ If ~ A= V DD, If ~ A= V, If ~ A= V, ~ B= V V, DS = V and I D2 =A so I R =A thus =V DD -I R R= V DD ~ ~ B= V V DD, DS2 = V and I D =A so I R =A thus =V DD -I R R= V DD ~ ~ B= V I, D = A and I D2 =A so I R =A thus =V DD -I R R= V DD ~ 2-input NAND Gate
MOS Transistor Applications (Digital Circuits) V DD V DD R R A M A B 2 B M 2 A B A B Can be extended to arbitrary number of inputs But the resistor is not practically available in most processes and static power dissipation is too high
MOS Transistor Applications (Digital Circuits) DD X 2 Assume ~ V H = V DD Assume ~ V L = V MOSFET Models
MOS Transistor Applications (Digital Circuits) DD 2 Assume ~ V H = V DD X Assume ~ V L = V MOSFET Models Assume V T ~V DD /5 n-channel device Assume V T2 ~ - V DD /5 p-channel device
MOS Transistor Applications (Digital Circuits) DD DD 2 2 X X ~ V H = V DD ~ V L = V If X=V DD, then V GS =V DD >V T, V GS2 = > V T2 S closed, S 2 open = V~
MOS Transistor Applications (Digital Circuits) DD DD 2 2 X X ~ V H = V DD ~ V L = V If X=V, then V GS =V<V T, V GS2 =-V DD < V T2 S 2 closed, S open = V DD ~
MOS Transistor Applications (Digital Circuits) DD X X 2 Truth Table Performs as a digital inverter
MOS Transistor Applications (Digital Circuits) DD A 4 3 A B B 2 Truth Table Performs as a 2-input NOR Gate Can be easily extended to an n-input NOR Gate
MOS Transistor Applications (Digital Circuits) DD A B 3 4 2 Truth Table Performs as a 2-input NAND Gate Can be easily extended to an n-input NAND Gate A B
MOS Transistor Applications (Digital Circuits) DD DD X M 2 A M 3 M 4 M M B M 2 Termed CMOS Logic Widely used in industry today (millions of transistors in many ICs using this logic Almost never used as discrete devices
Bipolar Transistor B: Base C: Collector E: Emitter
Bipolar Transistor npn pnp
Bipolar Transistor npn pnp p-type silicon n-type silicon
Vertical npn BJT Base Emitter Collector n+ buried collector implant Buried collector Vertical npn BJT
Lateral pnp BJT BE E C CB Lateral pnp BJT
Bipolar Transistor I C I B5 npn I B4 I B3 I B2 I B V CE
Bipolar Transistor C I C B I B V CE V BE E pnp
Bipolar Transistor C B E C npn CE
Bipolar Transistor C npn CE Most analog or linear applications based upon Forward Active region Most digital applications involve Saturation and Cutoff regions and switching between these regions as the Boolean value changes states
Bipolar and MOS Region Comparisons I C Saturation Forward Active V CE MOSFET BJT Cutoff Cutoff Saturation Triode Cutoff Forward Active Saturation
Bipolar Transistor I C I B5 I B4 I B3 I B2 I B V CE npn
Bipolar Transistor Multi-Region Model I βi V + = CE C B VAF JSA I B = β E e V BE V t V BE >.4V V BC < Forward Active V t = kt q V BE =.7V V CE =.2V I C <βi B Saturation I C =I B = V BE < V BC < Cutoff
Bipolar Transistor I C I B5 I B4 I B3 I B2 I B V CE npn C CE
Bipolar Transistor I C = βi JSA I B = β V t = kt q B E e V BE V t Simplifier Basic Multi-Region Model V BE >.4V V BC < Forward Active V BE =.7V V CE =.2V I C <βi B Saturation I C =I B = V BE < V BC < Cutoff
End of Lecture 3