Introduction to Digital Logic Missouri S&T University CPE 2210 Multiplexers/Demultiplexers

Similar documents
Introduction to Digital Logic Missouri S&T University CPE 2210 Subtractors

Introduction to Digital Logic Missouri S&T University CPE 2210 Combinatorial Circuit Analysis and Synthesis

Introduction to Digital Logic Missouri S&T University CPE 2210 Boolean Algebra

Introduction to Digital Logic Missouri S&T University CPE 2210 Boolean Representations

Introduction to Digital Logic Missouri S&T University CPE 2210 PLDs

Introduction to Digital Logic Missouri S&T University CPE 2210 Karnaugh Maps

Combinational Logic Design Combinational Functions and Circuits

Introduction to Digital Logic Missouri S&T University CPE 2210 Number Systems

CS61C : Machine Structures

ECE 545 Digital System Design with VHDL Lecture 1. Digital Logic Refresher Part A Combinational Logic Building Blocks

ECE 545 Digital System Design with VHDL Lecture 1A. Digital Logic Refresher Part A Combinational Logic Building Blocks

CS61C : Machine Structures

Chapter 4. Combinational: Circuits with logic gates whose outputs depend on the present combination of the inputs. elements. Dr.

Combinatorial Logic Design Multiplexers and ALUs CS 64: Computer Organization and Design Logic Lecture #13

ELCT201: DIGITAL LOGIC DESIGN


Combinational Logic. Mantıksal Tasarım BBM231. section instructor: Ufuk Çelikcan

IT T35 Digital system desigm y - ii /s - iii

Fundamentals of Digital Design

Digital Logic: Boolean Algebra and Gates. Textbook Chapter 3

XI STANDARD [ COMPUTER SCIENCE ] 5 MARKS STUDY MATERIAL.

Review for Final Exam

Design of Sequential Circuits

SAU1A FUNDAMENTALS OF DIGITAL COMPUTERS

Introduction to Digital Logic Missouri S&T University CPE 2210 Number Systems

Digital Logic. CS211 Computer Architecture. l Topics. l Transistors (Design & Types) l Logic Gates. l Combinational Circuits.

Logic. Combinational. inputs. outputs. the result. system can

COMBINATIONAL LOGIC CIRCUITS. Dr. Mudathir A. Fagiri

Systems I: Computer Organization and Architecture

CSE 140 Lecture 11 Standard Combinational Modules. CK Cheng and Diba Mirza CSE Dept. UC San Diego

課程名稱 : 數位邏輯設計 P-1/ /6/11

Combinatorial Logic Design Principles

Combinational Logic. Lan-Da Van ( 范倫達 ), Ph. D. Department of Computer Science National Chiao Tung University Taiwan, R.O.C.

CS/COE1541: Introduction to Computer Architecture. Logic Design Review. Sangyeun Cho. Computer Science Department University of Pittsburgh

Computer Science. 19. Combinational Circuits. Computer Science COMPUTER SCIENCE. Section 6.1.

BOOLEAN ALGEBRA. Introduction. 1854: Logical algebra was published by George Boole known today as Boolean Algebra

University of Guelph School of Engineering ENG 2410 Digital Design Fall There are 7 questions, answer all questions.

Adders allow computers to add numbers 2-bit ripple-carry adder

Combinational Logic. Jee-Hwan Ryu. School of Mechanical Engineering Korea University of Technology and Education

COMBINATIONAL LOGIC FUNCTIONS

Combinational Logic. Lan-Da Van ( 范倫達 ), Ph. D. Department of Computer Science National Chiao Tung University Taiwan, R.O.C.

Contents. Chapter 3 Combinational Circuits Page 1 of 36

CS/COE0447: Computer Organization

Adders, subtractors comparators, multipliers and other ALU elements

Digital System Design Combinational Logic. Assoc. Prof. Pradondet Nilagupta

We are here. Assembly Language. Processors Arithmetic Logic Units. Finite State Machines. Circuits Gates. Transistors

Digital Logic Appendix A

Digital Electronics Circuits 2017

Electronics. Overview. Introducction to Synthetic Biology

Logic design? Transistor as a switch. Layered design approach. CS/COE1541: Introduction to Computer Architecture. Logic Design Review.

Chapter 3 Digital Logic Structures

Department of Electrical & Electronics EE-333 DIGITAL SYSTEMS

Boolean Algebra, Gates and Circuits

CprE 281: Digital Logic

PG - TRB UNIT-X- DIGITAL ELECTRONICS. POLYTECHNIC-TRB MATERIALS

CS/COE0447: Computer Organization

Sequential Logic. Rab Nawaz Khan Jadoon DCS. Lecturer COMSATS Lahore Pakistan. Department of Computer Science

211: Computer Architecture Summer 2016

Boolean Algebra. Digital Logic Appendix A. Postulates, Identities in Boolean Algebra How can I manipulate expressions?

Adders, subtractors comparators, multipliers and other ALU elements

Section 3: Combinational Logic Design. Department of Electrical Engineering, University of Waterloo. Combinational Logic

SIR C.R.REDDY COLLEGE OF ENGINEERING ELURU DIGITAL INTEGRATED CIRCUITS (DIC) LABORATORY MANUAL III / IV B.E. (ECE) : I - SEMESTER

Appendix B. Review of Digital Logic. Baback Izadi Division of Engineering Programs

Adders - Subtractors

UNIVERSITY OF BOLTON SCHOOL OF ENGINEERING BENG (HONS) ELECTRICAL & ELECTRONICS ENGINEERING EXAMINATION SEMESTER /2017

Floating Point Representation and Digital Logic. Lecture 11 CS301

ELCT201: DIGITAL LOGIC DESIGN

DIGITAL TECHNICS. Dr. Bálint Pődör. Óbuda University, Microelectronics and Technology Institute

( c) Give logic symbol, Truth table and circuit diagram for a clocked SR flip-flop. A combinational circuit is defined by the function

CHAPTER1: Digital Logic Circuits Combination Circuits

Logic and Computer Design Fundamentals. Chapter 8 Sequencing and Control

Combinational Logic Design Principles

Boolean Algebra. Digital Logic Appendix A. Boolean Algebra Other operations. Boolean Algebra. Postulates, Identities in Boolean Algebra

CSC9R6 Computer Design. Practical Digital Logic

Digital Logic Design ENEE x. Lecture 14

Principles of Computer Architecture. Appendix B: Reduction of Digital Logic. Chapter Contents

ENGIN 112 Intro to Electrical and Computer Engineering

Boolean Algebra and Digital Logic 2009, University of Colombo School of Computing

Lecture 7: Logic design. Combinational logic circuits

A crash course in Digital Logic

Logic. Basic Logic Functions. Switches in series (AND) Truth Tables. Switches in Parallel (OR) Alternative view for OR


A B D 1 Y D 2 D 3. Truth table for 4 to 1 MUX: A B Y 0 0 D D D D 3

Menu. 7-Segment LED. Misc. 7-Segment LED MSI Components >MUX >Adders Memory Devices >D-FF, RAM, ROM Computer/Microprocessor >GCPU

Digital Circuit And Logic Design I. Lecture 3

Sample Test Paper - I

Chapter 4: Combinational Logic Solutions to Problems: [1, 5, 9, 12, 19, 23, 30, 33]

CSE140: Components and Design Techniques for Digital Systems. Decoders, adders, comparators, multipliers and other ALU elements. Tajana Simunic Rosing

CS470: Computer Architecture. AMD Quad Core

CMPE12 - Notes chapter 2. Digital Logic. (Textbook Chapters and 2.1)"

ELECTRONICS & COMMUNICATION ENGINEERING PROFESSIONAL ETHICS AND HUMAN VALUES

Number System. Decimal to binary Binary to Decimal Binary to octal Binary to hexadecimal Hexadecimal to binary Octal to binary

Overview. Arithmetic circuits. Binary half adder. Binary full adder. Last lecture PLDs ROMs Tristates Design examples

CMSC 313 Lecture 18 Midterm Exam returned Assign Homework 3 Circuits for Addition Digital Logic Components Programmable Logic Arrays

VHDL DESIGN AND IMPLEMENTATION OF C.P.U BY REVERSIBLE LOGIC GATES

Design at the Register Transfer Level

Unit II Chapter 4:- Digital Logic Contents 4.1 Introduction... 4

Philadelphia University Student Name: Student Number:

ECE 448 Lecture 6. Finite State Machines. State Diagrams, State Tables, Algorithmic State Machine (ASM) Charts, and VHDL Code. George Mason University

Combinational Logic. By : Ali Mustafa

Transcription:

Introduction to Digital Logic Missouri S&T University CPE 2210 Multiplexers/Demultiplexers Egemen K. Çetinkaya Department of Electrical & Computer Engineering Missouri University of Science and Technology cetinkayae@mst.edu http://web.mst.edu/~cetinkayae/teaching/cpe2210spring2018 2 April 2018 rev. 18.0 2014 2018 Egemen K. Çetinkaya

Introduction Multiplexers Multiplexers/Demultiplexers Outline Demultiplexers Summary 2

Digital Logic Systems Overview Combinatorial logic circuits for no memory systems Boolean algebra to mathematically design/analyze logic gates are building blocks Sequential logic circuits for memory systems Finite State Machines to mathematically design/analyze flip-flops and latches store memory flip-flops and latches are building blocks of sequential logic Sequential logic circuits (aka controllers) combine combinatorial circuits storage elements (e.g. registers) 3

Digital Systems Components analog phenomena electric signal A2D digital data digital data sensors and other inputs Digital System D2A electric signal actuators and other outputs digital data digital data Transducer: sensor + actuator Not all sensors/actuators require A2D/D2A conversion Digital system can be implemented: microprocessor readily available, cheap, easy to program, easy to reprogram custom circuit smaller, faster, consume less power 4

Digital Systems Paths Digital systems have two paths: datapath circuit control circuit Datapath circuit store data manipulate data transfer data from one part to another Control circuit controls the operation of datapath circuit 5

Adders Subtractors Comparators Datapath Components Building Block examples ALUs: Arithmetic Logic Units Registers Shifters Multiplexer/demultiplexers Encoders/decoders Counters/timers 6

Multiplexers Overview Multiplex n data inputs onto a single data output under control of the select inputs MUX for short 7

Demultiplexers Overview Places single data input onto multiple data outputs DEMUX for short 8

Multiplexers/Demultiplexers Application Area In communication (e.g. routers, switches) Cost efficient use of channel [ref: https://en.wikipedia.org/wiki/multiplexer] 9

2-Input Multiplexer Example Truth Table Output depends on select control input s w 0 w 1 f s w 0 w 1 0 1 f 10

2-Input Multiplexer Example Truth Table Output depends on select control input s w 0 w 1 0 1 f s w 0 w 1 f 0 0 0 0 0 0 1 0 0 1 0 1 0 1 1 1 1 0 0 0 1 0 1 1 1 1 0 0 1 1 1 1 11

2-Input Multiplexer Example Truth Table Output depends on select control input s w 0 w 1 f 0 0 0 0 s f s 0 0 1 0 0 1 0 1 0 w 0 1 w 1 w 0 w 1 0 1 f 0 1 1 1 1 0 0 0 w 0 1 0 1 1 1 1 0 0 1 1 1 1 s w 1 f 12

4-Input Multiplexer Example Truth Table Output depends on select control input s 0 s 0 s 1 s 0 f s 1 w 0 s 1 w 0 00 w 1 01 w 2 w 3 10 11 f 0 0 w 0 0 1 w 1 1 0 w 2 w 1 w 2 f 1 1 w 3 w 3 13

4-Input Multiplexer Example Cascading Can we build 4-to-1 multiplexer using 2-to-1 multiplexers? 14

4-Input Multiplexer Example Cascading We can build 4-to-1 multiplexer using 2-to-1 multiplexers s 1 s 0 w 0 w 1 0 1 0 1 f w 2 w 3 0 1 15

16-to-1 Multiplexer Example Cascading via 4-to-1 Multiplexers s 0 s 1 w 0 w 3 w 4 w 7 w 8 s 2 s 3 f w 11 w 12 w 15 16

Multiplexers Number of Control Inputs For n inputs, how many control inputs are needed? 17

Multiplexers Number of Control Inputs For n inputs, how many control inputs are needed? Answer: log 2 (n) For 2 input 1 control, for 4 input 2 control is needed 18

Logic Design via Multiplexers 2-to-1 Multiplexer Logic What is Boolean expression for 2-to-1 multiplexer? s I 0 I 1 0 1 f s I 0 I 1 f 0 0 0 0 0 0 1 0 0 1 0 1 0 1 1 1 1 0 0 0 1 0 1 1 1 1 0 0 1 1 1 1 s f 0 I 0 1 I 1 19

Logic Design via Multiplexers 2-to-1 Multiplexer Logic The Boolean expression for 2-to-1 multiplexer is: s I 0 I 1 0 1 f s I 0 I 1 f 0 0 0 0 0 0 1 0 0 1 0 1 0 1 1 1 1 0 0 0 1 0 1 1 1 1 0 0 1 1 1 1 s f 0 I 0 1 I 1 f = s I 0 + si 1 20

Logic Design via Multiplexers 4-to-1 Multiplexer Logic What is Boolean expression for 4-to-1 multiplexer? x y I 0 00 I1 01 I 2 I 3 10 11 f x y f 0 0 I 0 0 1 I 1 1 0 I 2 1 1 I 3 21

Logic Design via Multiplexers 4-to-1 Multiplexer Logic The Boolean expression for 4-to-1 multiplexer is: x y x y f I 0 00 I1 01 I 2 I 3 10 11 f 0 0 I 0 0 1 I 1 1 0 I 2 f = x y I 0 + x yi 1 + xy I 2 + xyi 3 1 1 I 3 22

Logic Design via Multiplexers 8-to-1 Multiplexer Logic What is Boolean expression for 8-to-1 multiplexer? x y z f 0 0 0 I 0 0 0 1 I 1 0 1 0 I 2 0 1 1 I 3 1 0 0 I 4 1 0 1 I 5 1 1 0 I 6 1 1 1 I 7 23

Logic Design via Multiplexers 8-to-1 Multiplexer Logic The Boolean expression for 8-to-1 multiplexer is: x y z f 0 0 0 I 0 0 0 1 I 1 0 1 0 I 2 0 1 1 I 3 f = x y z I 0 + x y zi 1 + x yz I 2 + x yzi 3 + xy z I 4 + xy zi 5 + xyz I 6 + xyzi 7 1 0 0 I 4 1 0 1 I 5 1 1 0 I 6 1 1 1 I 7 24

Logic Design via Multiplexers 8-to-1 Multiplexer Example Implement the minterm canonical formula: f (x,y,z) = (0,2,3,5) using 8-to-1 mux 25

Logic Design via Multiplexers 8-to-1 Multiplexer Example Implement f (x,y,z) = (0,2,3,5) using 8-to-1 mux x y z f 0 0 0 1 0 0 1 0 0 1 0 1 0 1 1 1 1 0 0 0 1 0 1 1 1 1 0 0 1 1 1 0 26

Logic Design via Multiplexers 8-to-1 Multiplexer Example Implement f (x,y,z) = (0,2,3,5) using 8-to-1 mux x y z f 0 0 0 1 0 0 1 0 0 1 0 1 0 1 1 1 1 0 0 0 1 0 1 1 1 1 0 0 1 1 1 0 27

Logic Design via Multiplexers 8-to-1 Multiplexer Logic Consider the Boolean expression for 8-to-1 mux: f = x y z I 0 + x y zi 1 + x yz I 2 + x yzi 3 + xy z I 4 + xy zi 5 + xyz I 6 + xyzi 7 8-to-1 mux Boolean expression can be simplified to: f = x y (z I 0 + zi 1 ) + x y(z I 2 + zi 3 ) + xy (z I 4 + zi 5 ) + xy(z I 6 + zi 7 ) Consider the 4-to-1 mux Boolean expression: f = x y I 0 + x yi 1 + xy I 2 + xyi 3 Any similarity between 4-to-1 and 8-to-1 mux? Can we implement 3-variable func. using 4-to-1 mux? 28

Logic Design via Multiplexers 8-to-1 Multiplexer Logic 8-to-1 mux Boolean expression can be simplified to: f = x y (z I 0 + zi 1 ) + x y(z I 2 + zi 3 ) + xy (z I 4 + zi 5 ) + xy(z I 6 + zi 7 ) Consider the 4-to-1 mux Boolean expression: f = x y I 0 + x yi 1 + xy I 2 + xyi 3 We can implement 3-variable func. using 4-to-1 mux 29

Logic Design via Multiplexers 8-to-1 Multiplexer Example Implement f (x,y,z) = (0,2,3,5) by 4-to-1 mux x y z f 0 0 0 1 0 0 1 0 0 1 0 1 0 1 1 1 1 0 0 0 1 0 1 1 1 1 0 0 1 1 1 0 f = x y (z I 0 + zi 1 ) + x y(z I 2 + zi 3 ) + xy (z I 4 + zi 5 ) + xy(z I 6 + zi 7 ) 30

Logic Design via Multiplexers 8-to-1 Multiplexer Example Implement f (x,y,z) = (0,2,3,5) by 4-to-1 mux x y z f 0 0 0 1 0 0 1 0 0 1 0 1 0 1 1 1 1 0 0 0 1 0 1 1 1 1 0 0 1 1 1 0 f = x y (z I 0 + zi 1 ) + x y(z I 2 + zi 3 ) + xy (z I 4 + zi 5 ) + xy(z I 6 + zi 7 ) f = x y (z 1 + z0) + x y(z 1 + z1) + xy (z 0 + z1) + xy(z 0 + z0) 31

Logic Design via Multiplexers 8-to-1 Multiplexer Example Implement f (x,y,z) = (0,2,3,5) by 4-to-1 mux x y z f 0 0 0 1 0 0 1 0 0 1 0 1 0 1 1 1 1 0 0 0 1 0 1 1 1 1 0 0 1 1 1 0 f = x y (z I 0 + zi 1 ) + x y(z I 2 + zi 3 ) + xy (z I 4 + zi 5 ) + xy(z I 6 + zi 7 ) f = x y (z 1 + z0) + x y(z 1 + z1) + xy (z 0 + z1) + xy(z 0 + z0) f = x y (z ) + x y(z + z) + xy (z) + xy(0) f = x y (z ) + x y(1) + xy (z) + xy(0) 32

Logic Design via Multiplexers 8-to-1 Multiplexer Example Implement f (x,y,z) = (0,2,3,5) by 4-to-1 mux x y z f 0 0 0 1 0 0 1 0 0 1 0 1 0 1 1 1 1 0 0 0 1 0 1 1 1 1 0 0 1 1 1 0 f = x y (z I 0 + zi 1 ) + x y(z I 2 + zi 3 ) + xy (z I 4 + zi 5 ) + xy(z I 6 + zi 7 ) f = x y (z 1 + z0) + x y(z 1 + z1) + xy (z 0 + z1) + xy(z 0 + z0) f = x y (z ) + x y(z + z) + xy (z) + xy(0) f = x y (z ) + x y(1) + xy (z) + xy(0) 33

Logic Design via Multiplexers 16-to-1 Multiplexer Example Implement f (w,x,y,z) = (0,1,5,6,7,9,12,15) using 8-to-1 mux at your leisure 34

Logic Design via Multiplexers 16-to-1 Multiplexer Example 8-to-1 mux implem. of f (w,x,y,z) = (0,1,5,6,7,9,12,15) 35

Multiplexers Multiplexers/Demultiplexers Summary multiplex n data inputs onto a single data output under control of the select inputs Demultiplexers places single data input onto multiple data outputs 36

References and Further Reading [V2011] Frank Vahid, Digital Design with RTL Design, VHDL, and Verilog, 2nd edition, Wiley, 2011. [G2003] Donald D. Givone, Digital Principles and Design, McGraw-Hill, 2003. [BV2009] Stephen Brown and Zvonko Vranesic, Fundamentals of Digital Logic with VHDL Design, 3rd edition, McGraw-Hill, 2009. [W2006] John F. Wakerly, Digital Design Principles and Practices, 4th edition, Prentice Hall, 2006. [S2017] John Seiffertt, Digital Logic for Computing, 1st edition, Springer, 2017. 37

End of Foils 38

2024 © sciencedocbox.com Privacy Policy | Terms of Service | Feedback