DIGITL ELECTRONIC SYSTEMS Digital electronic systems are designed to process voltage signals which change quickly between two levels. High Voltage Low time Fig. 1 digital signal LOGIC GTES The TTL digital devices used in the practical exercise operate on a 5V supply. One of the supply lines is at 0V (LOW) and the other at +5V (HIGH). Input and output voltage signals will always be near one of these two levels. Later on you will come across CMOS digital devices. These can be operated on any voltage supply providing it is between 3V and 18V. We shall be using the following convention to represent digital signal voltage levels: voltage levels near 0V (LOW) are represented by logic level 0. voltage levels near the positive supply level (HIGH) are represented by logic level 1. Logic gates are used to make decisions. The output signal level provided by a logic gate depends upon signal levels at its input. Fig 2 shows the symbol used for a 2-input ND gate. B Q Fig. 2 2-input ND gate n ND gate will only provide logic level 1 at its output when input ND input B are at logic level 1. 1
TRUTH TBLES The logic function of a gate can be represented by a truth table. truth table shows the logic state of the output for all possible settings of the inputs. The following truth tables represent the logic functions of 2-input and 3- input ND gates. Letters at the start of the alphabet are used to represent inputs while the letter Q is often used to represent the output. INPUTS OUTPUT INPUTS OUTPUT B Q C B Q 0 0 0 0 0 0 0 0 1 0 0 0 1 0 1 0 0 0 1 0 0 1 1 1 0 1 1 0 1 0 0 0 1 0 1 0 2-input ND gate 1 1 0 0 1 1 1 1 3-input ND gate Note the following points about truth tables: if a system has n inputs, they can be set in any one of 2 n ways e.g. the inputs for a 4-input gate can be set up in any one of 2 4 (16) ways. truth table for a 4-input gate would have 16 rows. the input state column is filled by counting from 0 to (2 n - 1) in binary. input has been placed on the right hand side of the columns representing the inputs. The reasons for this will become clearer when we investigate counter circuits. If you are not familiar with the binary numbering system, ask your tutor for assistance. 2
INTRODUCTION TO BOOLEN LGEBR Boolean algebra is a special form algebra which was developed for use in situations where the variables can only have one of two values. It has useful applications in the field of digital electronics where inputs and outputs can only take up values of 0 or 1. In Exercise 1 you will be investigating five types of logic gates. Let us now consider the use of Boolean algebra to represent their logic functions. 1. NOT GTE INPUT OUTPUT Q _ 0 1 Q = 1 0 Symbol Truth Table Boolean equation The truth table shows that the output of a NOT gate is a 1, when its input is NOT a 1. The bar over in the Boolean equation reads as NOT i.e. Q is a 1 if is NOT a 1. This type of gate is often referred to as an inverter. 2. ND GTE INPUTS OUTPUT B Q 0 0 0 0 1 0 1 0 0 1 1 1 Q =.B Symbol Truth Table Boolean equation The truth table shows that the output of a 2-input ND gate is a 1, if input ND input B are 1's. The. between and B in the Boolean equation is read as ND i.e. Q is a 1 if is a 1 ND B is a 1. 3
3. OR GTE INPUTS OUTPUT B Q 0 0 0 0 1 1 1 0 1 1 1 1 Q = + B Symbol Truth Table Boolean equation The truth table shows that the output of a 2-input OR gate is a 1, if input OR input B is a 1. The + sign between and B is read as OR i.e. Q is a 1 if input OR input B is a 1. NB In Boolean algebra, the. and the + signs take on a totally different meanings to those in arithmetic. In Boolean notation, ( + B) does not mean plus B. 4. NND (NOT-ND) GTE INPUTS OUTPUT B Q 0 0 1 0 1 1 1 0 1 1 1 0 Q =.B Symbol Truth Table Boolean equation Compare the symbol for the NND gate with that for an ND gate. The circle is used to indicate that the output of a NND gate is the inverse of that for an ND gate. The truth table shows that the output of a 2-input NND gate is NOT a 1, i.e. a 0, if input ND input B are 1's. The. between and B is again read as ND and the bar as NOT, i.e. Q is a NOT a 1 if ND B are 1's. 4
5. NOR (NOT-OR) GTE INPUTS OUTPUT B Q 0 0 1 0 1 0 1 0 0 1 1 0 Q = + B Symbol Truth Table Boolean equation The circle on the symbol shows that this type of gate provides an output which is the inverse of an OR gate. This should become clear if you compare their truth tables. The truth table shows that the output of a 2-input NOR gate is NOT a 1, if input OR input B is a 1. The + between the and B is read as OR and the bar as NOT i.e. Q is a NOT a 1 if OR B is a 1. 6. EXOR GTE The OR gate described on the previous page could be called an OR/ND gate. It provides an output at logic level 1 when input OR input B is a 1 and when input ND B are 1s. The full title for such a gate is an inclusive OR gate. n exclusive OR (EXOR) gate does not provide an output at logic level 1 when ND B are 1's. The symbol, truth table and Boolean equation for such a gate are shown below. INPUTS OUTPUT B Q 0 0 0 0 1 1 1 0 1 1 1 0 Q = + B Symbol Truth Table Boolean equation 5
7. EXNOR (NOT-EXOR) GTE INPUTS OUTPUT B Q 0 0 1 0 1 0 Q = + B 1 0 0 1 1 1 Symbol Truth Table Boolean equation The circle on the symbol shows that this type of gate provides an output, which is the inverse of an EXOR gate. n exclusive NOR (EXNOR) gate provides an output at logic level 1 when both inputs are at the same logic level either 0 or 1. The operation is the inverse of the EXOR gate. 6
INTEGRTED CIRCUIT PCKGES In the early days of logic control systems, relay operated mechanical switches were used to make up logic gates. Fig 3 shows how switches could be used to form ND and OR gates. Fig. 3a ND gate Fig. 3b OR gate Mechanical switches are too slow in their operation to meet the demands of modern, fast switching digital control systems. Their moving parts would also have a very limited life span. The logic gates are based upon transistor switches. The switching circuits are built on a tiny silicon chip which is mounted inside an insulator block. The complete unit is referred to as an Integrated Circuit (IC) package. Each package contains a number of identical logic gates. Connections to the gates are made through pins on each side of the block. Fig 4 shows how to identify pin numbers on a dual-in-line (DIL) package. 0.1" 14 8 Pin 1 Pin 1 7 Plan View End-on View Fig 4 DIL Integrated Circuit Package Pin 1 is indicated by a spot on the body of the package. It is the pin on the right when viewed from the notch end. djacent pins are 0.1 inch apart with 0.3 inch between opposite pins. 7
Data sheets are available which provide information about pin connections on IC packages. Pin connection diagrams for two of the IC packages you going to use are shown below. Vcc Vcc GND GND 7400 7404 Fig. 5 Pin connection diagrams DVNTGES OF INTEGRTED CIRCUIT PCKGES IC packages have the following advantages over circuits built from separate components. They are smaller cheaper, due to modern manufacturing techniques. easier to replace, if mounted in sockets. more robust. SCLE OF INTEGRTION Silicon chip technology has developed over the years resulting in more and more components being fitted into IC packages. The table refers to terms used to define scales of integration. SCLE NUMBER OF CTIVE COMPONENTS Small scale integration (SSI) less than 100 Medium scale integration (MSI) 100 to 1,000 Large scale integration (LSI) 1,000 to 10,000 Very large scale integration (VLSI) more than 10,000 8
TYPES OF LOGIC ICs VILBLE Two groups, or families, of digital integrated circuit packages are in common use. They are: Transistor-Transistor Logic (TTL) - these are available in the 74 series. Their identification numbers start with the numerals 74. Complementary Metal Oxide Semiconductors (CMOS) - available in the 4000 series. Their identification numbers start with a 4. The following table provides a comparison between standard TTL and CMOS packages. Later on we shall be considering sub-groups within each family. CMOS TTL SUPPLY VOLTGE 3V to 18V +5V (±0.25V) only INPUT LOGIC STTE 0 below 30% of V DD between 0V and 0.8V INPUT LOGIC STTE 1 above 70% of V DD between 2.0V and 5.0V WORKING FREQUENCY up to 4MHz up to 50MHz POWER CONSUMPTION about 0.1mW/gate about 10mW/gate Note that: the main advantage of TTL devices is their very high switching frequencies. They can only be operated on a 5V supply and are rather heavy on power demands. CMOS devices can be operated on a wide range of voltage supply and consume less power than TTL devices. 9
INFORMTION Logic gates make decisions based upon voltage levels applied at their inputs. The eight Logic Sources, located at the top left hand corner of the Master Board, provide suitable input signal levels. When a slide switch is set to the left, a voltage signal of 0V is provided at its socket. 0 1 0V (Logic State 0 ) When a slide switch is set to the right, a voltage signal of +5V is provided at its socket. 0 1 +5V (Logic State 1 ) The signal level at the output of a gate will depend upon the signal levels provided at its inputs. The output level can be monitored using any one of the eight Logic Monitors provided on the right hand side of the Master Board. If a signal within logic level band 0 is applied at the socket of a Logic Monitor, the indicator will be OFF. 0V Q 0 Q 0 If a signal within logic level band 1 is applied at the socket of a Logic Monitor, the indicator will be ON. +5V Q 0 Q 0 10
CTIVITY 1 The Experiments are designed of any type of logic gate experiment platform. The Power Supplies switch, should be set to the OFF position whenever you are: connecting boards on to the Power Supply Unit, changing Experiment Cards, setting up, or modifying, a circuit. We shall start this Exercise by investigating NOT gates. 1a. Set up the following arrangement using any one of the NOT gates on the experiment equipment: Wire Links are used to connect to a switch and Q to an output. Q 1b. Switch ON the Power Supplies. 1c. Use your arrangement to enable you to complete the following truth table for the NOT gate. INPUT () OUTPUT (Q) 0 1 1d. Set up the following arrangement of NOT gates then complete the truth table. INPUT () OUTPUT (Q) Q 0 1 11
CTIVITY 2 In this ctivity we shall be investigating 3-input and 4-input ND and OR gates. 2a. Set up the following arrangement. 3 switches are used to set logic levels at the inputs, B and C. B Q C 2b. Switch ON the Power Supplies switch. 2c. Use the arrangement to enable you to complete the following truth table for a 3-input ND gate. INPUTS OUTPUT C B Q 0 0 0 0 0 1 0 1 0 0 1 1 1 0 0 1 0 1 1 1 0 1 1 1 2d. Set up the following arrangement and check that it provides a three input ND gate. Remember to switch OFF the Power Supply while making changes to the circuit. B Q C 12
INFORMTION It is suggested that the following arrangement could be used to make up a 4-input ND gate. Two inputs on the 3-input gate have been linked together. B Q C D 2e. Set up the arrangement then use it to help you complete the following truth table. There are 16 settings of input switches to be considered! Remember to switch OFF the Power Supplies switch while making changes. INPUTS OUTPUT D C B Q 0 0 0 0 0 0 0 1 0 0 1 0 0 0 1 1 0 1 0 0 0 1 0 1 0 1 1 0 0 1 1 1 1 0 0 0 1 0 0 1 1 0 1 0 1 0 1 1 1 1 0 0 1 1 0 1 1 1 1 0 1 1 1 1 2f. Study the truth table and decide whether or not it represents a 4-input ND gate. 13
2g. Set up an arrangement which will enable you to complete the truth table for a 3-input OR gate. INPUTS OUTPUT INPUTS OUTPUT C B Q D C B Q 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 1 0 0 0 1 0 0 1 1 0 0 1 1 1 0 0 0 1 0 0 1 0 1 0 1 0 1 1 1 0 0 1 1 0 1 1 1 0 1 1 1 1 0 0 0 1 0 0 1 3-input OR gate 1 0 1 0 1 0 1 1 1 1 0 0 1 1 0 1 1 1 1 0 1 1 1 1 2h. Complete the following diagram by showing how you could use a 2-input OR gate and a 3-input OR gate to form a 4-input OR gate. NB Outputs must not be connected together. Inputs can be connected together provided they are not connected to different Logic Sources. Label the inputs, B, C and D, and the output Q. 2i. Set up a suitable arrangement so that you can complete the truth table for the 4-input OR gate. Study the truth table and decide whether or not it represents a 4-input OR gate. 14
CTIVITY 3 In this ctivity we shall be investigating 3-input NOR and NND gates. 3a. Set up the following arrangement. B Q 3b. Switch ON the Power Supplies switch on the base unit. 3c. Set the Logic Sources to the settings shown in the following table and complete the output column for the 3-input NOR gate. INPUTS OUTPUT B Q 0 0 0 1 1 0 1 1 15
3d. Set up the arrangement then use it to enable you complete the following truth table. Remember to switch OFF the Power Supplies switch while making changes. B Q C INPUTS OUTPUT C B Q 0 0 0 0 0 1 0 1 0 0 1 1 1 0 0 1 0 1 1 1 0 1 1 1 3e. Study the truth table and decide whether or not it represents a 3-input NND gate. 16
CTIVITY 4 In this ctivity we shall be investigating logic systems made up from a combination of different logic gates. 4a. Set up the following arrangement: B Q INPUTS OUTPUT B Q 0 0 0 1 1 0 1 1 4b. Switch ON the Power Supplies then complete the truth table. 4c. Study the truth table and decide what type of gate the arrangement forms. 4d. Set up the following arrangement. B Q INPUTS OUTPUT B Q 0 0 0 1 1 0 1 1 4e. Switch ON the Power Supplies then complete the truth table. 4f. Study the truth table and decide what type of gate the arrangement forms. 17
4g. Set up the following arrangement. B C Q 4h. Switch ON the Power Supplies then complete the truth table. INPUTS OUTPUT C B Q 0 0 0 0 0 1 0 1 0 0 1 1 1 0 0 1 0 1 1 1 0 1 1 1 4i. Study the truth table and decide what type of gate the arrangement forms. 18