M0EL07, M00EL07 5.0 V EL 2 Input XOR/XNOR The M0EL/00EL07 is a 2-input XOR/XNOR gate. The device is functionally equivalent to the E07 device with higher performance capabilities. With propagation delays and output transition times significantly faster than the E07, the EL07 is ideally suited for those applications which require the ultimate in performance. The 00 Series contains temperature compensation. Features 260 ps Propagation elay ES Protection: Human Body Model; >.0 KV Machine Model; > 00 V PEL Mode Operating Range: V = 4.2 V to 5.7 V with V EE = 0 V NEL Mode Operating Range: V = 0 V with V EE = 4.2 V to 5.7 V Internal Input Pulldown Resistors Meets or Exceeds JEE Spec EI/JES7 I Latchup Test Moisture Sensitivity Level For dditional Information, see pplication Note N003/ Flammability Rating: UL 94 V 0 @ 0.25 in, Oxygen Index: 2 to 34 Transistor ount = 47 devices 4 4 Pb Free Packages are vailable SOI SUFFIX SE 75 TSSOP T SUFFIX SE 94R FN MN SUFFIX SE 506 MRKING IGRMS* HEL07 LYW HL07 LYW 4P M KEL07 LYW KL07 LYW 2 M N 0 2 3 7 6 V Q Q H = M0 L = Wafer Lot K = M00 Y = Year 4P = M0 2 = M00 W = Work Week M = ate ode = ssembly Location = Pb Free Package (Note: Microdot may be in either location) *For additional marking information, refer to pplication Note N002/. N 4 5 V EE ORERING INFORMTION See detailed ordering and shipping information in the package dimensions section on page 6 of this data sheet. Figure. Logic iagram and Pinout ssignment Semiconductor omponents Industries, LL, 200 Publication Order Number: ugust, 200 Rev. 7 M0EL07/
M0EL07, M00EL07 Table. PIN ESRIPTION PIN FUNTION 0, EL ata Inputs Q, Q EL ata Outputs V Positive Supply V EE Negative Supply N No onnect EP (FN only) Thermal exposed pad must be connected to a sufficient thermal conduit. Electrically connect to the most negative supply (GN) or leave unconnected, floating open. Table 2. MXIMUM RTINGS Symbol Parameter ondition ondition 2 Rating Unit V PEL Mode Power Supply V EE = 0 V V V EE NEL Mode Power Supply V = 0 V V V I PEL Mode Input Voltage NEL Mode Input Voltage V EE = 0 V V = 0 V I out Output urrent ontinuous Surge V I V 6 V I V EE 6 T Operating Temperature Range 40 to +5 T stg Storage Temperature Range 65 to + J Thermal Resistance (Junction to mbient) 0 lfpm SOI 90 500 lfpm SOI 30 J Thermal Resistance (Junction to ase) Standard Board SOI 4 to 44 J Thermal Resistance (Junction to mbient) 0 lfpm 500 lfpm TSSOP TSSOP J Thermal Resistance (Junction to ase) Standard Board TSSOP 4 to 44 ± 5% J Thermal Resistance (Junction to mbient) 0 lfpm 500 lfpm FN FN 50 00 5 40 29 4 V V m m T sol Wave Solder Pb Pb Free <2 to 3 sec @ 24 <2 to 3 sec @ 260 265 265 J Thermal Resistance (Junction to ase) (Note ) FN 35 to 40 Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating onditions is not implied. Extended exposure to stresses above the Recommended Operating onditions may affect device reliability.. JEE standard multilayer board 2S2P (2 signal, 2 power) 2
M0EL07, M00EL07 Table 3. 0EL SERIES PEL HRTERISTIS V = 5.0 V; V EE = 0.0 V (Note 2) 40 25 5 Symbol haracteristic Min Typ Max Min Typ Max Min Typ Max Unit I EE Power Supply urrent 4 7 4 7 4 7 m V OH Output HIGH Voltage (Note 5) 3920 400 40 4020 405 490 4090 45 420 mv V OL Output LOW Voltage (Note 3) 3050 3200 3350 3050 320 3370 3050 3227 3405 mv V IH Input HIGH Voltage 3770 40 370 490 3940 420 mv V IL Input LOW Voltage 3050 3500 3050 3520 3050 3555 mv I IH Input HIGH urrent 0 I IL Input LOW urrent 0.5 0.5 0.3 NOTE: evice will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit 2. Input and output parameters vary : with V. V EE can vary +0.25 V / 0.5 V for +25 and +5 or V EE can vary +0.06 V / 0.5 V for 40. 3. Outputs are terminated through a 50 resistor to V 2.0 V. Table 4. 0EL SERIES NEL HRTERISTIS V = 0.0 V; V EE = 5.0 V (Note 4) 40 25 5 Symbol haracteristic Min Typ Max Min Typ Max Min Typ Max Unit I EE Power Supply urrent 4 7 4 7 4 7 m V OH Output HIGH Voltage (Note 5) 00 990 90 90 95 0 90 5 720 mv V OL Output LOW Voltage (Note 5) 950 00 650 950 790 630 950 773 595 mv V IH Input HIGH Voltage 230 90 30 0 060 720 mv V IL Input LOW Voltage 950 0 950 40 950 445 mv I IH Input HIGH urrent 0 I IL Input LOW urrent 0.5 0.5 0.3 NOTE: evice will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit 4. Input and output parameters vary : with V. V EE can vary +0.25 V / 0.5 V for +25 and +5. or V EE can vary +0.06 V / 0.5 V for 40. 5. Outputs are terminated through a 50 resistor to V 2.0 V. 3
M0EL07, M00EL07 Table 5. 00EL SERIES PEL HRTERISTIS V = 5.0 V; V EE = 0.0 V (Note 6) 40 25 5 Symbol haracteristic Min Typ Max Min Typ Max Min Typ Max Unit I EE Power Supply urrent 4 7 4 7 6 20 m V OH Output HIGH Voltage (Note 7) 395 3995 420 3975 4045 420 3975 4050 420 mv V OL Output LOW Voltage (Note 7) 370 3305 3445 390 3295 330 390 3295 330 mv V IH Input HIGH Voltage 335 420 335 420 335 420 mv V IL Input LOW Voltage 390 3525 390 3525 390 3525 mv I IH Input HIGH urrent 0 I IL Input LOW urrent 0.5 0.5 0.5 NOTE: evice will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit 6. Input and output parameters vary : with V. V EE can vary +0. V / 0.5 V. 7. Outputs are terminated through a 50 resistor to V 2.0 V. Table 6. 00EL SERIES NEL HRTERISTIS V = 0.0 V; V EE = 5.0 V (Note ) 40 25 5 Symbol haracteristic Min Typ Max Min Typ Max Min Typ Max Unit I EE Power Supply urrent 4 7 4 7 6 20 m V OH Output HIGH Voltage (Note 9) 05 005 0 025 955 0 025 955 0 mv V OL Output LOW Voltage (Note 9) 30 695 555 0 705 620 0 705 620 mv V IH Input HIGH Voltage 65 0 65 0 65 0 mv V IL Input LOW Voltage 0 475 0 475 0 475 mv I IH Input HIGH urrent 0 I IL Input LOW urrent 0.5 0.5 0.5 NOTE: evice will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit. Input and output parameters vary : with V. V EE can vary +0. V / 0.5 V. 9. Outputs are terminated through a 50 resistor to V 2.0 V. 4
M0EL07, M00EL07 Table 7. HRTERISTIS V = 5.0 V; V EE = 0.0 V or V = 0.0 V; V EE = 5.0 V (Note 0) 40 25 5 Symbol haracteristic Min Typ Max Min Typ Max Min Typ Max Unit f max Maximum Toggle Frequency > 2 GHz t PLH t PHL Propagation elay to Output 90 435 260 395 70 20 45 ps t JITTER Random lock Jitter 0.5 0.5 0.5 ps t r t f Output Rise/Fall Times Q (20% 0%) 00 225 350 00 225 350 00 225 350 ps NOTE: evice will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit 0.0 Series: V EE can vary +0.25 V / 0.5 V for +25 and +5. or V EE can vary +0.06 V / 0.5 V for 40. 00 Series: V EE can vary +0. V / 0.5 V. river evice Q Q Z o = 50 Z o = 50 Receiver evice 50 50 V TT V TT = V 3.0 V Figure 2. Typical Termination for Output river and evice Evaluation (See pplication Note N020/ Termination of EL Logic evices.) 5
M0EL07, M00EL07 ORERING INFORMTION evice Package Shipping M0EL07 SOI 9 Units / Rail M0EL07G SOI 9 Units / Rail M0EL07R2 SOI 0 / Tape & Reel M0EL07R2G SOI 0 / Tape & Reel M0EL07T TSSOP 00 Units / Rail M0EL07TG TSSOP 00 Units / Rail M0EL07TR2 TSSOP 0 / Tape & Reel M0EL07TR2G TSSOP 0 / Tape & Reel M0EL07MNR4 FN 000 / Tape & Reel M0EL07MNR4G FN 000 / Tape & Reel M00EL07 SOI 9 Units / Rail M00EL07G SOI 9 Units / Rail M00EL07R2 SOI 0 / Tape & Reel M00EL07R2G SOI 0 / Tape & Reel M00EL07T TSSOP 00 Units / Rail M00EL07TG TSSOP 00 Units / Rail M00EL07TR2 TSSOP 0 / Tape & Reel M00EL07TR2G TSSOP 0 / Tape & Reel M00EL07MNR4 FN 000 / Tape & Reel M00EL07MNR4G FN 000 / Tape & Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BR0/. Resource Reference of pplication Notes N405/ EL lock istribution Techniques N406/ esigning with PEL (EL at +5.0 V) N3/ ELinPS I/O SPiE Modeling Kit N4/ Metastability and the ELinPS Family N56/ Interfacing Between LVS and EL N672/ The EL Translator Guide N00/ Odd Number ounters esign N002/ Marking and ate odes N020/ Termination of EL Logic evices N066/ Interfacing with ELinPS N090/ haracteristics of EL evices 6
M0EL07, M00EL07 PKGE IMENSIONS X B Y 5 4 S 0.25 (0.00) M Y SOI NB SE 75 07 ISSUE H M K NOTES:. IMENSIONING N TOLERNING PER NSI Y4.5M, 92. 2. ONTROLLING IMENSION: MILLIMETER. 3. IMENSION N B O NOT INLUE MOL PROTRUSION. 4. MXIMUM MOL PROTRUSION 0.5 (0.006) PER SIE. 5. IMENSION OES NOT INLUE MBR PROTRUSION. LLOWBLE MBR PROTRUSION SHLL BE 0.27 (0.005) TOTL IN EXESS OF THE IMENSION T MXIMUM MTERIL ONITION. 6. 75 0 THRU 75 06 RE OBSOLETE. NEW STNR IS 75 07. Z H G 0.25 (0.00) M Z Y S X S SETING PLNE 0.0 (0.004) N X 45 M J MILLIMETERS INHES IM MIN MX MIN MX 4.0 5.00 0.9 0.97 B 3.0 4.00 0. 0.57.35.75 0.053 0.069 0.33 0.5 0.03 0.020 G.27 BS 0.050 BS H 0.0 0.25 0.004 0.00 J 0.9 0.25 0.007 0.00 K 0.40.27 0.06 0.050 M 0 0 N 0.25 0.50 0.00 0.020 S 5.0 6.20 0.22 0.244 SOLERING FOOTPRINT*.52 0.060 7.0 0.275 4.0 0.55 0.6 0.024.270 0.050 SLE 6: mm inches *For additional information on our Pb Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLERRM/. 7
M0EL07, M00EL07 PKGE IMENSIONS TSSOP T SUFFIX PLSTI TSSOP PKGE SE 94R 02 ISSUE 0.5 (0.006) T 0.5 (0.006) T L U U S 2X L/2 PIN IENT S 5 x K REF 0.0 (0.004) M T U S V S V 4 B U F 0.25 (0.00) M NOTES:. IMENSIONING N TOLERNING PER NSI Y4.5M, 92. 2. ONTROLLING IMENSION: MILLIMETER. 3. IMENSION OES NOT INLUE MOL FLSH. PROTRUSIONS OR GTE BURRS. MOL FLSH OR GTE BURRS SHLL NOT EXEE 0.5 (0.006) PER SIE. 4. IMENSION B OES NOT INLUE INTERLE FLSH OR PROTRUSION. INTERLE FLSH OR PROTRUSION SHLL NOT EXEE 0.25 (0.00) PER SIE. 5. TERMINL NUMBERS RE SHOWN FOR REFERENE ONLY. 6. IMENSION N B RE TO BE ETERMINE T TUM PLNE -W-. 0.0 (0.004) T SETING PLNE G ETIL E ETIL E W MILLIMETERS INHES IM MIN MX MIN MX 2.90 3.0 0.4 0.22 B 2.90 3.0 0.4 0.22 0.0.0 0.03 0.043 0.05 0.5 0.002 0.006 F 0.40 0.70 0.06 0.02 G 0.65 BS 0.026 BS K 0.25 0.40 0.00 0.06 L 4.90 BS 0.93 BS M 0 6 0 6
M0EL07, M00EL07 PKGE IMENSIONS FN SE 506 0 ISSUE PIN ONE REFERENE B NOTES:. IMENSIONING N TOLERNING PER SME Y4.5M, 994. 2. ONTROLLING IMENSION: MILLIMETERS. 3. IMENSION b PPLIES TO PLTE TERMINL N IS MESURE BETWEEN 0.25 N 0.30 MM FROM TERMINL. 4. OPLNRITY PPLIES TO THE EXPOSE P S WELL S THE TERMINLS. 2 X 0.0 2 X 0.0 ÇÇÇÇ ÇÇÇÇ ÇÇÇÇ TOP VIEW E MILLIMETERS IM MIN MX 0.0.00 0.00 0.05 3 0.20 REF b 0.20 0.30 2.00 BS 2.0.30 E 2.00 BS E2 0.70 0.90 e 0.50 BS K 0.20 L 0.25 0.35 0.0 X SETING PLNE 0.0 SIE VIEW (3) 2 e e/2 4 X L K E2 5 X b 0.0 0.05 B NOTE 3 BOTTOM VIEW ELinPS is a trademark of Semiconductor omponents INdustries, LL (SILL). ON Semiconductor and are registered trademarks of Semiconductor omponents Industries, LL (SILL). SILL reserves the right to make changes without further notice to any products herein. SILL makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SILL assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SILL data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. ll operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SILL does not convey any license under its patent rights nor the rights of others. SILL products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SILL product could create a situation where personal injury or death may occur. Should Buyer purchase or use SILL products for any such unintended or unauthorized application, Buyer shall indemnify and hold SILL and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SILL was negligent regarding the design or manufacture of the part. SILL is an Equal Opportunity/ffirmative ction Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLITION ORERING INFORMTION LITERTURE FULFILLMENT: Literature istribution enter for ON Semiconductor P.O. Box 563, enver, olorado 027 US Phone: 303 675 275 or 00 344 360 Toll Free US/anada Fax: 303 675 276 or 00 344 367 Toll Free US/anada Email: orderlit@onsemi.com N. merican Technical Support: 00 22 955 Toll Free US/anada Europe, Middle East and frica Technical Support: Phone: 42 33 790 290 Japan ustomer Focus enter Phone: 3 5773 350 9 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative M0EL07/