ENGN3227 Analogue Electronics. Problem Sets V1.0. Dr. Salman Durrani

ENGN3227 Analogue Electronics Problem Sets V1.0 Dr. Salman Durrani November 2006

Copyright c 2006 by Salman Durrani.

Problem Set List 1. Op-amp Circuits 2. Differential Amplifiers 3. Comparator Circuits 4. Digital to Analog Converters 5. Op-amp Frequency esponse 6. Active Filter Circuits 7. Filter Design 8. 555 Timer Circuits 9. Oscillator Circuits 10. Instrumentation Amplifier 11. Integrator and Differentiator 12. Matlab Circuits 3

AUSTALIAN NATIONAL UNIVESITY Department of Engineering Q1 ENGN 3227 Analogue Electronics Problem Set #01 Operational Amplifier Circuits Consider the circuit shown in Figure 1. Assume A ol = 2 10 5, out = 75 Ω, in = 2 MΩ, f T = 1 MHz, S = 0.5 V/µs, 1 = 10 kω, 2 = 220 kω, L = 10 kω. (a) Derive an expression for closed-loop gain A cl. Express A cl in standard form. What is A cl for the special case when A ol. (b) Find the optimum value of c. (c) Find the values of closed loop gain, closed loop input resistance and closed loop output resistance. (d) Examine the stability of A cl if A ol increases from 2 10 5 to 5 10 5. (e) Find the maximum frequency of a 0.1V peak sine-wave input that can be amplified without distortion. c v in 1 2 L Q2 epeat Q1 (c),(e) for a buffer amplifier. Q3 Figure 1: The circuit for Question 1. Consider the circuit shown in Figure 2. Assume A ol = 2 10 5, out = 75 Ω, in = 2 MΩ, f T = 1 MHz, S = 0.5 V/µs, 1 = 1 kω, 2 = 100 kω, L = 10 kω. (a) Derive an expression for closed-loop gain A cl. Express A cl in standard form. What is A cl for the special case when A ol. (b) Find the optimum value of c. (c) Find the values of closed loop gain, closed loop input resistance and closed loop output resistance. (d) Examine the stability of A cl if A ol increases from 2 10 5 to 5 10 5. (e) Find the maximum frequency of a 0.1V peak sine-wave input that can be amplified without distortion. 2 v in 1 c L Figure 2: The circuit for Question 3. Problem Set #01 page 1

Q4 Consider the difference amplifier circuit shown in Figure 3. (a) Derive an expression for output voltage. What is for the special case when A ol. (b) Design the difference amplifier circuit to produce output = 0.5(v 1 v 2 ). 2 v 1 1 v 2 1 2 L Figure 3: The circuit for Question 4. Problem Set #01 page 2

AUSTALIAN NATIONAL UNIVESITY Department of Engineering Q1 Complete Solution The given circuit is ENGN 3227 Analogue Electronics Problem Set #01 Solution c v in 1 2 L The given data is A ol = 2 10 5, out = 75 Ω, in = 2 MΩ, f T = 1 MHz, S = 0.5 V/µs, 1 = 1 kω, 2 = 100 kω, L = 10 kω. (a) A cl = A ol ( 1 + 2 ) 1 + 2 + A ol 1 A cl = 1 + 2 1 (when A ol ) A cl = A ol 1 + A ol B (where feedback ratio B = 1 1 + 2 ) See Lecture 04 for complete derivation steps. (b) The optimum value of bias-current compensating resistor is (c) c = 1 2 = 220k 10k = 9.56 kω The closed loop gain is given by B = = A cl = 1 1 + 2 10k 10k + 220k = 1 23 A ol 1 + A ol B = 2 105 1 + 2 105 23 = 22.997 Problem Set #01 page 3

The closed loop input and output resistances are given by in(cl) = in (1 + BA ol ) o(cl) = = 2 10 6 (1 + 2 105 ) = 17.393 GΩ 23 = o (1 + BA ol ) 75 = 8.624 mω 1 + 2 105 23 (d) For A 1(ol) = 2 10 5, A 1(cl) = 22.997. For A 2(ol) = 5 10 5, A 1(cl) = 5 105 = 22.998. 1+ 5 105 23 % change in A ol is ( ) A2(ol) A 1(ol) A ol = 100 = A 1(ol) ( 5 10 5 2 10 5 2 10 5 % change in A cl is ( ) A2(cl) A 1(cl) A cl = 100 = A 1(cl) 22.998 22.997 22.997 ) 100 = 150% 100 = 0.00434% We can see that a 150% increase in A ol results in only 0.00434% increase in A cl, i.e. A cl is a stable parameter. (e) From bandwidth limitation, the upper frequency limit is f c(cl) = f T A cl = 1 106 = 43.48 khz 22.997 From slew rate limitation, the upper frequency limit is f = = S 2πV o(p) 0.5 10 6 = 34.59 khz 2π(22.997)(0.1) We see that in this case, the slew rate sets the upper limit. Hence the maximum frequency of 0.1V peak sine wave that can be amplified without distortion is f max = 34.59 khz. Problem Set #01 page 4

Q2 Complete Solution The given circuit is v in The given data is A ol = 2 10 5, out = 75 Ω, in = 2 MΩ, f T = 1 MHz, S = 0.5 V/µs, L = 10 kω. (c) For buffer amplifier, the closed loop gain is given by B = 1 A cl = A ol 1 + A ol B = 2 10 5 1 + (2 10 5 )(1) = 0.999995 1 The closed loop input and output resistances are given by in(cl) = in (1 + BA ol ) o(cl) = = 2 6 [1 + (2 10 5 )(1)] = 400 GΩ = o (1 + BA ol ) 75 [1 + (2 10 5 = 0.375 mω )(1)] Note: Compare these values with the answers in Q1(c) and Q3(c). We can see that buffer amplifier has highest input resistance and lowest output resistance of the three op-amp configurations. (e) For buffer amplifier, from bandwidth limitation, the upper frequency limit is f c(cl) = f T A cl = 1 106 1 = 1 MHz From slew rate limitation, the upper frequency limit is f S = = S 2πV o(p) 0.5 10 6 = 34.59 khz 2π(22.997)(0.1) We see that in this case, the slew rate sets the upper limit. Hence the maximum frequency of 0.1V peak sine wave that can be passed without distortion is f max = 34.59 khz. Problem Set #01 page 5

Q3 Complete Solution The given circuit is 2 v in 1 c L The given data is A ol = 2 10 5, out = 75 Ω, in = 2 MΩ, f T = 1 MHz, S = 0.5 V/µs, 1 = 1 kω, 2 = 100 kω, L = 10 kω. (a) A ol 2 A cl = 1 + 2 + A ol 1 A cl = 2 1 (when A ol ) A cl = A ol 1 + A ol B (where feedback ratio B = 1 2 ) See Lecture 04 for complete derivation steps. (b) The optimum value of bias-current compensating resistor is (c) c = 1 2 = 1k 100k = 990.01 Ω The closed loop gain is given by B = 1 = 2 1k 100k = 1 100 A cl = A ol 1 + A ol B = 2 105 = 99.95 1 + 2 105 100 The closed loop input and output resistances are given by in(cl) = 1 = 1 kω o(cl) = = o (1 + BA ol ) 75 = 37.48 mω 1 + 2 105 100 Problem Set #01 page 6

(d) For A 1(ol) = 2 10 5, A 1(cl) = 99.95. For A 2(ol) = 5 10 5, A 1(cl) = 5 105 = 99.98. 1+ 5 105 100 % change in A ol is ( ) A2(ol) A 1(ol) A ol = 100 = A 1(ol) ( 5 10 5 2 10 5 2 10 5 % change in A cl is ( ) A2(cl) A 1(cl) A cl = 100 = A 1(cl) 99.98 + 99.95 99.95 ) 100 = 150% 100 = 0.03% We can see that a 150% increase in A ol results in only 0.03% increase in A cl, i.e. A cl is a stable parameter. (e) From bandwidth limitation, the upper frequency limit is f c(cl) = f T A cl = 1 106 99.95 = 10.005 khz From slew rate limitation, the upper frequency limit is f = = S 2πV o(p) 0.5 10 6 = 7.96 khz 2π( 99.95 )(0.1) We see that in this case, the slew rate sets the upper limit. Hence the maximum frequency of 0.1V peak sine wave that can be amplified without distortion is f max = 7.96 khz. Note: Compare these values with the answers in Q1(e). We see that higher the closed loop gain, more strict the frequency limitations. Problem Set #01 page 7

Q4 Partial Solution The given circuit is 2 v 1 1 v 2 1 2 L (a) v + = 2 1 + 2 v 2 2 v = v 1 + 1 1 + 2 1 + 2 v in = (v + ) (v ) = A ol v in The output voltage is (b) = A ol 2 1 + 2 + A ol 1 (v 2 v 1 ) = 2 1 (v 2 v 1 ) (when A ol ) = 0.5(v 2 v 1 ). L = 10 kω (assume) 1 = 10 kω (assume). 2 = 5 kω (calculate from output voltage formula). Problem Set #01 page 8

AUSTALIAN NATIONAL UNIVESITY Department of Engineering Q1 ENGN 3227 Analogue Electronics Problem Set #02 Differential Amplifiers Consider the circuit shown in Figure 1. Assume C = 2.2 kω, E = 4.7 kω, +V CC = 10 V, V EE = 10 V, β = 100, V BE = 0.7 V, V T = 26 mv. (a) Derive an expression for differential voltage gain A d of the amplifier. (b) Determine the Q-point. (c) What is the maximum peak to peak output voltage without clipping. (d) Find the values of differential voltage gain, input resistance and output resistance. (e) Determine the output voltage (t) if v in1 = 5 10 3 sin(2π1000t) and v in2 = 2 10 3 sin(2π1000t). +V CC C - + C v o1 v o2 v in1 v in2 E -V EE Q2 Figure 1: The circuit for Question 1. Consider the circuit shown in Figure 1. Assume C = 1.5 kω, E = 4.7 kω, +V CC = 15 V, V EE = 15 V, β = 100, V BE = 0.7 V, V T = 26 mv. (a) Derive an expression for differential voltage gain A d of the amplifier. (b) Determine the Q-point. (c) What is the maximum peak to peak output voltage without clipping. (d) Find the values of differential voltage gain, input resistance and output resistance. (e) Determine the output voltage (t) if v in1 = 5 10 3 sin(2π1000t) and v in2 = 5 10 3 sin(2π1000t). Problem Set #02 page 1

AUSTALIAN NATIONAL UNIVESITY Department of Engineering Q1 Complete Solution The given circuit is ENGN 3227 Analogue Electronics Problem Set #02 Solution +V CC C - + C v o1 v o2 v in1 v in2 E -V EE The given data is Assume C = 2.2 kω, E = 4.7 kω, +V CC = 10 V, V EE = 10 V, β = 100, V BE = 0.7 V, V T = 26 mv. (a) A d = C r e See Lecture 05 for complete derivation steps. (b) The find the Q-point, we have to determine values of I CQ and V CEQ. I CQ = I E = V EE V BE 2 E 10 0.7 = 2(4.7k) = 0.989 ma V CEQ = V CC +V BE C I CQ = 10 + 0.7 (2.2k)(0.989m) = 8.52 V Hence the Q-point is (0.989 ma, 8.52 V). Problem Set #02 page 2

(c) Each BJT can swing to a maximum collector voltage of +V CC at cutoff and a minimum voltage of approximately 0 V (dc level of the bases) at saturation. The output voltage is the difference of the two collector voltages and the collector voltages moves in the opposite direction by an equal amount. The voltage drop across each collector resistor is V C = C I C = (2.2k)(0.989m) = 2.17 V < V CE This means that the maximum change in voltage across each collector resistor is ±(2.17) V or 4.35 V peak to peak. The maximum peak-to-peak output voltage without clipping is (2)(4.35) = 8.7 V. See PSPICE: P02_Q01.sch. (d) The differential voltage gain is r e = V T I CQ 26m = 0.989m = 26.29 Ω A d = C r e = 2.2k 26.29 = 83.68 The input and output resistances are (e) in1 = in2 = 2(β + 1)r e = 2(101)(26.29) = 5.31 kω o1 = o2 = C = 2.2 kω The output voltage is v in1 (t) = 5 10 3 sin(2π1000t) v in2 (t) = 2 10 3 sin(2π1000t) (t) = A d (v in1 v in2 ) = 83.68(3 10 3 sin(2π1000t)) = 0.251 sin(2π1000t) Note: (i) The output is in phase with the differential input voltage. (ii) no clipping will take place. Problem Set #02 page 3

Q2 Partial Solution The given circuit is +V CC C - + C v o1 v o2 v in1 v in2 E -V EE The given data is Assume C = 1.5 kω, E = 4.7 kω, +V CC = 15 V, V EE = 15 V, β = 100, V BE = 0.7 V, V T = 26 mv. (a) See Lecture 05 for complete derivation steps. (b) (c) I CQ = 1.52 ma V CEQ = 13.42 V Each BJT can swing to a maximum collector voltage of +V CC at cutoff and a minimum voltage of approximately 0 V (dc level of the bases) at saturation. The output voltage is the difference of the two collector voltages and the collector voltages moves in the opposite direction by an equal amount. The voltage drop across each collector resistor is V C = C I C = (1.5k)(1.52m) = 2.28 V < V CE This means that the maximum change in voltage across each collector resistor is ±(2.28) V or 4.56 V peak to peak. The maximum peak-to-peak output voltage without clipping is (2)(4.56) = 9.12 V. Verify using PSPICE. Problem Set #02 page 4

(d) r e = 17.1 Ω A d = 87.72 in1 = in2 = 3.45 kω o1 = o2 = 1.5 kω (e) (t) = 0.877sin(2π1000t) Problem Set #02 page 5

AUSTALIAN NATIONAL UNIVESITY Department of Engineering Q1 ENGN 3227 Analogue Electronics Problem Set #03 Comparators Consider the circuit shown in Figure 1. Assume 1 = 50 kω, 2 = 50 kω, +V CC = 5 V, V EE = 5 V, V out(max) = power supply voltage. (a) Derive expressions for upper and lower trigger points of the comparator. (b) Sketch the output if v in = 5sin(2π1000t). v in 1 2 Figure 1: The circuit for Question 2. Q2 Consider the circuit shown in Figure 2. Assume 1 = 50 kω, 2 = 50 kω, 3 = 100 kω, +V CC = 10 V, V EE = 10 V, V re f = 5 V, V out(max) = power supply voltage. (a) Derive expressions for upper and lower trigger points of the comparator. (b) Sketch the output if v in = 5sin(2π1000t). v in V ref 2 1 3 Figure 2: The circuit for Question 3. Problem Set #03 page 1

Q3 Consider the circuit shown in Figure 3. Assume 1 = 50 kω, 2 = 50 kω, +V CC = 15 V, V EE = 15 V, V Z = 4.7 V, V D = 0.7 V. (a) Find the bounded maximum output voltages. (b) Find values of upper and lower trigger points of the comparator. (c) Sketch the output if v in = 6sin(2π1000t). Z 1 Z 2 c v in 1 2 Figure 3: The circuit for Question 3. Q4 Consider the circuit shown in Figure 3. Assume 1 = 10 kω, 2 = 47 kω, +V CC = 15 V, V EE = 15 V, V Z = 4.7 V, V D = 0.7 V. (a) Find the bounded maximum output voltages. (b) Find values of upper and lower trigger points of the comparator. (c) Sketch the output if v in = 3sin(2π1000t). Problem Set #03 page 2

AUSTALIAN NATIONAL UNIVESITY Department of Engineering Q1 Partial Solution ENGN 3227 Analogue Electronics Problem Set #03 Solution The given circuit data is 1 = 50 kω, 2 = 50 kω, +V CC = 5 V, V EE = 5 V, V out(max) = power supply voltage. v in 1 2 (a) V UT P = 1 1 + 2 V out(max) V LT P = 1 1 + 2 V out(max) See Lecture 06 for complete derivation steps. (b) V UT P = 2.5 V V LT P = 2.5 V Problem Set #03 page 3

The sketch of output voltage is shown below: 6 4 Input Output 2 Voltage (V) 0 2 4 6 0 0.5 1 Time (s) 1.5 2 x 10 3 Figure 4: Comparator output voltage (t). Note: the trigger points where output changes state are highlighted by a black dot. SEE MATLAB: L06_Example03.m and PSPICE:L06_Example03.sch. Problem Set #03 page 4

Q2 Solution The given circuit data is 1 = 50 kω, 2 = 50 kω, 3 = 100 kω, +V CC = 10 V, V EE = 10 V, V re f = 5 V, V out(max) = power supply voltage. v in V ref 2 1 3 (a) V UT P = 2 V re f + 3 V out(max) V LT P = 2 V re f 3 V out(max) where = 1 2 3. (b) = 20 kω V UT P = 4 V V LT P = 0 V The sketch of output voltage is shown below: 10 Input Output 5 Voltage (V) 0 5 10 0 0.5 1 Time (s) 1.5 2 x 10 3 Figure 5: Comparator output voltage (t). Verify using PSPICE P03_Q02.sch. Problem Set #03 page 5

Q3 Partial Solution The given circuit data is 1 = 50 kω, 2 = 50 kω, +V CC = 15 V, V EE = 15 V, V Z = 4.3 V, V D = 0.7 V. Z 1 Z 2 c v in 1 2 (a) The circuit is a double-bounded Schmitt Trigger. One zener is always forward biased when the other one is in breakdown. We have V out = v ± 5 (V Z +V D = 4.3 + 0.7 = 5) v = v + (summing point constraint due to feedback arrangement) V out = v + ± 5 (1) Apply KCL to non-inverting pin, v + V out 2 + v + 0 1 = 0 Substituting in (1) v + = v + = V out 2 V out ( ) 1 + 2 1 (2) ( 1 1 2 V out = V out 2 ± 5 ) V out = ±5 Hence V out(max) = ±10 V. (b) The trigger points are V UT P = V out = ±5 0.5 = ±10 V 1 1 + 2 V out(max) = 5 V V LT P = 1 1 + 2 V out(max) = 5 V Problem Set #03 page 6

(c) The sketch of output voltage is shown below: 10 Input Output 5 Voltage (V) 0 5 10 0 0.5 1 Time (s) 1.5 2 x 10 3 Figure 6: Output voltage (t). Problem Set #03 page 7

Q4 Solution The given circuit data is 1 = 10 kω, 2 = 47 kω, +V CC = 15 V, V EE = 15 V, V Z = 4.7 V, V D = 0.7 V. Z 1 Z 2 c v in 1 2 V out(max) = ±6.55 V V UT P = 1.15 V V LT P = 1.15 V The sketch of output voltage is shown below: 10 6.55 5 Input Output Voltage (V) 1.15 0 1.15 5 6.55 10 0 0.5 1 Time (s) 1.5 2 x 10 3 Figure 7: Output voltage (t). Problem Set #03 page 8

AUSTALIAN NATIONAL UNIVESITY Department of Engineering Q1 ENGN 3227 Analogue Electronics Problem Set #04 Digital to Analogue Converters Consider the DAC circuit shown in Figure 1. Assume F = 10 kω, = 5 kω, +V CC = 15 V, V EE = 15 V, V H = 5 V, V L = 0 V. (a) Determine the resolution of the DAC. (b) Determine the full scale output voltage of the DAC. (c) Determine the output voltage if binary code (0101) 2 is applied at the input. (d) Determine the output voltage if binary code (1001) 2 is applied at the input. D0 D1 D2 D3 8 4 2 F Figure 1: The circuit for Question 1. Q2 Consider the circuit shown in Figure 2. Assume = 10 kω, +V CC = 18 V, V EE = 18 V. Determine the output voltage. +5V +10V 2 2 2 2 F =2 2 Figure 2: The circuit for Question 2. Problem Set #04 page 1

Q3 Consider the circuit shown in Figure 3. Assume = 10 kω, +V CC = 18 V, V EE = 18 V. Determine the output voltage. +5V -5V 2 2 2 2 F =2 2 Figure 3: The circuit for Question 3. Q4 Consider the DAC circuit shown in Figure 4. Assume = 10 kω, +V CC = 15 V, V EE = 15 V, V H = 5 V, V L = 0 V. (a) Determine the resolution of the DAC. (b) Determine the full scale output voltage of the DAC. (c) Using the DAC equation, determine the output voltage if binary code (0101) 2 is applied at the input. (d) Using the DAC equation, determine the output voltage if binary code (1001) 2 is applied at the input. D0 D1 D2 D3 2 2 2 2 F =2 2 Figure 4: The circuit for Question 4. Problem Set #04 page 2

AUSTALIAN NATIONAL UNIVESITY Department of Engineering Q1 Complete Solution ENGN 3227 Analogue Electronics Problem Set #04 Solution The given circuit data is F = 5 kω, = 10 kω, +V CC = 15 V, V EE = 15 V, V H = 5 V, V L = 0 V. D0 D1 D2 D3 8 4 2 F (a) To find the DAC resolution, we find the output voltage when input binary code is 0001 2 i.e. D0 = 5V and D1 = D2 = D3 = 0V. The equivalent circuit for this case is +5V 8 F 4 2 Writing KCL equation, v 5 8 + v + i F = 0 0 5 80k + 0 5k = 0 = 0.3125 V Hence the resolution = 0.3125 V/LSB. Problem Set #04 page 3

(b) To find the full scale output voltage of the DAC, we find the output voltage when input binary code is 1111 2 i.e. D0 = D1 = D2 = D3 = 5V. The equivalent circuit for this case is +5V +5V +5V +5V 8 4 2 F Writing KCL equation, v 5 8 + v 5 4 + v 5 2 + v 5 + v + i F = 0 0 5 80k + 0 5 40k + 0 5 20k + 0 5 10k + 0 5k = 0 = 4.6875 V Hence V o(fs) = 4.6875 V. Note: For DACs, once resolution is known, V o(fs) can also be found using resolution = V o(fs) 2 n 1. (c) Using the DAC equation (0101) 2 = 5 10 = D = resolution D = ( 0.3125)(5) = 1.5625 V (d) Using the DAC equation (1001) 2 = 9 10 = D = resolution D = ( 0.3125)(9) = 2.8125 V Modify PSPICE: L07_Example02.sch to check answer. Problem Set #04 page 4

Q2 Complete Solution The given circuit data is Assume = 10 kω, +V CC = 18 V, V EE = 18 V. The equivalent circuit is +10V 2 F =2 +5V 2 2 2 2 V T H The equivalent circuit for determining Thevenin equivalent voltage is +5V 2 2 V x V y V TH 2 2 Writing KCL equations, we have V x 5 2 + V x 0 2 V y 0 2 Simplifying, + V y V x V T H 0 2 + V x V y + V y V T H + V T H V y = 0 = 0 = 0 4V x 2V y = 5 2V x + 5V y 2V T H = 0 2V y + 3V T H = 0 Converting to standard matrix form, 4 2 0 2 5 2 V x V y 0 2 3 V T H = 5 0 0 Problem Set #04 page 5

Using Cramer s rule, 4 2 0 = 2 5 2 0 2 3 = (4) 5 2 2 3 ( 2) 2 2 0 3 + (0) 2 5 0 2 = 32 4 2 5 2 5 0 0 2 0 V T H = = 20 32 32 = 0.625 V T H The equivalent circuit for determining Thevenin equivalent resistance 2 2 2 TH 2 Combining the resistances starting from far end (i.e. series and parallel combinations respectively) and moving back towards the Thevenin terminals, T H = Overall Equivalent Circuit The overall equivalent circuit for determining is +10V 2 F =2 V TH TH v Using KCL, v V T H T H + + v 10 + v + i 2 2 = 0 = 10.625 V SEE PSPICE: P04_Q02.sch. Problem Set #04 page 6

Q3 Partial Solution The given circuit data is Assume = 10 kω, +V CC = 18 V, V EE = 18 V. +5V -5V 2 2 2 2 F =2 2 The resistors at the far end (left of +5V) can be combined to get eq = (2 2) + = 2 The equivalent circuit is +5V -5V 2 2 2 F =2 eq =2 V T H +5V 2 V x V TH eq =2 2-5V V x 5 2 + V x 0 2 V T H ( 5) 2 + V x V T H + V T H V x = 0 = 0 Problem Set #04 page 7

[ 4 2 2 3 ][ Vx V T H ] [ 5 = 5 ] = V T H = 4 2 2 3 4 5 2 5 = 16 = 10 16 = 0.625 V T H 2 eq =2 2 TH T H = Overall Equivalent Circuit F =2 V TH TH v 2 = 1.25 V SEE PSPICE: P04_Q03.sch. Problem Set #04 page 8

Q4 Solution The given circuit data = 10 kω, +V CC = 15 V, V EE = 15 V, V H = 5 V, V L = 0 V. D0 D1 D2 D3 2 2 2 2 F =2 2 (a) resolution = -0.625 V/LSB. See Lecture 07 for complete derivation steps. (b) Using the DAC equation n = 4 resolution = V o(fs) 2 n 1 V o(fs) = ( 0.625)(2 4 1) = 9.375 V (c) Using the DAC equation (0101) 2 = 5 10 = D = resolution D = ( 0.625)(5) = 3.125 V (d) Using the DAC equation (1001) 2 = 9 10 = D = resolution D = ( 0.625)(9) = 5.625 V Problem Set #04 page 9

AUSTALIAN NATIONAL UNIVESITY Department of Engineering Q1 ENGN 3227 Analogue Electronics Problem Set #05 Op-Amp Frequency esponse (a) Derive an expression for the op-amp open loop transfer function A ol ( f ). (b) Derive an expression for the op-amp closed loop transfer function A cl ( f ). Q2 Consider the circuit shown in Figure 1. Assume A ol(mid) = 2 10 5, out = 75 Ω, in = 2 MΩ, f T = 1 MHz, S = 0.5 V/µs, 1 = 10 kω, 2 = 220 kω, L = 10 kω. (The data is same as in ProblemSet01: Q1) (a) Find the closed loop transfer function A cl ( f ) (b) Find the closed loop cut-off frequency f c(cl). (c) Find A cl ( f ) for f = 0,10,100,1k,30k, f c(cl), f T respectively. (d) Find output voltage (t) if v in (t) = 0.1sin(2π30000t). c v in 1 2 L Figure 1: The circuit for Question 2. Q3 Consider the circuit shown in Figure 2. Assume A ol(mid) = 2 10 5, out = 75 Ω, in = 2 MΩ, f T = 1 MHz, S = 0.5 V/µs, 1 = 1 kω, 2 = 100 kω, L = 10 kω. (The data is same as in ProblemSet01: Q2) (a) Find the closed loop transfer function A cl ( f ) (b) Find the closed loop cut-off frequency f c(cl). (c) Find A cl ( f ) for f = 0,10,100,1k, f c(cl), f T respectively. (d) Find output voltage (t) if v in (t) = 0.1sin(2π1000t). 2 v in 1 c L Figure 2: The circuit for Question 3. Problem Set #05 page 1

Q4 Consider the circuit shown in Figure 3. Assume A ol(mid) = 2 10 5, out = 75 Ω, in = 2 MΩ, f T = 1 MHz, S = 0.5 V/µs. (a) Find the overall closed loop transfer function for the cascaded op-amps. (b) Find output voltage if v in = 0.1sin(2π10000t + 30 ). 4 =2 kω v in 1=1 kω 2 =4 kω 1 v in2 3=1 kω Figure 3: The circuit for Question 4. Problem Set #05 page 2

AUSTALIAN NATIONAL UNIVESITY Department of Engineering Q1 Solution (a) ENGN 3227 Analogue Electronics Problem Set #05 Solution A ol ( f ) = A ol(mid) 1 + j f f c(ol) See Lecture 09 for complete derivation steps. (b) A cl ( f ) = A ol(mid) 1 + BA ol(mid) + j f f c(ol) See Lecture 09 for complete derivation steps. Problem Set #05 page 3

Q2 Complete Solution The given circuit data is A ol(mid) = 2 10 5, out = 75 Ω, in = 2 MΩ, f T = 1 MHz, S = 0.5 V/µs, 1 = 10 kω, 2 = 220 kω, L = 10 kω. c v in 1 2 L (a) The feedback ratio is B = = 1 1 + 2 10k 10k + 220k = 1 23 The open loop cut-off frequency is f c(ol) = f T A ol 10 6 = 2 10 5 = 5 Hz The closed loop transfer function is A cl ( f ) = = = A ol(mid) 1 + BA ol(mid) + j 2 10 5 f f c(ol) 1 + (2 10 5 )( 23 1 ) + j f 5 2 10 5 8696.65 + j0.2 f The above equation shows how closed loop gain varies with frequency. At f = 0 Hz (i.e. DC), we have A cl (0) = A ol(mid) 1 + BA ol(mid) + j 0 f c(ol) = A ol(mid) 1 + BA ol(mid) = 2 105 1 + 2 105 23 = 22.997 Compare with ProblemSet01: Q1. Problem Set #05 page 4

(b) The closed loop cut-off frequency can be calculated in two ways. Using unity gain relationship and A cl (0), we have f c(cl) = f T A cl = 1 106 = 43.48 khz 22.997 Using the open loop cut-off frequency result, we have f c(cl) = f c(ol) (1 + BA ol(mid) ) = (5)(1 + 2 105 ) = 43.48 khz 23 Compare with ProblemSet01: Q1. (c) A cl ( f ) = 2 10 5 8696.65 + j0.2 f A cl (0) = 2 105 = 22.997 = 22.997 0 8696.65 A cl (10) = 2 10 5 = 22.997 j0.0053 = 22.997 0.013 8696.65 + j2 A cl (100) = 2 10 5 = 22.997 j0.053 = 22.997 0.13 8696.65 + j20 A cl (1k) = 2 10 5 = 22.997 j0.53 = 22.991 1.32 8696.65 + j200 A cl ( f c(cl) ) = 2 10 5 = 11.5 j11.5 = 16.26 45 8696.65 + j8696.65 A cl ( f T ) = 2 10 5 = 0.043 j0.9981 = 0.999 87.51 8696.65 + j2 105 We can see that at closed loop cut-off frequency, A cl ( f c(cl) ) = 16.26 = A cl(0) 2. Also at unity gain frequency, A cl ( f T ) = 0.999 1 (which follows from definition of unity gain frequency). See MATLAB: P05_Q01.m Problem Set #05 page 5

(d) Given that v in (t) = 0.1sin(2π30000t) f = 30 khz Converting to phasors, we have, V in = 0.1 0 = 0.1 Using definition of closed loop transfer function A cl ( f ) = V out V in Substituting values V out = (A cl (30000))(0.1 0 ) = (0.1)(15.58 j10.75) = 1.558 j1.075 = 1.893 34.60 Converting back to time domain, (t) = 1.893sin(2π1000t 34.6 ) This is the equation of the output voltage waveform. See PSPICE: P05_Q02.sch In PSPICE, add trace 1.893*SIN(2*3.14*30000*TIME-34.6*3.14/180) to compare simulation and predicted result. Problem Set #05 page 6

Q3 Solution The given circuit data is A ol(mid) = 2 10 5, out = 75 Ω, in = 2 MΩ, f T = 1 MHz, S = 0.5 V/µs, 1 = 1 kω, 2 = 100 kω, L = 10 kω. 2 v in 1 c L (a) B = 1 2 = 1 100 f c(ol) = f T A ol = 5 Hz A cl ( f ) = A ol(mid) 1 + BA ol(mid) + j = f f c(ol) 2 105 2001 + j0.2 f (b) f T f c(cl) = = 10.005 khz A cl (0) f c(cl) = f c(ol) (1 + BA ol(mid) ) = 10.005 khz (c) A cl (0) = A cl (10) = A cl (100) = A cl (1k) = A cl ( f c(cl) ) = A cl ( f T ) = 2 105 = 99.95 0 2001 2 105 2001 + j2 = (99.95 j0.099) = (99.95 0.057 ) 2 105 2001 + j20 = (99.94 j0.998) = (99.94 0.57 ) 2 10 5 2001 + j200 = (98.96 j9.98) = (99.45 5.71 ) 2 10 5 2001 + j2001 = (49.975 j49.975) = (70.67 45 ) 2 10 5 2001 + j2 10 5 = (0.01 j0.999) = (0.999 89.42 ) (d) v in (t) = 0.1sin(2π1000t) (t) = 9.945sin(2π1000t 5.71 ) See PSPICE: P05_Q03.sch In PSPICE, add trace -0.9945*SIN(2*3.14*1000*TIME-5.71*3.14/180) to compare simulation and predicted result. Problem Set #05 page 7

Q4 Partial Solution The given circuit is 4 =2 kω v in 1=1 kω 2 =4 kω 1 v in2 3=1 kω (a) This is a cascaded two-stage op-amp circuit. For 1st op-amp, B = 1 1 + 2 = 1 5 f c1(ol) = f T A ol = 5 Hz A cl1 ( f ) = For 2nd op-amp, B = 3 4 = 1 2 A ol(mid) 1 + BA ol(mid) + j f c2(ol) = f T A ol = 5 Hz A cl2 ( f ) = A ol(mid) 1 + BA ol(mid) + j = f f c1(ol) = f f c2(ol) 2 10 5 40001 + j0.2 f 2 10 5 100001 + j0.2 f The overall closed loop transfer function is the product of the two individual closed loop transfer functions. (b) A cl ( f ) = A cl1 ( f )A cl2 ( f ) A cl ( f ) = 4 10 10 (4 10 9 0.04 f 2 ) + j14002 f A cl (10k) = The output voltage is f = 10 khz 4 10 10 3.996 10 9 + j140.02 10 6 = (10 2 ) v in (t) = 0.1sin(2π10000t + 30 ) (t) = sin(2π10000t + 28 ) See PSPICE: P05_Q04.sch Problem Set #05 page 8

Appendix A: Useful Formulas Notation V = a + jb (rectangular form) (1) V = V θ ((polar form) (2) V = a 2 + b 2 (3) ( ) b θ = tan 1 ± 180 (4) a Note: arctangent function is multivalued so an adjustment is needed obtain correct value of θ. Scientific calculators can, however, convert complex numbers from polar to rectangular and vice versa in single operation and give correct value of θ automatically. Practice with your scientific calculator to become proficient in using complex, Pol and ec modes. Complex Conjugate V = a jb (5) i.e the conjugate of the complex number is formed by reversing the sign of the imaginary part. In polar form V = V θ. Multiplication by Complex Conjugate V V = (a + jb)(a jb) = a 2 jab + jab j 2 b 2 = a 2 + b 2 (6) Multiplication in Polar form If V 1 = V 1 θ 1 and V 2 = V 2 θ 2 V 1 V 2 = ( V 1 θ 1)( V 2 θ 2) = ( V 1 V 2 ) (θ 1 + θ 2 ) (7) i.e to multiply numbers in polar form, we multiply the magnitudes and add the angles. Division in Polar form If V 1 = V 1 θ 1 and V 2 = V 2 θ 2 V 1 = V 1 θ 1 V 2 = V 1 V 2 θ 2 V 2 (θ 1 θ 2 ) (8) i.e to divide numbers in polar form, we divide the magnitudes and subtract the angles. Useful Identities j = 1 (9) 1 j = j (10) j 2 = 1 (11) Problem Set #05 page 9

Appendix B: Complex Number Calculation Examples Addition and Substraction V 1 = 8 + j16 V 2 = 12 j3 V 1 + V 2 = 20 + j13 (using rectangular form) V 1 V 2 = 4 + j19 (using rectangular form) Note: If numbers to be added or subtracted are given in polar form, they must be first converted to rectangular form. Multiplication V 1 = 8 + j10 V 2 = 5 j4 V 1 V 2 = 40 j32 + j50 + 40 = 80 + j18 (using rectangular form) V 1 = 8 + j10 = 12.81 51.34 V 2 = 5 j4 = 6.4 38.66 V 1 V 2 = (12.81 51.34 )(6.4 38.66 ) = 82 12.68 = 80 + j18 (using polar form) Division V 1 = 6 + j3 V 2 = 3 j V 1 V 2 = 6 + j3 3 j = 6 + j3 3 + j (multiply and divide by conjugate of denominator) 3 j 3 + j 18 + j6 + j9 3 = 9 + 1 = 1.5 + j1.5 (using rectangular form) V 1 = 6 + j3 = 6.71 26.57 V 2 = 3 j = 3.16 18.43 V 1 V 2 = 6.71 26.57 3.16 18.43 = 2.12 45 = 1.5 + j1.5 (using polar form) Problem Set #05 page 10

AUSTALIAN NATIONAL UNIVESITY Department of Engineering Q1 ENGN 3227 Analogue Electronics Problem Set #06 Active Filters Consider the circuit shown in Figure 1. Assume 1 = 1 kω, 2 = 2 kω, C 1 = 1 µf. (a) Find the s-domain transfer function of the circuit in standard form. (b) Write the set of MATLAB commands (4 lines expected) to obtain the Bode plot. v in (t) C 1 (t) 2 1 Figure 1: The circuit for Question 1. Q2 Consider the circuit shown in Figure 2. Assume 1 = 1 kω, C 1 = 1 µf, C 2 = 10 µf. (a) Find the s-domain transfer function of the circuit in standard form. (b) Write the set of MATLAB commands (4 lines expected) to obtain the Bode plot. v in (t) (t) C 2 1 C 1 Figure 2: The circuit for Question 2. Problem Set #06 page 1

Q3 Consider the Sallen-Key low-pass filter circuit shown in Figure 3. Find the s-domain transfer function of the circuit in standard form. C 1 v in (t) 1 v x 2 v + (t) C 2 v F A Figure 3: The circuit for Question 3. Q4 Consider the Sallen-Key high-pass filter circuit shown in Figure 4. Find the s-domain transfer function of the circuit in standard form. 1 v in (t) C 1 C 2 v x v + 2 (t) F v A Figure 4: The circuit for Question 4. Problem Set #06 page 2

AUSTALIAN NATIONAL UNIVESITY Department of Engineering Q1 Complete Solution ENGN 3227 Analogue Electronics Problem Set #06 Solution The given circuit data is 1 = 1 kω, 2 = 2 kω, C 1 = 1 µf. e-drawing the circuit in s-domain, we have V in (s) 1/sC 1 V out (s) 2 1 (a) Applying KCL at -ve pin, Solving V (s) 0 2 + V (s) V out (s) 1 + V (s) V out (s) 1 = 0 sc 1 V out (s) V (s) = sc 1 + 1 1 + 1 2 sc 1 + 1 1 From circuit, V in (s) = V + (s). Applying op-amp assumption, V + (s) = V (s). Hence V out (s) V in (s) = sc 1 + 1 1 + 1 2 sc 1 + 1 1 Converting to standard form (a) V out (s) V in (s) = s + 1 C 1 ( 11 + 1 2 ) s + 1 1 C 1 Substituting the values, the transfer function is H(s) = s + 1500 s + 1000 Problem Set #06 page 3

The MATLAB commands are: >> num=[1 1500]; >> den=[1 1000]; >> H=tf(num,den); >> bode(h); From the shape of the magnitude bode plot, the given circuit provides 3.5 db gain to low frequencies and allows high frequencies to pass unchanged (0dB gain). Q2 Partial Solution The given circuit data is 1 = 1 kω, C 1 = 1 µf, C 2 = 10 µf. The given circuit is v in (t) (t) C 2 1 C 1 (a) In standard form H(s) = 1 1 C 2 s + 1 1 C 1 (b) H(s) = 100 s + 1000 The MATLAB commands are: >> num=[100]; >> den=[1 1000]; >> H=tf(num,den); >> bode(h); From the shape of the magnitude bode plot, the given circuit is a low-pass filter with roll-off -20 db/decade. Problem Set #06 page 4

Q3 Partial Solution e-drawing the circuit in s-domain, we have 1/sC 1 V in (s) 1 V x (s) 2 V + (s) V out (s) 1/sC 2 V (s) F A Let G = 1 + F A = A + F A Step 1: Apply KCL at -ve pin V (s) V out (s) F + V (s) 0 A = 0 Solving, we have V (s) = A A + F V out (s) = V out(s) G Applying op-amp assumption, V + (s) = V (s). Hence V + (s) = V out(s) G Step 2: Apply KCL at +ve pin V + (s) V x (s) + V +(s) 0 = 0 1 2 sc 2 Substituting the value V + (s) = V out(s) G V x (s) = (sc 2 2 + 1) V out(s) G Step 3: Apply KCL at node x V x (s) V + (s) 2 V x (s) V out(s) G 2 + V x(s) V out (s) 1 sc 1 + V x(s) V out (s) 1 sc 1 and solving, we get + V x(s) V in(s) 1 = 0 + V x(s) V in(s) 1 = 0 Problem Set #06 page 5

Simplifying, we have ( sc 1 + 1 1 + 1 2 ) V x (s) = 1 1 V in (s) + sc 1 V out (s) + 1 G 2 V out (s) (sc 1 1 2 + 2 + 1 )V x (s) = 2 V in (s) + sc 1 1 2 V out (s) + 1 G V out(s) (sc 1 1 2 + 2 + 1 )(sc 2 2 + 1) V out(s) G = 2 V in (s) + sc 1 1 2 V out (s) + 1 G V out(s) (sc 1 1 2 + 2 + 1 )(sc 2 2 + 1)V out (s) = G 2 V in (s) + sgc 1 1 2 V out (s) + 1 V out (s) (sc 1 1 2 + 2 + 1 )(sc 2 2 + 1)V out (s) sgc 1 1 2 V out (s) 1 V out (s) = G 2 V in (s) (sc 1 C 2 1 2 2 + sc 1 1 2 + sc 2 2 2 + 2 + sc 2 1 2 + 1 )V out (s) sgc 1 1 2 V out (s) 1 V out (s) = G 2 V in (s) Hence V out (s) V in (s) = = (s 2 C 1 C 2 1 2 2 + sc 1 1 2 (1 G) + sc 2 1 2 + sc 2 2 2 + 2 )V out (s) = G 2 V in (s) (s 2 C 1 C 2 1 2 + sc 1 1 (1 G) + sc 2 1 + sc 2 2 + 1)V out (s) = GV in (s) G s 2 C 1 C 2 1 2 + sc 1 1 (1 G) + sc 2 1 + sc 2 2 + 1 G s 2 C 1 C 2 1 2 + [C 1 1 (1 G) +C 2 1 +C 2 2 ]s + 1 Step 4: Convert transfer function to standard form. Dividing numerator and denominator by C 1 C 2 1 2 Hence Q4 V out (s) V in (s) Solution H(s) = = The given circuit is G 1 C 1 C 2 1 2 [ ] s 2 + 1 G C 2 2 + C 1 1 2 + C 1 1 1 1 s + C 1 C 2 1 2 G 1 C 1 C 2 1 2 [ ] s 2 + 1 G C 2 2 + C 1 1 2 + C 1 1 1 1 s + C 1 C 2 1 2 1 v in (t) C 1 C 2 v x v + 2 (t) F v A H(s) = Gs [ 2 ] s 2 + 1 G C 1 1 + C 1 1 2 + C 1 1 2 2 s + C 1 C 2 1 2 Problem Set #06 page 6

AUSTALIAN NATIONAL UNIVESITY Department of Engineering Q1 ENGN 3227 Analogue Electronics Problem Set #07 Filter Design Consider the Sallen-Key biquad circuit shown in Figure 1. (a) Design a second-order (n = 2) Butterworth lowpass filter, with cut-off frequency f c = 4 khz using this circuit. (b) Write the set of MATLAB commands (6 lines expected) to obtain the Magnitude Bode plot vs. frequency for the filter. (c) Design a second-order (n = 2) Butterworth highpass filter, with cut-off frequency f c = 4 khz. C 1 v in (t) 1 v x 2 v + (t) C 2 v F A Figure 1: The circuit for Question 1. Q2 Design a fourth-order (n = 4) Butterworth lowpass filter, with cut-off frequency f c = 4 khz, using Sallen-Key biquads. Q3 Consider the Sallen-Key biquad circuit shown in Figure 1. (a) Design a second-order (n = 2) Bessel lowpass filter, with cut-off frequency f c = 4 khz using this circuit. (b) Write the set of MATLAB commands (6 lines expected) to obtain the Phase (in degrees) plot vs. frequency for the filter. Problem Set #07 page 1

AUSTALIAN NATIONAL UNIVESITY Department of Engineering Q1 Complete Solution (a) ENGN 3227 Analogue Electronics Problem Set #07 Solution The given design specifications are: n = 2, Butterworth filter, f c = 4 khz. C 1 v in (t) 1 v x 2 v + (t) C 2 v F A The Sallen-Key lowpass filter transfer function in standard form is H(s) = G 1 C 1 C 2 1 2 [ ] s 2 + 1 G C 2 2 + C 1 1 2 + C 1 1 1 1 s + C 1 C 2 1 2 where G = 1 + F A = A + F A Assuming C 1 = C 2 = C and 1 = 2 =, we have H(s) = G 1 2 C 2 s 2 + [ 3 G C ] s + 1 2 C 2 The n = 2 lowpass Butterworth transfer function in standard form is H(s) = K s 2 + 2ω c s + ω 2 c Comparing the constant term in the denominators, we have ω 2 1 c = 2 C 2 ω c = 1 C 1 f c = 2πC Problem Set #07 page 2

Comparing the coefficient of s terms in the denominators, we have Design 2ωc = 3 G C 1 2 C = 3 G C G = 3 2 1 + F A = 3 2 F A = 2 2 = 0.5857 Let C = 0.01 µf. Then f c = 1 2πC = 1 2πC f c = 1 2π(0.01 10 6 )(4 10 3 ) = 3978.87 Ω = 3.9 kω (nearest standard value) Let A = 3.9 kω. Then F A = 0.5857 F = 2.284 kω = 2.2 kω (nearest standard value) The filter implementation is C 1 =0.01µF v in (t) 1 =3.9kΩ 2 =3.9kΩ C 2 =0.01µF (t) F =2.2kΩ A =3.9kΩ See PSPICE: P07_Q01.sch Problem Set #07 page 3

(b) Substituting the component values, H(s) = 1028338306.4448 s 2 + 336817.883s + 657462195.9 The MATLAB commands to generate Bode magnitude plot vs. frequency are: >> num=[1028338306.4448]; >> den=[1 336817.883 657462195.9]; >> [h,w] = freqs(num,den); >> f = w/(2*pi); >> mag = 20*log10(abs(h)); >> semilogx(f,mag); See also Matlab: P07_Q01.m (c) The position of s and Cs can be reversed in the lowpass biquad to create highpass biquad. Thus a second-order (n = 2) Butterworth highpass filter, with cut-off frequency f c = 4 khz using Sallen-Key biquad is 1 =3.9kΩ v in (t) C 1 =0.01µF C 2 =0.01µF 2 =3.9kΩ (t) F =2.2kΩ A =3.9kΩ See PSPICE: P07_Q01_hp.sch Problem Set #07 page 4

Q2 Partial Solution The n = 4 lowpass Butterworth transfer function in standard form is H(s) = = K s 4 + 2.61313ω c s 3 + 3.14142ω 2 cs 2 + 2.61313ω 3 cs + ω 4 c ( )( ) K 1 K 2 s 2 + 1.848ω c s + ω 2 c s 2 + 0.765ω c s + ω 2 c Thus two lowpass Sallen-Key biquads are required. 1st Stage Design H 1 (s) = K 1 s 2 + 1.848ω c s + ω 2 c Assuming C 1 = C 2 = C and 1 = 2 =, H(s) = G 1 2 C 2 s 2 + [ 3 G C ] s + 1 2 C 2 Comparing the constant term in the denominators, we have ω 2 1 c = 2 C 2 ω c = 1 C 1 f c = 2πC Comparing the coefficient of s terms in the denominators, we have 1.848ω c = 3 G C G = 1.152 F A = 0.152 Let C = 0.01 µf. Then = 1 2πC f c = 3978.87 Ω = 3.9 kω (nearest standard value) Let A = 10 kω. Then F = 1.52 kω = 1.5 kω (nearest standard value) Problem Set #07 page 5

2nd Stage Design H 1 (s) = K 2 s 2 + 0.765ω c s + ω 2 c Comparing the coefficient of s terms in the denominators, we have 0.765ω c = 3 G C G = 2.235 F A = 1.235 C = 0.01 µf = 3.9 kω (nearest standard value) A = 22 kω F = 27 kω (nearest standard value) The filter implementation is C 1 =0.01µF C 1 =0.01µF v in (t) 1=3.9kΩ 2=3.9kΩ C 2 =0.01µF F =1.5kΩ 1=3.9kΩ 2=3.9kΩ C 2 =0.01µF (t) F =27kΩ A =10kΩ A =22kΩ Simulate in PSPICE to verify. Write the set of Matlab commands to obtain Magnitude Bode plot of filter. SEE ALSO HLAB2: FIG25-2 Problem Set #07 page 6

Q3 Partial Solution (a) n = 2, Bessel filter, f c = 4 khz. Assuming C 1 = C 2 = C and 1 = 2 =, the Sallen-Key lowpass filter transfer function in standard form is H(s) = G 1 2 C 2 ] s + 1 2 C 2 s 2 + [ 3 G C The n = 2 lowpass Bessel transfer function in standard form is H(s) = K s 2 + 3ω c s + 3ω 2 c Comparing the constant term in the denominators, we have 3ω 2 c = 1 2 C 2 ω c = 1 3C f c = 1 2π 3C Comparing the coefficient of s terms in the denominators, we have 3ω c = 3 G C G = 3 3 F A = 0.2679 The filter implementation is C 1 =0.01µF v in (t) 1 =3.9kΩ 2 =3.9kΩ C 2 =0.01µF (t) F =1kΩ A =3.9kΩ Compare with Butterworth implementation in Q1. (b) >> num=[826042246.16]; >> den=[1 44707.43 657462195.92]; >> [h,w] = freqs(num,den); >> f = w/(2*pi); >> phase = angle(h)*180/pi; >> semilogx(f,phase); See also Matlab: P07_Q03.m Problem Set #07 page 7

Appendix Table 1: Butterworth Polynomials n Transfer Function H(s) Factored Form K 1 s + ω c K 2 s 2 + 2ω c s + ω 2 c ( )( ) K K1 K 2 3 s 3 + 2ω c s 2 + 2ω 2 cs + ω 3 c ( s + ω c s 2 + ω c s + )( ω 2 c ) K K 1 K 2 4 s 4 + 2.61313ω c s 3 + 3.14142ω 2 cs 2 + 2.61313ω 3 cs + ω 4 c s 2 + 1.848ω c s + ω 2 c s 2 + 0.765ω c s + ω 2 c n 1 2 3 4 Table 2: Chebyshev Polynomials Transfer Function H(s) K s + 1.9652ω c K s 2 + 1.0977ω c s + 1.1025ω 2 c K s 3 + 0.9883ω c s 2 + 1.2384ω 2 cs + 0.4913ω 3 c K s 4 + 0.9528ω c s 3 + 1.4539ω 2 cs 2 + 0.7426ω 3 cs + 0.2756ω 4 c n 1 2 3 4 Table 3: Bessel Polynomials Transfer Function H(s) K s + ω c K s 2 + 3ω c s + 3ω 2 c K s 3 + 6ω c s 2 + 15ω 2 cs + 15ω 3 c K s 4 + 10ω c s 3 + 45ω 2 cs 2 + 105ω 3 cs + 105ω 4 c The above tables can be obtained using Matlab butter, cheby1 and besself commands. See also Matlab: L11_Example01.m Problem Set #07 page 8

AUSTALIAN NATIONAL UNIVESITY Department of Engineering Q1 ENGN 3227 Analogue Electronics Problem Set #08 555 Timer Consider the 555 astable circuit shown in Figure 1. Assume 1 = 10 kω, 2 = 5 kω, C = 300 pf. (a) Explain the working of the circuit. Sketch the voltage across capacitor C and output voltage. (b) Derive the equations for the ON time T H (time the output is HIGH), OFF time T L (time the output is LOW) and Duty cycle D. (c) Find the values of T H, T L and D. Q2 Figure 1: The circuit for Question 1. Consider the 555 monostable circuit shown in Figure 2. Assume = 12 kω, C = 0.025 µf. (a) Explain the working of the circuit. Sketch the voltage across capacitor C and output voltage. (b) Derive the equations for the pulse duration T (time the output is HIGH). (c) Find the value of pulse duration T. Figure 2: The circuit for Question 2. Problem Set #08 page 1

Q3 Design a square waveform generator using 555 Timer with duty cycle D = 60% and oscillation frequency f = 1 khz. Q4 Design a square waveform generator using 555 Timer with duty cycle D = 25% and oscillation frequency f = 1 khz. Problem Set #08 page 2

AUSTALIAN NATIONAL UNIVESITY Department of Engineering Q1 Partial Solution ENGN 3227 Analogue Electronics Problem Set #08 Solution The given circuit data is 1 = 10 kω, 2 = 5 kω, C = 300 pf. (a) See Lecture 12 for solution (b) T H = 0.693( 1 + 2 )C T L = 0.693 2 C ( ) T H 1 + 2 Duty cycle = 100% = 100% T H + T L 1 + 2 2 See Lecture 12 for derivation steps (c) T H = 0.693( 1 + 2 )C = 0.693(15k)(300p) = 3.1185 µs T L = 0.693 2 C = 0.693(5k)(300p) = 1.0395 µs Duty cycle = T H 3.1185 100% = 100% = 75% T H + T L 3.1185 + 1.0395 Problem Set #08 page 3

Q2 Partial Solution The given circuit data is = 12 kω, C = 0.025 µf. (a) See Lecture 12 for solution (b) T = 1.1C See Lecture 12 for derivation steps (c) T = 1.1C = 1.1(12k)(0.025µ) = 330 µs Problem Set #08 page 4

Q3 Complete Solution The design data is: square waveform generator using 555 Timer Duty cycle D = 60% oscillation frequency f = 1 khz. As D > 50%, the 555 circuit is From the time period, we have T = 1 f T H + T L = 1ms (1) From the duty cycle, we have Duty cycle = T H T 100% 0.6 = T H T T H = 0.6T Solving (1) and (2), we have T H = 0.6ms T L = 0.4ms We know for above 555 Timer, Design T H = 0.693( 1 + 2 )C T L = 0.693 2 C (2) Let C = 0.1 µf. Then 2 = 5.772kΩ 1 = 2.886 kω See also Matlab: P08_Q03.m Problem Set #08 page 5

Q4 Partial Solution The design data is: square waveform generator using 555 Timer Duty cycle D = 25% oscillation frequency f = 1 khz. As D < 50%, the 555 circuit is From the time period, we have T = 1 f T H + T L = 1ms (3) From the duty cycle, we have Duty cycle = 0.25 = T H T T H = 0.25T T H T H + T L 100% (4) Solving (1) and (2), we have T H = 0.25ms T L = 0.75ms We know for above 555 Timer, T H = 0.693 1 C T L = 0.693 2 C Design Let C = 0.1 µf. Then 1 = 3.607kΩ 2 = 10.822 kω See also Matlab: P08_Q03.m Problem Set #08 page 6

AUSTALIAN NATIONAL UNIVESITY Department of Engineering Q1 ENGN 3227 Analogue Electronics Problem Set #09 Oscillators Explain briefly, in words, the operation of the following: (a) Wien-bridge oscillator. (b) Phase-shift oscillator. (c) Square-wave relaxation oscillator. (d) Triangle-wave relaxation oscillator. Q2 Consider the circuit shown in Figure 1. Assume = 10000 2π Ω, C = 0.01 µf. (a) Derive an expression for the transfer function H( f ) of the given circuit. (b) Find the frequency f r for which H( f ) is real. (c) Find output voltage (t) if v in (t) = sin(2π10000t). (d) Find output voltage (t) if v in (t) = sin(2π1000t). v in (t) C C (t) Figure 1: The circuit for Question 2. Q3 Consider the circuit shown in Figure 2. Assume = 10000 2π Ω, C = 0.01 µf. 6 (a) Derive an expression for the transfer function H( f ) of the given circuit. (b) Find the frequency f r for which H( f ) is real. (c) Find output voltage (t) if v in (t) = 29sin(2π10000t). v in (t) C C C (t) Figure 2: The circuit for Question 3. Problem Set #09 page 1

AUSTALIAN NATIONAL UNIVESITY Department of Engineering Q1 Solution ENGN 3227 Analogue Electronics Problem Set #09 Solution See Lecture 13: Oscillators and Textbook: Chapter 10. Q2 Partial Solution The given circuit data is = 10000 2π Ω, C = 0.01 µf. v in (t) C C (t) (a) Using phasors, Solving, V out 0 V out 0 + + 1 jωc V out V in + 1 jωc = 0 H( f ) = V out V in = ωc 3ωC j(1 ω 2 2 C 2 ) (b) For real H( f ), the imaginary part must be 0. Hence 1 ω 2 r 2 C 2 = 0 ω r = 1 C 1 f r = 2πC H( f r ) = 1 3 Problem Set #09 page 2

(c) v in (t) = sin(2π10000t) f = 10 khz Using phasors, V in = 1 0 = 1 H(10000) = 1 3 V out = H(10000) V in = 1 3 Converting back, (t) = 1 3 sin(2π10000t) (d) v in (t) = sin(2π1000t) Using phasors, f = 1 khz V in = 1 0 = 1 0.1 H(1000) = 0.3 j(1 0.01) 0.1 = 0.3 j0.99 = 0.028 + j0.0925 = 0.0967 73.16 V out = H(1000) V in = 0.0967 73.16 Converting back, (t) = 0.0967sin(2π1000t + 73.16 ) See PSPICE: P09_Q02.sch In PSPICE, add trace 0.0967*SIN(2*3.14*1000*TIME+73.16*3.14/180) to compare simulation and predicted result. Problem Set #09 page 3

Q3 Partial Solution The given circuit data is = 10000 2π Ω, C = 0.01 µf. 6 v in (t) C C C (t) (a) Using phasors and writing node equation, V y V in V y 0 V y V x + + 1 1 jωc jωc V x V y V x 0 V x V out + + 1 1 jωc jωc V out V x V out 0 + 1 jωc Solving, using Cramer s rule, we have = 0 = 0 = 0 H( f ) = V out V in = 1 ( ) ( ) 1 5 j 6 ω 2 2 C 2 ωc 1 ω 3 3 C 3 See also Lecture 13: Oscillators (b) For real H( f ), the imaginary part must be 0. Hence 6 ω r C 1 ω 3 r 3 C 3 = 0 ω r = 1 6C f r = 1 2π 6C H( f r ) = 1 29 Problem Set #09 page 4

(c) v in (t) = 29sin(2π10000t) Using phasors, f = 10 khz V in = 29 0 = 1 H(10000) = 1 29 V out = H(10000) V in = 1 = 1 180 Converting back, (t) = sin(2π10000t + 180 ) See PSPICE: P09_Q03.sch In PSPICE, add trace SIN(2*3.14*10000*TIME + 180*3.14/180) to compare simulation and predicted result. Problem Set #09 page 5

AUSTALIAN NATIONAL UNIVESITY Department of Engineering Q1 ENGN 3227 Analogue Electronics Problem Set #10 Instrumentation Amplifiers Consider the circuit shown in Figure 1. (a) Derive an exact expression for the output voltage (t) in terms of input voltages v 1 (t) and v 2 (t) and op-amp open loop gain A ol. (b) Find an expression for the output voltage (t) when A ol. (c) Find an expression for the output voltage (t) when A ol and 4 3 = 2 1. (d) Find an expression for the output voltage (t) when A ol and 4 = 3 = 2 = 1 =. 4 v 1 3 v 2 1 2 L Figure 1: The circuit for Question 1. Q2 Consider the two op-amp instrumentation amplifier circuit shown in Figure 2. (a) Derive an exact expression for the output voltage (t) in terms of input voltages v 1 (t) and v 2 (t) and op-amp open loop gain A ol. (b) Find an expression for the output voltage (t) when A ol. (c) Find an expression for the output voltage (t) when A ol and 4 3 = 1 2. (d) Find an expression for the output voltage (t) when A ol and 4 = 3 = 2 = 1 =. 4 v 1 v x 3 1 2 L v 2 Figure 2: The circuit for Question 2. Problem Set #10 page 1

Q3 Consider the three op-amp instrumentation amplifier circuit shown in Figure 3. (a) Derive an expression for the output voltage 1 (t). (b) Derive an expression for the output voltage 2 (t). (c) Assuming 4 = 3 = 2 = 1 =, find the expression for output voltage (t) in terms of input voltages v 1 (t) and v 2 (t). v 1 1 4 3 G 1 2 L v 2 2 Figure 3: The circuit for Question 3. Problem Set #10 page 2

AUSTALIAN NATIONAL UNIVESITY Department of Engineering Q1 ENGN 3227 Analogue Electronics Problem Set #10 Solution Partial Solution 4 v 1 3 v 2 1 2 L (a) Writing KCL equations, v + = 2 1 + 2 v 2 4 v = v 1 + 3 3 + 4 3 + 4 v in = (v + ) (v ) The output voltage is (b) = A ol v in = 2A ol v 2 4A ol v 1 3A ol 1 + 2 3 + 4 3 + 4 = ( 3 + 4 )A ol 2 4 A ol v 2 v 1 3 + 4 + 3 A ol 1 + 2 3 + 4 + 3 A ol When A ol, (c) = 3 + 4 2 v 3 + 4 2 A ol + 3 1 + 2 = 3 + 4 3 2 1 + 2 v 2 4 3 v 1 Assuming A ol and 4 3 = 2 1, (d) = 2 1 (v 2 v 1 ) Assuming A ol and 4 = 3 = 2 = 1 =, = v 2 v 1 4 3 + 4 A ol + 3 v 1 Problem Set #10 page 3

Q2 Partial Solution The given circuit is 4 v 1 v x 3 1 2 L (a) v 2 Writing KCL equations for non-inverting op-amp v + = v 1 v = 1 v x 1 + 2 v in = (v + ) (v ) v x = A ol v in v x = ( 1 + 2 )A ol v 1 1 + 2 + 1 A ol Writing KCL equations for inverting op-amp v + = v 2 4 v = v x + 3 3 + 4 3 + 4 v in = (v + ) (v ) = A ol v in = A ol v 2 A ol v = (b) When A ol, = ( 3 + 4 )A ol 3 + 4 + 3 A ol v 2 ( 1 + ) 4 v 2 3 ( 4 3 4 A ol 3 + 4 + 3 A ol )( 1 + ) 2 v 1 1 ( 1 + 2 )A ol 1 + 2 + 1 A ol v 1 (c) Assuming A ol and 4 (d) = ( 1 + 4 3 3 = 1 2, ) (v 2 v 1 ) Assuming A ol and 4 = 3 = 2 = 1 =, = 2(v 2 v 1 ) Problem Set #10 page 4

Q3 Partial Solution The given circuit is v 1 1 4 3 G 1 2 L v 2 2 (a) v 1 1 + v 1 v 2 G = 0 1 = 1 + G G v 1 G v 2 (b) (c) v 2 2 + v 2 v 1 G = 0 2 = 1 + G G v 2 G v 1 The third op-amp is a unity gain difference amplifier [using result of Q1 part (d)]. = 2 v ( out1 = 1 + 2 ) (v 2 v 1 ) G See PSPICE: L15_Example02.sch See PSPICE: L15_Example02_CM.sch Problem Set #10 page 5

AUSTALIAN NATIONAL UNIVESITY Department of Engineering Q1 ENGN 3227 Analogue Electronics Problem Set #11 Integrator and Differentiator Consider the circuit shown in Figure 1. (a) Derive an expression for the output voltage (t) in terms of input voltage v in (t). (b) Find an expression for the transfer function H( f ) of the circuit. (c) Find an expression for the output voltage (t) when v in (t) = V in(p) sin(ωt). (d) Find an expression for peak output voltage V o(p) when input voltage is a square wave with peak V in(p) and frequency f. C I I v in Figure 1: The circuit for Question 1. Q2 Consider the circuit shown in Figure 2. Assume A ol = 2 10 5, out = 75 Ω, in = 2 MΩ, f T = 1 MHz, S = 0.5 V/µs. (a) Design the circuit for an operating frequency of 2 khz and a maximum gain of 20. Assume C I = 100 nf. (b) Find and sketch the output voltage (t) when input voltage v in (t) = 0.1sin(2π2000t). (c) Find and sketch the output voltage (t) when input voltage is a square wave with ±2.5V peak and frequency 2 khz. (d) Find the dc component in the output when there is a +50 mv dc input. f C I I v in 2 Figure 2: The circuit for Question 2. Problem Set #11 page 1

Q3 Consider the circuit shown in Figure 3. (a) Derive an expression for the output voltage (t) in terms of input voltage v in (t). (b) Find an expression for the transfer function H( f ) of the circuit. (c) Find an expression for the output voltage (t) when v in (t) = V in(p) sin(ωt). (d) Find an expression for peak output voltage V o(p) when input voltage is a square wave with peak V in(p) and frequency f. D C D v in Figure 3: The circuit for Question 3. Q4 Consider the circuit shown in Figure 4. Assume A ol = 2 10 5, out = 75 Ω, in = 2 MΩ, f T = 1 MHz, S = 0.5 V/µs. (a) Design the circuit for an operating frequency of 100 Hz. Assume C D = 0.1 µ F. (b) Find and sketch the output voltage (t) when input voltage v in (t) = 0.1sin(2π100t). (c) Find and sketch the output voltage (t) when input voltage is a triangular wave with ±0.5V peak and frequency 100 Hz. C I D C D I v in 2 Figure 4: The circuit for Question 4. Problem Set #11 page 2

AUSTALIAN NATIONAL UNIVESITY Department of Engineering Q1 Solution The given circuit is ENGN 3227 Analogue Electronics Problem Set #11 Solution C I I v in (a) 0 v in I +C I dv C dt = 0 (t) = 1 I C I t t 0 v in (t)dt + v C (t 0 ) (b) H( f ) = V out V in = 1 jω I C I (c) v in (t) = V in(p) sin(ωt) (t) = V in(p) ω I C I cos(ωt) V o(p) = V in(p) ω I C I (d) V o(p) = V in(p) 4 f I C I For detailed derivations, SEE: Lecture 15. Problem Set #11 page 3