COMP2611: Computer Organization. Introduction to Digital Logic

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Transcription:

1 OMP2611: omputer Organization ombinational Logic OMP2611 Fall 2015

asics of Logic ircuits 2 its are the basis for binary number representation in digital computers ombining bits into patterns following some conventions or rules (defined in the IS) allow for: number representations Integers, Fractions and Real numbers, Instruction encoding Operation Operands How are bits represented at the low level and how are they handled in the hardware below the IS? OMP2611 Fall 2015

asic Operations on its 3 The electronics inside modern computers are digital: they operate with only two voltage levels of interest - hence the use of binary numbers Digital values 0 Illegal 1 nalog values 0V 0.5V 2.4V 2.9V Two types of digital logic circuits inside a computer: ombinational logic circuits: Logic circuits that do not have memory. The output depends only on the current input and the circuit. Sequential logic circuits: Logic circuits that have memory. The output depends on both the current input and the value stored in memory (called state). oth rely on some basic logic circuits that implement some fundamental logic operations OMP2611 Fall 2015

Logical Operations on its 4 Three fundamental logic functions defined by their truth table are at the center of all operations in modern computers: NOT Input Output Input values NOT 0 1 1 0 Output values also written ND ND 0 0 0 0 1 0 1 0 0 also written 1 1 1 OMP2611 Fall 2015

Logical Operations on its 5 OR OR 0 0 0 0 1 1 also written + 1 0 1 1 1 1 NOT, ND and OR can be applied to bit patterns as well: The rule applies to each bit position: bit-wise operation Example: =01011, = 10010 = 10100 + = 11011 = 00010 OMP2611 Fall 2015

Logical Operations on its 6 To simplify the design of circuits other logic functions can be defined based on the basic ones, notably the XOR (exclusive or) XOR (exclusive OR) XOR 0 0 0 0 1 1 1 0 1 1 1 0 also written ll logic functions can be extended to apply on more than two operands following the basic rules of oolean lgebra OMP2611 Fall 2015

Logic Function 7 Example: onsider a digital circuit with two single-bit inputs (, ) and two single-bit outputs (, D). The circuit implements: is true if exactly one input is true; D is true if exactly two inputs are true. onstruct the truth table for the circuit onstruct the logic function for the circuit D 0 0 0 0 = + 0 1 0 1 1 0 0 1 D = 1 1 1 0 omputer rithmetic and Logic operation can be specified via logic functions OMP2611 Fall 2015

asic Laws of oolean lgebra 8 Using all these laws, we can simplify logic and arithmetic functions Identity laws: +0 = 1= nnihilator (or Zero and one) laws: +1= 1 0 = 0 omplement laws: + = 1 = 0 ommutativity laws: + = + = ssociativity laws: +(+)= (+ )+ Distributivity laws: ( )= ( ) ( ) ( ) ( ) ( ) ( ) ( ) OMP2611 Fall 2015

dditional Laws of oolean lgebra 9 Idempotence: = bsorption laws: = + ( ) = ( ) = De Morgan Laws: + = = + OMP2611 Fall 2015

Digital Logic 10 t the base of modern computers is the MOS (Metal Oxide Semiconductor) Transistor Transistor: Three terminals: Gate, Source and Drain Two types of transistors N (left) and P(right) Gate Drain Gate Source Source Operates as an Electronic switch For the N-type: if the Gate is powered, then the path from source to drain acts like a wire otherwise the path is broken. Drain 2.9V Drain Gate = 1 Drain Source Gate Source GND Gate = 0 Drain Source OMP2611 Fall 2015

Logic gates 11 We can build basic logic circuits (logic gates) for the three basic logic functions (NOT, ND, OR) by using several transistors NOT Gate (MOS Inverter) NOT 0 1 1 0 Truth Table Not NOT 0V 2.9V 2.9V 0V Digital Inverter Using MOS Symbolic representation of the NOT Gate

Logic Gates 12 ND Gate OR Gate ND 0 0 0 0 1 0 1 0 0 1 1 1 Truth Table OR 0 0 0 0 1 1 1 0 1 1 1 1 Truth Table Symbolic representation of the ND Gate Symbolic representation of the OR Gate OMP2611 Fall 2015

onstruct a 1-bit Half dder 13 ontinue the example on Page 7 D 0 0 0 0 0 1 0 1 1 0 0 1 1 1 1 0 Truth Table = + D = Logic Function Digital ircuit OMP2611 Fall 2015

ombinational Logic 14 ombinational logic circuits: Logic circuits that do not have memory. The output depends only on the current input. They can be specified fully with a truth table or a logic equation Other than logic gates that are the most basic building blocks, there also exist some higher-level basic building blocks that are also commonly used: Decoders/encoders Multiplexors Two-level logic and PLs These building blocks can be implemented using ND, OR, and NOT gates only. OMP2611 Fall 2015

Decoder 15 decoder (N-to-2 N decoder) is a logical block with an N-bit input and 2 N 1-bit outputs. The output that corresponds to the input bit pattern is true while all other outputs are false. Example (3-to-8 decoder): 3 Decoder Out0 Out1 Out2 Out3 Out4 Out5 Out6 Out7 a. 3-bit decoder n encoder performs the inverse function of a decoder, taking 2 N inputs and producing an N-bit output. OMP2611 Fall 2015

Multiplexor 16 multiplexor (or selector) selects one of the data inputs as output by a control input value. multiplexor can have an arbitrary number of data inputs: Two data inputs require one selector input. N data inputs require selector inputs. log 2 N Example (2-input multiplexor): ( S) ( S) Data inputs 0 M u x 1 S Selector inputs S OMP2611 Fall 2015

Two-Level Logic 17 ny logic function can be expressed in a canonical form as a twolevel representation: Every input is either a variable or its negated form. One level consists of ND gates only. The other level consists of OR gates only. Sum-of-products representation: E.g., E ( ) ( ) ( ) More commonly used than product-of-sums representation. Product-of-sums representation: E.g., E ( ) ( ) ( ) OMP2611 Fall 2015

Example 18 Show the sum-of-products representation for the following truth table: Inputs Output D 0 0 0 0 0 0 1 0 0 1 0 0 0 1 1 1 1 0 0 0 1 0 1 1 1 1 0 1 1 1 1 1 Only those table entries for which the output is 1 generate corresponding terms in the equation nswer: D ( ) ( ) ( ) ( ) It s a 3-person voting system Minterm: a group of variables NDed where either the variable or its negation is represented ny logic function can be represented as a SUM of minterms OMP2611 Fall 2015

Programmable Logic rrays 19 programmable logic array (PL) is a gate-level implementation of the two-level representation for any set of logic functions, which corresponds to a truth table with multiple output columns. PL corresponds to the sum-of-products representation. Inputs ND gates ND plane Product terms OR plane OR gates Outputs OMP2611 Fall 2015

Example - Problem Show a PL implementation of this example: Sum-of-product representation Inputs Outputs D E F 0 0 0 0 0 0 0 0 1 1 0 0 0 1 0 1 0 0 0 1 1 1 1 0 1 0 0 1 0 0 1 0 1 1 1 0 1 1 0 1 1 0 1 1 1 1 0 1 OMP2611 Fall 2015 20 F E D

Example - nswer 21 There are seven unique product terms with at least one true value in the output section, and hence there are seven columns in the ND plane. There are three inputs and hence the number of rows in the ND plane is three. Inputs Outputs D E F 0 0 0 0 0 0 0 0 1 1 0 0 0 1 0 1 0 0 0 1 1 1 1 0 1 0 0 1 0 0 1 0 1 1 1 0 1 1 0 1 1 0 1 1 1 1 0 1 Inputs ND Plane Outputs D E F OR Plane There are three outputs and hence the number of rows in the OR plane is three. OMP2611 Fall 2015

Example - nswer (cont'd) n equivalent PL representation: Inputs D E F Outputs ND plane OR plane OMP2611 Fall 2015 22 F E D

Simplifying Logic Equations 23 Truth tables can grow rapidly in size and become tedious. Logic equations are better in this case, however, there are many different ways of writing a oolean expression, each of them will lead to a circuit implementation Simplifying oolean expressions leads to simpler and cheaper circuits (lesser components) There are many formal methods, algorithms and software for simplifying oolean expressions Karnaugh-Maps (K-maps) is one such method that can be run by hand for designing simple circuits OMP2611 Fall 2015

K-Maps 24 K-Map is a graphical representation of the truth table or logic function In a K-map each cell represents one possible minterm ells are arranged following a Gray code i.e., two adjacent cells are such that the corresponding minterms differ in only one variable Examples: K-Map Layouts 0 1 0 m0 m1 1 m2 m3 00 01 11 10 0 m0 m1 m3 m2 1 m4 m5 m7 m6 D 00 01 11 10 00 m0 m1 m3 m2 01 m4 m5 m7 m6 11 m12 m13 m15 m14 10 m8 m9 m11 m10 OMP2611 Fall 2015

K-map Simplification Rules 25 Find largest size groups of adjacent cells at 1 2 N (i.e. 1, 2, 4, 8) adjacent cells in each group K-map is toroid(i.e., rightmost cells are adjacent to the leftmost cells and topmost cells are adjacent to bottom cells) Larger groups = fewer inputs to the ND gate Fewer groups = fewer ND gates and fewer inputs to OR gate est group might not be unique Example: Simplify F 0 1 0 1 0 1 0 0 1 1 1 1 F OMP2611 Fall 2015

K-Map Example 26 Simplify the logic expression for the 3-person voting system on page 18 D ( ) ( ) ( ) ( ) 00 01 11 10 0 0 0 1 0 1 0 1 1 1 F = + + OMP2611 Fall 2015

7-segment Digital Display 27 Use 7-segment digital display to display one Hexadecimal digit Each segment is represented by a logic function Tasks: Give the truth table for segment G How many inputs needed? Deduce the sum-of-products logic equation from the table Use K-Map to simplify the logic equation OMP2611 Fall 2015

28 Truth Table for segment G (try to fill segment as exercise): Using the table we have 12 minterms for segment G in the logic expression OMP2611 Fall 2015 Inputs Output i 3 i 2 i 1 i 0 G 0 0 0 0 0 0 0 0 1 0 0 0 1 0 1 0 0 1 1 1 0 1 0 0 1 0 1 0 1 1 0 1 1 0 1 0 1 1 1 0 1 0 0 0 1 1 0 0 1 1 1 0 1 0 1 1 0 1 1 1 1 1 0 0 0 1 1 0 1 1 1 1 1 0 1 1 1 1 1 1

29 K-Map: i 1 i 0 i 3 i 2 00 01 11 10 00 0 0 1 1 01 1 1 0 1 11 0 1 1 1 10 1 1 1 1 G = i 1 i 0 + i 3 i 2 + i 3 i 0 + i 2 i 1 + i 3 i 2 i 1 onclusion: efore simplification we would need 12 ND gates with 4 inputs each and one OR gate with 12 inputs fter we only need 3 ND gates with 2 inputs one ND gate with 3 inputs and one OR gate with 4 inputs OMP2611 Fall 2015