HICUM release status and development update L2 and L0 M. Schröter, A. Pawlak 17th HICUM Workshop Munich, Germany May 29th, 2017
Contents HICUM/L2 in a nutshell Release of HICUM/L2 version 2.4.0 Strong avalanche ICK as function of VBC Model verification by circuit application HICUM/L0 Summary
HICUM/L2 in a nutshell, Q BCx B Q js,, Q BCx R Bx i jsc i jbcx QdS B * S i TS C rbi R* bi C su C i jbci B Q jci R su Q jei S intrinsic transistor R Cx Q i r AVL i T Qf C thermal network ΔT j T C BEpar1 i jbep C BEpar2 Q jep i BEtp i jbei E R E i BEti P R th C th V nc noise correlation E V nb vertical NQS effects Q f,nqs I nc = 2qI T 1S. V nc I nb = 2qI jbei 1S. V nb Q f,qs τ f α Qf R=τ f 2 T b1 =1+jωτ f B f (2α qf -α IT ) noiseless intrinsic T b2 =jωτ f α IT T b1 V nb T b2 V nc transistor 1S. V nc i T,qs τ f V C1 V C2 τ f α IT V C1 τ f i T,nqs =V C2 α IT 3 R=τ f => Complete HICUM/L2 equivalent circuit... as implemented and employed for production circuit design in EDA tools more complicated than most circuit designers assume
Intrinsic transistor: Transfer current Generalized Integral Charge-Control Relation (GICCR) exact solution of 1D drift-diffusion transport equation "Master" equation => guides physics-based extensions V B'E' exp ---------- V T exp V ---------- B'C' V T I T = c 0 ---------------------------------------------------------- Q ph with constant c 0 = ( qa E ) 2 V T μ nr n ir weighted charge Q ph = qa E hpdx x C' 0 2 dϱ/dvb C /1018 cm 3 10 6 2 0 2 includes internal collector => simplifies equivalent circuit E B C* C x jc w Ci x Cc RCi x bl N Ci 10 20 10 19 10 18 20 40 60 80 100 120 1017 x /nm D/cm 3 B Q BCi Q BEi E i T C
Base current components Intrinsic transistor emitter back injection and SCR recombination BE tunneling (presently only band-to-band tunneling) BC diode BC avalanche current (impact ionization) Depletion charges BE depletion charge: smooth & measurement compatible forward bias limiting BC depletion charge: punch-through effect & smooth forward bias limiting Mobile charge Q m base width and collector SCR bias dependence (at low current densities) physics- based charge formulation for high-current effects including - carrier injection into collector, on-set current - BC barrier effect in base and collector charge - collector current spreading τ f0 0 BC SCR Early-effect V C B or V C E NQS effects (I T and Q m ), correlated noise
Internal base resistance External transistor conductivity modulation (all bias ranges) emitter current crowding for rectangular and circular geometries BE perimeter effects current and charge storage from carrier injection BTB tunneling External base region BC depletion and parasitic capacitance distributed BC capacitance across external base resistance parasitic BE capacitance Collector-substrate region CS depletion capacitance simple substrate transistor model (transfer and base current, mobile charge) simple bottom and perimeter related substrate coupling network... plus temperature dependence, self-heating, noise
Release of HICUM/L2 version 2.4.0 Released in April 2017 New model for strong avalanche breakdown => modeling until BV CBO Some minor bug-fixes, parameter range changes... - partially based on IFAG feedback on the code Runtime improvements - reduced number of calculated derivatives I CK (V B C ) not yet included still in verification process New versioning scheme (acc. to CMC): 2.xx -> 2.x.x
Strong avalanche goal: accurate current modeling up to BVCBO Extension of the existing weak avalanche model to also include strong avalanche q AVL f AVL ( V DCi V B'C' ) exp --------------------------------------------- C jci ( V DCi V B'C' ) I AVL = I T ------------------------------------------------------------------------------------------------------------------------ q AVL 1 f AVL ( V DCi V B'C' ) exp --------------------------------------------- C jci ( V DCi V B'C' ) Based on the existing weak avalanche model, the extension can be written as I AVL weak I AVL = ------------------------ = 1 k AVL g I T g ------------------------ 1 k AVL g
Strong avalanche Denominator 1 k AVL g is limited to values larger than zero by a smoothing function ( 1 k AVL g) + ( 1 k AVL g) 2 + a AVL h l = ------------------------------------------------------------------------------------------ 2 - a AVL fixed value - requests to make it available as model parameter k AVL is modeled temperature dependent by k AVL ( T) = k AVL ( T 0 ) exp( α KAV ΔT) => additional model parameter (ALKAV) α KAV
Backward compatibility and application Extension is fully backward compatible to previous HICUM/L2 versions - Also: already existing parameter values (favl, qavl) can be re-used to extend existing model cards by new feature. Model application to experimental data - The same favl and qavl are used for HICUM/L2 v2.34 and new v2.4.0 For application, see M. Jaoul, "Modeling Avalanche modeling featuring SiGe HBTs Characteristics up to BVCBO", this HICUM WS 2017
I CK as function of V BC Critical current for high-current effects I CK = V ceff ----------- -------------------------------------------------------------------- 1 1 R Ci0 1 + ( V ceff V lim ) β 1 β ICK ICK [ ] v+ v 2 + a ICKpt + ---------------------------------------- 2 - V ceff is a function of V ci that was calculated in previous versions (until v2.34) as V ci = V C'E' V CEs => replaced by using internal base-collector voltage: V ci = V DCi V B'C' => I CK becomes a function of V BC instead of V CE
Backward compatibility I CK change is not backward compatible, but backward compatibility is maintained by flag! Adjustments in V DCi may be required in order to maintain accurate f T curves. Advantages of new version - no dependence of I T and Q f on V C E branch anymore, only on V B E and V B C - reduction of compiled code size (CEDIC in-house simulator: 833 kb -> 773 kb)
Application New formulation yields similar results as previous version, including temperature dependence at higher V CB, V CE f T (GHz) 350 300 250 200 150 100 meas V C'E' V B'C' 50 0 V BC /V = -0.5, 0, 0.5 10 0 10 1 10 2 I C (ma) Not released yet. 0 10 0 10 1 10 2 I C (ma) More detailed investigation of T dependence at lower voltages required before final release f T (GHz) 350 300 250 200 150 100 50 T meas V C'E' V B'C'
Summary of model parameter changes Following list summarizes changes in model parameters from version 2.34 to 2.4.0 Parameter default range note kavl 0 [0:3] new in 2.35 alkav 0 new in 2.35 aavl 0.01 (0:10] new in 2.35 ibets 0 [0:50] ahc 0.1 (0:50] increased maximum (BE tunneling current increased maximum (injection width)
Model verification by circuit application W-band low-power frequency tripler V cc = 0.5 V, 96 GHz output signal from 32 GHz input signal Highly non-linear circuit example for testing HICUM/L2 accuracy in saturation OP I C = 1.8 ma => f T > 220 GHz P diss = 1.8 mw (w/o buffer) @ -10 dbm output => very good agreement between simulation and measured data
240 GHz 4-stage differential LNA simulation vs. measurement [S. Malz et al., JSSC 2015] [B. Ardouin et al., CSICS 2015] S parameter comparison SGPM impact of transistor model SUB excellent accuracy of HICUM allows identification of relevant physical effects NQS impact of physical effects SH excellent model accuracy enables first pass mm-wave circuit design
HICUM/L0 HICUM/L0 complete equivalent circuit Q js Q BCx i TS i jsc i jbci Q jci C Q r i AVL R Cx S C B C BEpar R B i jbei E B R E i T Q jei Qf intrinsic transistor P thermal network ΔT j R th C th T E vertical NQS effects Q f,qs τ f Q f,nqs α Qf R=τ f i T,qs τ f V C1 V C2 τ f α IT V C1 τ f i T,nqs =V C2 α IT 3 R=τ f => strongly simplified equivalent circuit and model equations
Standardization by CMC Requested initiated by ST Standardization by CMC comprises four phases: - phase I: build a working group => done - phase II: physical model evaluation => done (by comparison to experimental data) - phase III: functional model evaluation => currently in progress - phase IV: preparation for industrial use
Functional model evaluation status Focus on runtime comparisons for different scenarios Comparison between HICUM/L0 and SGPM or VBIC - VBIC as superset of SGPM and direct competitor in some foundry PDKs - VBIC (SPGM) model cards available from SG13G2 - HICUM/L0 model cards generated from HICUM/L2 Commercial simulators: ADS and Spectre - realistic scenario Use of in-house circuit simulator - additional benchmarking options
Comparison scenarios Single transistor evaluation - Minimize output variables (dependent on simulator capabilities) to minimize time for storage I/O - Minimize matrix size in circuit simulator => solution time negligible vs. model evaluation time Circuit based model evaluation (also vs. hardware) - frequency tripler relevant for verifying non-linear transistor operation transistors operated different conditions, including saturation (LP design) - Ring-oscillator with (large) load fast switching of transistors with strong impact of highly nonlinear (high-current) charge - [Frequency divider] high current effects during quad switching
Runtime reduction Goal: minimize model runtime Remove some presently available features -... or turned-off by default at almost no cost of runtime Candidates for effects to be turned-off - bias dependence of reverse Early effect - DC emitter current crowding - all parasitic substrate transistor elements or just dynamic portion - transfer current: more simplified solution possible? - NQS effects (very time consuming during transients) - self-heating
Application of HICUM/L0 Physical model evaluation SG13G2 (IHP) - CBEBC transistors - A E = 0.13 x 5.16 µm 2 - V CB = -0.5.. 0.5 V Automated model conversion from L2 - manual modification of R B -parameters for f max required IC/mA,IB/mA 10 2 10 1 10 1 10 2 10 3 10 4 10 5 0.5 V 0.3 V 0V -0.3 V -0.5 V model 0.75 0.8 0.85 0.9 0.95 1.0 1.05 V BE /V IC/mA 40 35 30 25 20 15 10 5 meas model 0.8 0.85 0.9 0.95 1.0 1.05 V BE /V
SG13G2 output curves 8 7 meas model 10 1 meas model JC/ ( ma/μm 2) 6 5 4 3 2 JB/ ( ma/μm 2) 10 2 10 3 10 4 10 5 1 10 6 0 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 V CE /V 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 V CE /V 6 5 meas model 0.9 JC/ ( ma/μm 2) 4 3 2 1 0 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 V CE /V VBE/V 0.85 0.8 0.75 meas model 0.0 0.5 1.0 1.5 2.0 V CE /V
SG13G2 Small-signal characteristics ft/ghz 300 250 200 150 100 0.5 V 0.3 V 0V -0.3 V -0.5 V model fmax/ghz 500 400 300 200 0.5 V 0.3 V 0V -0.3 V -0.5 V model 50 100 0 10 1 2 5 1 2 5 10 2 5 10 2 I C /ma 0 10 2 10 1 1 10 10 2 I C /ma MSG/MAG/dB 40 35 30 25 20 15 10 5 0.1mA/μm 2 1mA/μm 2 11 ma/μm 2 model 0 2 5 1 2 5 10 2 5 f/ghz
SG13G2 Small-signal parameters I{Y 11 } / ( ms/μm 2) 10 2 10 1 2GHz 10GHz 20GHz 40GHz model I{Y 12 } / ( ms/μm 2) 10 5 2 1 5 2 2GHz 10GHz 20GHz 40GHz model 10 1 10 1 2 5 1 2 5 10 2 5 10 2 J C / ( ma/μm 2) 10 1 10 1 2 5 1 2 5 10 2 5 10 2 J C / ( ma/μm 2) R{Y 21 } / ( ms/μm 2) 10 3 10 2 10 2GHz 10GHz 20GHz 40GHz model R{Y 22 } / ms/μm 2 10 1 10 1 10 2 2GHz 10GHz 20GHz 40GHz model 1 10 1 2 5 1 2 5 10 2 5 10 2 J C / ( ma/μm 2) 10 3 10 1 2 5 1 2 5 10 2 5 10 2 J C / ( ma/μm 2)
Final note Since HICUM/L2 is available for critical transistors in a circuit and HICUM/L0 characteristics can be matched to L2 characteristics in the region of L0 s validity => there is no need to make L0 more complicated than necessary
HICUM/L2 in a nutshell Summary more detailed information in: M. Schroter and A. Chakravorty, Compact hierarchical modeling of bipolar transistors with HICUM, World Scientific, Singapore, 2010,ISBN 978-981-4273-21-3 => please use this document as HICUM reference in your publications HICUM/L2 release of version 2.4.0 - extended model for avalanche breakdown - verified on devices and circuits from latest SiGe HBT technologies HICUM/L0: presently in phase 3 of standardization process