DSP Design Lecture 2. Fredrik Edman.

Similar documents
Numbering Systems. Computational Platforms. Scaling and Round-off Noise. Special Purpose. here that is dedicated architecture


Analysis of Finite Wordlength Effects

ECE4270 Fundamentals of DSP Lecture 20. Fixed-Point Arithmetic in FIR and IIR Filters (part I) Overview of Lecture. Overflow. FIR Digital Filter

Vel Tech High Tech Dr.Ranagarajan Dr.Sakunthala Engineering College Department of ECE

Number Representation and Waveform Quantization

FINITE PRECISION EFFECTS 1. FLOATING POINT VERSUS FIXED POINT 3. TYPES OF FINITE PRECISION EFFECTS 4. FACTORS INFLUENCING FINITE PRECISION EFFECTS

DSP Configurations. responded with: thus the system function for this filter would be

REAL TIME DIGITAL SIGNAL PROCESSING

Digital Signal Processing

Optimum Ordering and Pole-Zero Pairing of the Cascade Form IIR. Digital Filter

14:332:231 DIGITAL LOGIC DESIGN. Why Binary Number System?

3 Finite Wordlength Effects

ECE380 Digital Logic. Positional representation

Chapter 4 Number Representations

Practical Considerations in Fixed-Point FIR Filter Implementations

Optimum Ordering and Pole-Zero Pairing. Optimum Ordering and Pole-Zero Pairing Consider the scaled cascade structure shown below

Data Converter Fundamentals

E : Lecture 1 Introduction

UNSIGNED BINARY NUMBERS DIGITAL ELECTRONICS SYSTEM DESIGN WHAT ABOUT NEGATIVE NUMBERS? BINARY ADDITION 11/9/2018

Numbering Systems Basic Building Blocks Scaling and Round-off Noise. Number Representation. Floating vs. Fixed point. DSP Design.

Chapter 1 CSCI

IT DIGITAL SIGNAL PROCESSING (2013 regulation) UNIT-1 SIGNALS AND SYSTEMS PART-A

ECE260: Fundamentals of Computer Engineering

Second and Higher-Order Delta-Sigma Modulators

Numbers and Arithmetic

ALU (3) - Division Algorithms

Oversampling Converters

Finite Word Length Effects and Quantisation Noise. Professors A G Constantinides & L R Arnaut

EE260: Digital Design, Spring n Digital Computers. n Number Systems. n Representations. n Conversions. n Arithmetic Operations.

Hakim Weatherspoon CS 3410 Computer Science Cornell University

Determining Appropriate Precisions for Signals in Fixed-Point IIR Filters

Mark Redekopp, All rights reserved. Lecture 1 Slides. Intro Number Systems Logic Functions

What is Binary? Digital Systems and Information Representation. An Example. Physical Representation. Boolean Algebra

VALLIAMMAI ENGINEERING COLLEGE. SRM Nagar, Kattankulathur DEPARTMENT OF INFORMATION TECHNOLOGY. Academic Year

UNIT 1. SIGNALS AND SYSTEM

CHAPTER 2 NUMBER SYSTEMS

Introduction to Digital Logic Missouri S&T University CPE 2210 Subtractors

Notes for Chapter 1 of. Scientific Computing with Case Studies

Lecture 9 Video Coding Transforms 2

Lecture 7 - IIR Filters

Arithmetic and Error. How does error arise? How does error arise? Notes for Part 1 of CMSC 460

EAD 115. Numerical Solution of Engineering and Scientific Problems. David M. Rocke Department of Applied Science

CPE100: Digital Logic Design I

EE 5345 Biomedical Instrumentation Lecture 12: slides

DFT & Fast Fourier Transform PART-A. 7. Calculate the number of multiplications needed in the calculation of DFT and FFT with 64 point sequence.

Elements of Floating-point Arithmetic

Efficient algorithms for the design of finite impulse response digital filters

Digital Systems Roberto Muscedere Images 2013 Pearson Education Inc. 1

ECE 372 Microcontroller Design

COMBINATIONAL LOGIC FUNCTIONS

Combinational Logic Design Arithmetic Functions and Circuits

E40M. Binary Numbers. M. Horowitz, J. Plummer, R. Howe 1

Numbers and Arithmetic

Ex code

Cs302 Quiz for MID TERM Exam Solved

DESIGN OF QUANTIZED FIR FILTER USING COMPENSATING ZEROS

Fundamentals of Digital Design

convert a two s complement number back into a recognizable magnitude.

EE 521: Instrumentation and Measurements

Logic. Combinational. inputs. outputs. the result. system can

Higher-Order Σ Modulators and the Σ Toolbox

What does such a voltage signal look like? Signals are commonly observed and graphed as functions of time:

Digital Filter Implementation 1

EE482: Digital Signal Processing Applications

14:332:231 DIGITAL LOGIC DESIGN. 2 s-complement Representation

Analysis of methods for speech signals quantization

EE5585 Data Compression April 18, Lecture 23

Complement Arithmetic

ELEN Electronique numérique

Lecture 19 IIR Filters

Lecture 2 Review on Digital Logic (Part 1)

An Fir-Filter Example: Hanning Filter

Four Important Number Systems

ENGIN 112 Intro to Electrical and Computer Engineering

CMPT 889: Lecture 3 Fundamentals of Digital Audio, Discrete-Time Signals

Stability Condition in Terms of the Pole Locations

Chapter 1 Mathematical Preliminaries and Error Analysis

Seminar: D. Jeon, Energy-efficient Digital Signal Processing Hardware Design Mon Sept 22, 9:30-11:30am in 3316 EECS

How do computers represent numbers?

INTRODUCTION TO DELTA-SIGMA ADCS

Digital Techniques. Figure 1: Block diagram of digital computer. Processor or Arithmetic logic unit ALU. Control Unit. Storage or memory unit

Numerical Analysis and Computing

Analog vs. discrete signals

The Cooper Union Department of Electrical Engineering ECE111 Signal Processing & Systems Analysis Final May 4, 2012

DISCRETE-TIME SIGNAL PROCESSING

ELEN E4810: Digital Signal Processing Topic 11: Continuous Signals. 1. Sampling and Reconstruction 2. Quantization

Mathematical preliminaries and error analysis

Digital Systems and Information Part II

Binary addition example worked out

Elements of Floating-point Arithmetic

Discrete Time Signals and Switched Capacitor Circuits (rest of chapter , 10.2)

MAHARASHTRA STATE BOARD OF TECHNICAL EDUCATION (Autonomous) (ISO/IEC Certified) State any two Boolean laws. (Any 2 laws 1 mark each)

Ch. 7: Z-transform Reading

Higher-Order Modulators: MOD2 and MODN

Introduction to Digital Logic Missouri S&T University CPE 2210 Number Systems

Digital Systems Overview. Unit 1 Numbering Systems. Why Digital Systems? Levels of Design Abstraction. Dissecting Decimal Numbers

What s the Deal? MULTIPLICATION. Time to multiply

Lecture 10, ATIK. Data converters 3

Transcription:

DSP Design Lecture Number representation, scaling, quantization and round-off Noise Fredrik Edman fredrik.edman@eit.lth.se

Representation of Numbers

Numbers is a way to use symbols to describe and model the world! However, numbers may be represented in many different ways and there are considerations to make when it comes to digital signal processing!

Definition: Radix In a mathematical numeral system, the radix or base is the number of unique digits, including zero, used to represent numbers in a positional numeral system. Example: In the decimal system (the most common system in use today) the radix is 10, because it uses the ten digits from 0 through 9. The number 47 may then be written as: 47 10 0 1 3 4 5 6 7 8 9, 10 11 1 13 14 Base 10

Definition: Radix Each position have its on weight depending on the current base. 15 10 = 1*100 + *10 + 5*1 = 1*10 + *10 1 + 5*10 0 Representing fractions is a simple extension of this idea. 5.43 10 = *10 + 5*1 + 4*0.1 + 3*0.01 = *10 1 + 5*10 0 + 4*10-1 + 3*10 -

l i= k 1 Unsigned Number Representation General description of a fixed radix (base) systems (fixed point positional number system) r i a i a {0,1,,... r 1} r The digits in a radix system: = k 1 k 1 0 1 l k 1 k 1 0 1 l = r a + r a ra + ra + r a r a described in a fixed point positional number system: a a a a. a a i i 1 1 0 1 l Whole part Fractional part digit set

What about numbers in DSP? In DSP, numbers are encoded by means of binary digits or bits {0,1}. For binary digits the base =. All (base 10) numbers can be represented by groups of bits, for example 86 10 = 1* 6 + 0* 5 + 1* 4 + 0* 3 + 1* + 1* 1 + 0* 0 or 86 10 = 1010110

Binary numbers (base=) Representing unsigned integers MSB = Most Significant Bit LSB = Least Significant Bit N bits 1 0 0 0 0 (0) 0 0 1 (1) 0 1 0 () 0 1 1 (3) 1 0 0 (4) 1 0 1 (5) 1 1 0 (6) 1 1 1 (7) In base 10 N words Ex. 101 = 5 10

l i= k 1 10 i a i Example: Unsigned Number = { a {0,1,,... 9} in radix 10} k 1 1 0 a k 1 1 1 0 1 l k ak a a a a l = 10 + 10 10 + 10 + 10 10 l i= k 1 i a i = { a {0, 1} in radix } k 1 1 0 a k 1 1 1 0 1 l k ai a a a a l = + + +

Signed Numbers and Fractions But we also need to represent numbers like -34 10 and 5.43 10 in binary. Devote 1 bit to indicate sign: 1101 1101 = -18 + 64 + 0 + 16 + 8 + 4 + 0 + 1 = -35. Fractions can be expressed like this 0.65 10 = 1*0.5 + 0*0.5 + 1*0.15 = 1* -1 + 0* - + 1* -3 = 0.101 However there are also other possibilities!

Number Representation Fixed point & Floating point

Fixed point & Floating point Digital signal processing number representation can be separated into two categories - fixed point and floating point. These designations refer to the format used to store and manipulate numeric representations of data. Fixed-point DSPs are designed to represent and manipulate integers positive and negative whole numbers. Floating-point DSPs represent and manipulate rational numbers.

Fixed point In fixed point we only have a single value (n) In fixed-point representation, a specific radix point (decimal point in English. ) is chosen so there is a fixed number of bits to the right (fractional bits) and a fixed number of bits to the left (integer bits) of the radix point.

Floating point In floating point a value is represented by mantissa (m) determining the resolution/precision exponent (e) determining the dynamic range m b e In floating-point representation, the placement of the decimal point can float relative to the significant digits of the number.

Floating vs. Fixed point - Design Considerations With fixed-point notation, the gaps between adjacent numbers are always equal a value of one, whereas in floating-point notation, gaps between adjacent numbers are not uniformly spaced (ANSI/IEEE Std. 754 standard format), with large gaps between large numbers and small gaps between small numbers. Floating point gives higher dynamic range but often high cost in: energy area calculation time For energy efficient implementations fixed point is preferred, however fixed-point numbers are more susceptible to common numeric computational inaccuracies. When choosing number representation you also need to consider - Cost - Performance - Ease of implementation/development - Cell library?

There are different fixed point numbering systems! Sign Magnitude One s Complement Two s Complement Etc.

Signed Magnitude Unsigned numbers with a sign-bit (MSB = sign bit) 000 111-101 0-3 1 Signed Magnitude 001 110 010-1 3 0 011 - Two Zeros + Low Power? + Easy to convert to Negative (flip bit) 100

One s Complement Signed numbers by inverting (Complement) 000 111-1 0 0 1 One's Complement 001 110 010 - Two Zeros + Easy to convert to Negative (invert) 101 - -3 3 011 100

Two s Complement Most widely used fixed point numbering system 111-101 -1 000 0 Two's Complement Complement + LSB + One Zero + Easy Add/Sub - Not so easy to convert to Neg. 001 110 010-3 - 4 100 1 3 011 Add operation for negative numbers is identical to the add operation for positive numbers, so no additional logic is required to handle the negative case.

Table of number representations Wikipedia

Considerations Much to consider when choosing between fixed point or floating point representaion. Type of application, development time, cost, tools, etc. will influence your choice! Choosing different fixed point numbering systems will also influence your design!

Quantization Ch. 11.1 11.4 in Phari Overview of Effects of Finite Register Length in DSP (download from homepage)

What is Quantization? Quantization, in mathematics and in DSP, is the process of mapping a large set of input values to a (countable) smaller set. The operations rounding and truncation are typical examples of quantization processes. Quantization is involved to some degree in nearly all digital signal processing, as the process of representing a signal in digital form ordinarily involves rounding.

Quantization Mainly two types: Signal Quantization Coefficient Quantization

Signal Quantization x s [n] sampled waveform x a (t) T = sample period 3T T T 0 T T 3T 4T 3 1 0 1 3 4 time samples, n x a (t) S&H x s [n] x[n] ˆ xˆ B [n] Quantizer Coder T A/D

Signal Quantization

Different quantization techniques can be applied Level Linear Quantization: Same distance between quantization levels indepentent of input voltage, i.e. quantization error is the same for all input signal. Input Voltage What happens with the SNR? Higher SNR for high signal levels.

Different quantization techniques can be applied Level Non-Linear Quantization: Unequal distance between quantization, e.g. closer levels at lower signal levels. A fixed SNR can be achieved or higher SNR in most important areas. Input Voltage More complex quantization process

Quantization effects Round-off Noise Affect the output as a random disturbance Limit Cycle Oscillations Undesired periodic components due to non-linear behavior in the feedback (rounding or overflow)

Coefficient Quantization IIR filter x(n) + b 0 + y(n) + + a 1 a n-1 a n Z -1 Z -1 Z -1 b 1 b m-1 b m + + Filter becomes unstable! Non-ideal transfer function!

Rounding & Truncation Rounding/Truncation is always there! Especially necessary in recursive systems Q x(n) y(n) Without quantization - infinite wordlength Multiplication n+m output bits Addition n+1 output bits

Truncation & Rounding Level X+1 Level X+1 Level X Level X Truncation All values approximated in the same direction Max error = 1LSB Rounding Values approximated up or down Max error = 1/ LSB

Different rounding schemes y round down (towards ) round up (towards + ) round towards zero round away from zero +3.67 +3 +4 +3 +4 +4 +3.50 +3 +4 +3 +4 +4 +3.35 +3 +4 +3 +4 +3 +3.00 +3 +3 +3 +3 +3 0 0 0 0 0 0 3.00 3 3 3 3 3 3.35 4 3 3 4 3 3.50 4 3 3 4 4 3.67 4 3 3 4 4 round to nearest

Rounding & Truncation No energy added to the system Often used in recursive algorithms Truncation 001 010 Rounding 001 010 Truncation towards zero 001 010 001 001 001-4 -3 - -1 111 1 3 In -4-3 - -1 1 3 In -4-3 - -1 1 3 In 111 111 110 110 110 101 101 101 100 DC error All values goes towards -infinity 100 Rounded to even 100 Add LSB before truncation if negative

Scaling Scaling is about adjusting the signal range to fit the hardware. Unchanged transfer function (scaled coefficients might move the pole-zeros) However you might loose in precision!

An example where scaling is needed x(n) - 0.5 y(n) x(n) 1 x( n) = ± 3 4 y(n) 1 1 x, y < Overflow 1 y(n) 1

Scaling to avoid overflow x(n) f(n) y(n) Safe scaling if x(n) 1 β f(n) β y(n) β = i= 0 f ( i) ( l 1 scaling in the book) Where f(i) is the unit sample response

Example 1: Safe Scaling i= 0 i= 0 ( 05) β = f(i) =. = 0 1 1 05 + 05 + 05 + = = 1 05. (. ) (. ) (. ) i Geometric series - 0.5-0.5 u(n) x(n) u(n) x(n) Original filter with overflow 0.5

Example : Safe Scaling = 7 x( n) and y( n) 7 give safe scaling β = i 0 f(i) = 0. 3 + 0. 7 + 1.5 = 3.5 x(n) /7 0.3-0.7 1.5 y(n) h(n) Increased roundoff noise Internal scaling might improve 7/ (Linear phase FIR)

Scaling Safe scaling is pessimistic Alternative is scaling with i= In practice: Scaling with β = ±n Easy to do - a shift β = 0 ( f () i ) (l scaling in the book) Increased internal wordlength an alternative However, overflow may occur!!

Summary Scaling Techniques l 1 - scaling β = f ( i), Safe scaling i= 0 l - scaling β = δ i= 0 f i possible overflow ( ), ( ) = unit sample response, ( ) = Variance white noise input i= 0 f i f i Safe scaling but not guaranteed δ sets the probability for an overflow Typically one overflow every 10 6 sample is accepted in audio [Wanhammar]

Limit Cycles

Limit Cycles Oscillations Limit cycle oscillations can be described as the undesirable periodic components at the output due to the fact that quantization is a nonlienear operation.

Limit Cycles Oscillations Example: zero input oscillations in nd order IIR Q b Q b 1 X(n) y(n) b 489 15 = = 1.9101565; b = = 0.9375 56 16 1

Limit Cycles Zero Input Example: zero input oscillations Rounding after multiplication Truncation after multiplication Source: Lars Wanhammar, DSP Integrated circuits

Limit Cycles Zero input oscillations Not accepted in some applications such as in audio applications. Very difficult problem -1-0.5 0 0.5 1 Real Part In general, no solutions for structures > nd order Can be limited by increased internal wordlength Can in some nd order structures be eliminated by pole positioning nd order Wave Digital Filters are free from parasitic oscillations Imaginary Part 1 0.8 0.6 0.4 0. 0-0. -0.4-0.6-0.8-1 Poles close to the unity circle Matlab: zplane(1,[1-1.9101565 0.9375])

We may also get Overflow Oscillations 3-bit two s complement sum 3 1 1 3 Correct sum Oscillations are limited by saturation 3-bit saturated sum 3 1 1 3 Correct sum Overflow change the sign

Limit Cycles due to overflow Zero Input Two s Complement Arithmetic Saturated Arithmetic Source: Lars Wanhammar, DSP Integrated circuits

Saturation Arithmetic From Adder C out-msb 0 = NOF C out-msb C in-msb C in-msb Signbit 1 = POF Saturated Output Overflow if C out-msb differs from C in-msb

Simple Noise Analysis

Quantization Analysis Using real rounding, truncation, and overflow Gives exact result Tricky - need integer representation Using noise models Floating point representation can still be used Suitable for Matlab, C/C++...

Wordlength (W) = 8 bits (W-1) 15 bits a 8 bits Rounding Model a Q e(n) u(n) 8 bits y(n) u(n) y(n)

Wordlength (W) = 8 bits 15 bits a 8 bits Rounding Model a Q u(n) 8 bits y(n) u(n) ( ) u n y(n) e(n) ( ) en ( ) = u n un ( ) Modeled with added noise as an input error

Analysis of Round-off Noise We need to analyze the round-off noise to determine its effect on the output signal! If the noise variance is not negligible in comparison with the output signal level the wordlength must be increased or some low-noise structure must be used!

Roundoff Noise If the quantization error probability is uniformly distributed in the interval e( n) where = ( W 1) W is the number of bits after the rounding P e (e), ½ LSB Probability density function 1 e

Statistical model of e(n) The statistical model is based on the following assumptions: 1. e(n) is a sample sequence of a stationary random process.. e(n) is uncorrelated with x(n) 3. The error is a white noise process 4. The probability distribution of the error process is uniform over the range of the quantization error. It is easy to find situtations where this is not valid, e.g. if x(n) is a square wave. However, when x(n) is complicated, e.g. speech or music, the assumptions are realistic.

Roundoff Noise / ( ) ( ) / Mean value e = E[ e( n)] = 0 Variance = E[ e e ] = e e P ( e) de = [ e = 0] / 3 / 3 3 1 W 1 e 1 /8 /8 e de = = = = 3 3 3 1 3 / / P e (e) e ½ LSB 1 e

Roundoff Noise / ( ) ( ) Variance = E[ e e ] = e e P ( e) de = [ e = 0] / Mean value e = E[ e( n)] = 0 / 3 / 3 3 1 W 1 e 1 /8 /8 e de = = = = 3 3 3 1 3 / / P e (e) e ½ LSB 1 e

Roundoff Noise / ( ) ( ) Variance = E[ e e ] = e e P ( e) de = [ e = 0] / Mean value e = E[ e( n)] = 0 / 3 / 3 3 1 W 1 e 1 /8 /8 e de = = = = 3 3 3 1 3 / / P e (e) e ½ LSB 1 e

Roundoff Noise / ( ) ( ) Variance = E[ e e ] = e e P ( e) de = [ e = 0] / Mean value e = E[ e( n)] = 0 / 3 / 3 3 1 W 1 e 1 /8 /8 e de = = = = 3 3 3 1 3 / / P e (e) e ½ LSB 1 e

Example: Roundoff Noise In the case of rounding (mean=0) the variance and the average power are the same, i.e. if a value is rounded the quantization noise becomes: σ e = W 3 If we scale down one bit: ( W 1) W = = 3 3 4 σ e

Analysis of Round-off Noise Not only the noise gain at the output needs to be determined! We also need to determine the SNR at the output to get the full picture!

Signal to Noise Ratio (SNR) Signal power (variance) SNR = σ x e 3 10log = 10log σ W x σ Roundoff error power (variance)

Signal to Noise Ratio (SNR) One extra bit reduces quantization error by a factor 4 4 σ SNR = 10log σ e = 6. 0 e db Good to remember: 6 db increase in SNR per bit

Signal to Noise Ratio (SNR) Example: Full scale sinus wave rounded to 8 bits SNR 3 A = 10log 50 db; -1 A 1 8 =

Roundoff Noise: Addition E[( e ) 1+ e ] = Ee [ 1 + ee 1+ e] = 1 = Ee [ ] + E[ ee 1] + Ee [ ] = zero if u1and u independent u (n) 1 Ee = Ee [ ] + [ ] u 1 (n) e (n) e 1 (n) y(n)

A larger IIR-filter with several quantization noise sources (I) Oppenheim and Schafer, Discrete-time Signal Processing, Prentice Hall

A larger IIR-filter with several quantization noise sources (II) Oppenheim and Schafer, Discrete-time Signal Processing, Prentice Hall

A larger IIR-filter with several quantization noise sources (III) Assumption: noise sources are independent of (a) the input and (b) each other can be added σ = σ + σ + σ + σ + σ e e0 e1 e e3 e4 Oppenheim and Schafer, Discrete-time Signal Processing, Prentice Hall

End of Lecture