SINUSOIDAL STEADY-STATE ANALYSIS

C H A P T E R SINUSOIDAL STEADY-STATE ANALYSIS 0 An expert prolem solver must e endowed with two incomptile quntities, restless imgintion nd ptient pertincity. Howrd W. Eves Enhncing Your Creer Creer in Softwre Engineering Softwre engineering is tht spect of engineering tht dels with the prcticl ppliction of scientific knowledge in the design, construction, nd vlidtion of computer progrms nd the ssocited documenttion required to develop, operte, nd mintin them. It is rnch of electricl engineering tht is ecoming incresingly importnt s more nd more disciplines require one form of softwre pckge or nother to perform routine tsks nd s progrmmle microelectronic systems re used in more nd more pplictions. The role of softwre engineer should not e confused with tht of computer scientist; the softwre engineer is prctitioner, not theoreticin. A softwre engineer should hve good computer-progrmming skill nd e fmilir with progrmming lnguges, in prticulr C, which is ecoming incresingly populr. Becuse hrdwre nd softwre re closely interlinked, it is essentil tht softwre engineer hve thorough understnding of hrdwre design. Most importnt, the softwre engineer should hve some specilized knowledge of the re in which the softwre development skill is to e pplied. All in ll, the field of softwre engineering offers gret creer to those who enjoy progrmming nd developing softwre pckges. The higher rewrds will go to those hving the est preprtion, with the most interesting nd chllenging opportunities going to those with grdute eduction. Output of modeling softwre. (Courtesy of Ntionl Instruments.) 393

394 PART 2 AC Circuits 0. INTRODUCTION In Chpter 9, we lerned tht the forced or stedy-stte response of circuits to sinusoidl inputs cn e otined y using phsors. We lso know tht Ohm s nd Kirchhoff s lws re pplicle to c circuits. In this chpter, we wnt to see how nodl nlysis, mesh nlysis, Thevenin s theorem, Norton s theorem, superposition, nd source trnsformtions re pplied in nlyzing c circuits. Since these techniques were lredy introduced for dc circuits, our mjor effort here will e to illustrte with exmples. Anlyzing c circuits usully requires three steps. Steps to Anlyze c Circuits:. Trnsform the circuit to the phsor or frequency domin. 2. Solve the prolem using circuit techniques (nodl nlysis, mesh nlysis, superposition, etc.). 3. Trnsform the resulting phsor to the time domin. Frequency-domin nlysis of n c circuit vi phsors is much esier thnnlysis of the circuit inthe time domin. Step is not necessry if the prolem is specified in the frequency domin. In step 2, the nlysis is performed in the sme mnner s dc circuit nlysis except tht complex numers re involved. Hving red Chpter 9, we re dept t hndling step 3. Towrd the end of the chpter, we lern how to pply PSpice in solving c circuit prolems. We finlly pply c circuit nlysis to two prcticl c circuits: oscilltors nd c trnsistor circuits. 0.2 NODAL ANALYSIS The sis of nodl nlysis is Kirchhoff s current lw. Since KCL is vlid for phsors, s demonstrted in Section 9.6, we cn nlyze c circuits y nodl nlysis. The following exmples illustrte this. E X A M P L E 0. Find i x in the circuit of Fig. 0. using nodl nlysis. 0 Ω H i x 20 cos 4t V 0. F 2i x 0.5 H Figure 0. For Exmple 0.. Solution: We first convert the circuit to the frequency domin:

CHAPTER 0 Sinusoidl Stedy-Stte Anlysis 395 20 cos 4t 20 0, ω = 4 rd/s H jωl = j4 0.5H jωl = j2 0.F jωc =j2.5 Thus, the frequency-domin equivlent circuit is s shown in Fig. 0.2. 0 Ω V j V 2 I x 20 0 V j2.5 Ω 2I x j2 Ω Figure 0.2 Frequency-domin equivlent of the circuit in Fig. 0.. Applying KCL t node, or 20 V 0 = V j2.5 V V 2 j4 At node 2, ( j.5)v j2.5v 2 = 20 (0..) 2I x V V 2 j4 But I x = V /j2.5. Sustituting this gives By simplifying, we get = V 2 j2 2V j2.5 V V 2 = V 2 j4 j2 V 5V 2 = 0 (0..2) Equtions (0..) nd (0..2) cn e put in mtrix form s [ ][ ] [ ] j.5 j2.5 V 20 = 5 V 2 0 We otin the determinnts s = j.5 j2.5 5 = 5 j5 = 20 j2.5 0 5 = 300, 2 = j.5 20 0 =220 V = = 300 5 j5 = 8.97 8.43 V V 2 = 2 = 220 5 j5 = 3.9 98.3 V

396 PART 2 AC Circuits P R A C T I C E P R O B L E M 0. The current I x is given y I x = V 8.97 8.43 = = 7.59 08.4 A j2.5 2.5 90 Trnsforming this to the time domin, i x = 7.59 cos(4t 08.4 ) A Using nodl nlysis, find v nd v 2 in the circuit of Fig. 0.3. 0.2 F v v 2 0 sin 2t A 2 Ω v x 2 H 3v x Figure 0.3 For Prctice Pro. 0.. Answer: v (t) = 20.96 sin(2t 58 ) V, v 2 (t) = 44. sin(2t 4 ) V. E X A M P L E 0. 2 Compute V nd V 2 in the circuit of Fig. 0.4. 0 45 V V 2 V 2 3 0 A j3 Ω j6 Ω 2 Ω Figure 0.4 For Exmple 0.2. Solution: Nodes nd 2 form supernode s shown in Fig. 0.5. Applying KCL t the supernode gives or 3 = V j3 V 2 j6 V 2 2 36 = j4v ( j2)v 2 (0.2.) But voltge source is connected etween nodes nd 2, so tht

CHAPTER 0 Sinusoidl Stedy-Stte Anlysis 397 Supernode V V 2 3 A j3 Ω j6 Ω 2 Ω Figure 0.5 A supernode in the circuit of Fig. 0.4. V = V 2 0 45 (0.2.2) Sustituting Eq. (0.2.2) in Eq. (0.2.) results in 36 40 35 = ( j2)v 2 V 2 = 3.4 87.8 V From Eq. (0.2.2), V = V 2 0 45 = 25.78 70.48 V P R A C T I C E P R O B L E M 0. 2 Clculte V nd V 2 in the circuit shown in Fig. 0.6. 20 60 V V V 2 5 0 V j j Ω 2 Ω Figure 0.6 For Prctice Pro. 0.2. Answer: V = 9.36 69.67 V, V 2 = 3.376 65.7 V. 0.3MESH ANALYSIS Kirchhoff s voltge lw (KVL) forms the sis of mesh nlysis. The vlidity of KVL for c circuits ws shown in Section 9.6 nd is illustrted in the following exmples. E X A M P L E 0. 3 Determine current I o in the circuit of Fig. 0.7 using mesh nlysis. Solution: Applying KVL to mesh, we otin (8 j0 j2)i (j2)i 2 j0i 3 = 0 (0.3.)

398 PART 2 AC Circuits 5 0 A I 3 j2 Ω I o j0 Ω I 2 20 90 V 8 Ω I j2 Ω P R A C T I C E P R O B L E M 0. 3 For mesh 2, Figure 0.7 For Exmple 0.3. (4 j2 j2)i 2 (j2)i (j2)i 3 20 90 = 0 (0.3.2) For mesh 3, I 3 = 5. Sustituting this in Eqs. (0.3.) nd (0.3.2), we get (8 j8)i j2i 2 = j50 (0.3.3) j2i (4 j4)i 2 =j20 j0 (0.3.4) Equtions (0.3.3) nd (0.3.4) cn e put in mtrix form s [ ][ ] [ ] 8 j8 j2 I j50 = j2 4 j4 I 2 j30 from which we otin the determinnts = 8 j8 j2 j2 4 j4 = 32( j)( j) 4 = 68 2 = 8 j8 j50 j2 j30 = 340 j240 = 46.7 35.22 I 2 = 2 The desired current is = 46.7 35.22 68 I o =I 2 = 6.2 = 6.2 35.22 A 44.78 A 2 0 A Find I o in Fig. 0.8 using mesh nlysis. Answer:.94 65.45 A. j2 Ω 6 Ω I o 8 Ω j 0 30 V Figure 0.8 For Prctice Pro. 0.3.

CHAPTER 0 Sinusoidl Stedy-Stte Anlysis 399 E X A M P L E 0. 4 Solve for V o in the circuit in Fig. 0.9 using mesh nlysis. j 4 0 A 6 Ω 8 Ω j5 Ω 0 0 V j2 Ω V o 3 0 A Figure 0.9 For Exmple 0.4. Solution: As shown in Fig. 0.0, meshes 3 nd 4 form supermesh due to the current source etween the meshes. For mesh, KVL gives or 0 (8 j2)i (j2)i 2 8I 3 = 0 For mesh 2, For the supermesh, (8 j2)i j2i 2 8I 3 = 0 (0.4.) I 2 =3 (0.4.2) (8 j4)i 3 8I (6 j5)i 4 j5i 2 = 0 (0.4.3) Due to the current source etween meshes 3 nd 4, t node A, I 4 = I 3 4 (0.4.4) Comining Eqs. (0.4.) nd (0.4.2), (8 j2)i 8I 3 = 0 j6 (0.4.5) Comining Eqs. (0.4.2) to (0.4.4), 8I (4 j)i 3 =24 j35 (0.4.6) I 3 A I 4 Supermesh j I 3 4 A I 4 6 Ω 8 Ω j5 Ω 0 V j2 Ω V I o I 2 3 A Figure 0.0 Anlysis of the circuit in Fig. 0.9.

400 PART 2 AC Circuits P R A C T I C E P R O B L E M 0. 4 From Eqs. (0.4.5) nd (0.4.6), we otin the mtrix eqution [ ][ ] [ ] 8 j2 8 I 0 j6 = 8 4 j I 3 24 j35 We otin the following determinnts = 8 j2 8 8 4 j = 2 j8 j28 2 64 = 50 j20 = 0 j6 8 24 j35 4 j = 40 j0 j84 6 92 j280 Current I is otined s I = The required voltge V o is = 58 j86 50 j20 =58 j86 = 3.68 274.5 A V o =j2(i I 2 ) =j2(3.68 274.5 3) =7.234 j6.568 = 9.756 222.32 V 0 Ω j I o j8 Ω Clculte current I o in the circuit of Fig. 0.. Answer: 5.075 5.943 A. 2 0 A 50 0 V 5 Ω j6 Ω Figure 0. For Prctice Pro. 0.4. 0.4 SUPERPOSITION THEOREM Since c circuits re liner, the superposition theorem pplies to c circuits the sme wy it pplies to dc circuits. The theorem ecomes importnt if the circuit hs sources operting t different frequencies. In this cse, since the impednces depend on frequency, we must hve different frequency-domin circuit for ech frequency. The totl response must e otined y dding the individul responses in the time domin. It is incorrect to try to dd the responses in the phsor or frequency domin. Why? Becuse the exponentil fctor e jωt is implicit in sinusoidl nlysis, nd tht fctor would chnge for every ngulr frequency ω. It would therefore not mke sense to dd responses t different frequencies in the phsor domin. Thus, when circuit hs sources operting t different

CHAPTER 0 Sinusoidl Stedy-Stte Anlysis 40 frequencies, one must dd the responses due to the individul frequencies in the time domin. E X A M P L E 0. 5 Use the superposition theorem to find I o in the circuit in Fig. 0.7. Solution: Let I o = I o I o (0.5.) where I o nd I o re due to the voltge nd current sources, respectively. To find I o, consider the circuit in Fig. 0.2(). If we let Z e the prllel comintion of j2 nd 8 j0, then nd current I o is or For mesh 2, Z = I o = j2(8 j0) = 0.25 j2.25 2j 8 j0 j20 4 j2 Z = j20 4.25 j4.25 I o =2.353 j2.353 (0.5.2) To get I o, consider the circuit in Fig. 0.2(). For mesh, (8 j8)i j0i 3 j2i 2 = 0 (0.5.3) j2 Ω j0 Ω 8 Ω j2 Ω () I 3 5 A j2 Ω j0 Ω I 2 I' o j20 V I'' o For mesh 3, (4 j4)i 2 j2i j2i 3 = 0 (0.5.4) 8 Ω I j2 Ω I 3 = 5 (0.5.5) From Eqs. (0.5.4) nd (0.5.5), (4 j4)i 2 j2i j0 = 0 Expressing I in terms of I 2 gives () Figure 0.2 Solution of Exmple 0.5. I = (2 j2)i 2 5 (0.5.6) Sustituting Eqs. (0.5.5) nd (0.5.6) into Eq. (0.5.3), we get (8 j8)[(2 j2)i 2 5] j50 j2i 2 = 0 or 90 j40 I 2 = 34 Current I o is otined s = 2.647 j.76 I o =I 2 =2.647 j.76 (0.5.7) From Eqs. (0.5.2) nd (0.5.7), we write I o = I o I o =5 j3.529 = 6.2 44.78 A

402 PART 2 AC Circuits P R A C T I C E P R O B L E M 0. 5 which grees with wht we got in Exmple 0.3. It should e noted tht pplying the superposition theorem is not the est wy to solve this prolem. It seems tht we hve mde the prolem twice s hrd s the originl one y using superposition. However, in Exmple 0.6, superposition is clerly the esiest pproch. Find current I o in the circuit of Fig. 0.8 using the superposition theorem. Answer:.94 65.45 A. E X A M P L E 0. 6 Find v o in the circuit in Fig. 0.3 using the superposition theorem. 2 H Ω vo 0. F 5 V 0 cos 2t V 2 sin 5t A Figure 0.3 For Exmple 0.6. Solution: Since the circuit opertes t three different frequencies (ω = 0 for the dc voltge source), one wy to otin solution is to use superposition, which reks the prolem into single-frequency prolems. So we let v o = v v 2 v 3 (0.6.) where v is due to the 5-V dc voltge source, v 2 is due to the 0 cos 2t V voltge source, nd v 3 is due to the 2 sin 5t A current source. To find v, we set to zero ll sources except the 5-V dc source. We recll tht t stedy stte, cpcitor is n open circuit to dc while n inductor is short circuit to dc. There is n lterntive wy of looking t this. Since ω = 0, jωl = 0, /j ωc =. Either wy, the equivlent circuit is s shown in Fig. 0.4(). By voltge division, v = (5) = V (0.6.2) 4 To find v 2, we set to zero oth the 5-V source nd the 2 sin 5t current source nd trnsform the circuit to the frequency domin. 0 cos 2t 0 0, ω = 2 rd/s 2H jωl = j4 0. F =j5 jωc

CHAPTER 0 Sinusoidl Stedy-Stte Anlysis 403 The equivlent circuit is now s shown in Fig. 0.4(). Let By voltge division, V 2 = Z =j5 4 = j5 4 4 j5 = 2.439 j.95 j4 Z (0 0 0 ) = = 2.498 30.79 3.439 j2.049 In the time domin, v 2 = 2.498 cos(2t 30.79 ) (0.6.3) Ω j Ω I Ω v 5 V V 2 V 3 0 0 V j5 Ω j0 Ω 2 90 A j2 Ω () () (c) Figure 0.4 Solution of Exmple 0.6: () setting ll sources to zero except the 5-V dc source, () setting ll sources to zero except the c voltge source, (c) setting ll sources to zero except the c current source. To otin v 3, we set the voltge sources to zero nd trnsform wht is left to the frequency domin. 2 sin 5t 2 90, ω = 5 rd/s 2H jωl = j0 0.F =j2 jωc The equivlent circuit is in Fig. 0.4(c). Let Z =j2 4 = j2 4 = 0.8 j.6 4 j2 By current division, j0 I = (2 j0 Z 90 ) A V 3 = I = In the time domin, j0.8 j8.4 (j2) = 2.328 77.9 V v 3 = 2.33 cos(5t 80 ) = 2.33 sin(5t 0 ) V (0.6.4) Sustituting Eqs. (0.6.2) to (0.6.4) into Eq. (0.6.), we hve v o (t) = 2.498 cos(2t 30.79 ) 2.33 sin(5t 0 ) V P R A C T I C E P R O B L E M 0. 6 Clculte v o in the circuit of Fig. 0.5 using the superposition theorem.

404 PART 2 AC Circuits 8 Ω 30 sin 5t V v o 0.2 F H 2 cos 0t A Figure 0.5 For Prctice Pro. 0.6. Answer: 4.63 sin(5t 8.2 ).05 cos(0t 86.24 ) V. 0.5 SOURCE TRANSFORMATION As Fig. 0.6 shows, source trnsformtion in the frequency domin involves trnsforming voltge source in series with n impednce to current source in prllel with n impednce, or vice vers. As we go from one source type to nother, we must keep the following reltionship in mind: V s = Z s I s I s = V s Z s (0.) Z s V s I s Z s V s = Z s I s V I s = s Zs Figure 0.6 Source trnsformtion. E X A M P L E 0. 7 Clculte V x in the circuit of Fig. 0.7 using the method of source trnsformtion. 5 Ω j3 Ω 2 0 90 V 3 Ω 0 Ω V x j Figure 0.7 For Exmple 0.7.

CHAPTER 0 Sinusoidl Stedy-Stte Anlysis 405 Solution: We trnsform the voltge source to current source nd otin the circuit in Fig. 0.8(), where I s = 20 90 5 = 4 90 =j4 A The prllel comintion of 5- resistnce nd (3j4) impednce gives Z = 5(3 j4) 8 j4 = 2.5 j.25 Converting the current source to voltge source yields the circuit in Fig. 0.8(), where By voltge division, V x = V s = I s Z =j4(2.5 j.25) = 5 j0 V 0 0 2.5 j.25 4 j3 (5 j0) = 5.59 28 V j3 Ω 2.5 Ω j.25 Ω j3 Ω I s = j4 Α 5 Ω 3 Ω j 0 Ω V x V s = 5 j0 V 0 Ω V x () () Figure 0.8 Solution of the circuit in Fig. 0.7. P R A C T I C E P R O B L E M 0. 7 Find I o in the circuit of Fig. 0.9 using the concept of source trnsformtion. 2 Ω j Ω I o 4 90 Α j5 Ω Ω j3 Ω j2 Ω Figure 0.9 For Prctice Pro. 0.7. Answer: 3.288 99.46 A.

406 PART 2 AC Circuits 0.6 THEVENIN AND NORTON EQUIVALENT CIRCUITS Liner circuit Figure 0.20 V Th Thevenin equivlent. Z Th Thevenin s nd Norton s theorems re pplied to c circuits in the sme wy s they re to dc circuits. The only dditionl effort rises from the need to mnipulte complex numers. The frequency-domin version of Thevenin equivlent circuit is depicted in Fig. 0.20, where liner circuit is replced y voltge source in series with n impednce. The Norton equivlent circuit is illustrted in Fig. 0.2, where liner circuit is replced y current source in prllel with n impednce. Keep in mind tht the two equivlent circuits re relted s V Th = Z N I N, Z Th = Z N (0.2) Liner circuit Figure 0.2 I N Norton equivlent. Z N just s in source trnsformtion. V Th is the open-circuit voltge while I N is the short-circuit current. If the circuit hs sources operting t different frequencies (see Exmple 0.6, for exmple), the Thevenin or Norton equivlent circuit must e determined t ech frequency. This leds to entirely different equivlent circuits, one for ech frequency, not one equivlent circuit with equivlent sources nd equivlent impednces. E X A M P L E 0. 8 Otin the Thevenin equivlent t terminls - of the circuit in Fig. 0.22. d j6 Ω 20 75 V e c 8 Ω j2 Ω f Figure 0.22 For Exmple 0.8. Solution: We find Z Th y setting the voltge source to zero. As shown in Fig. 0.23(), the 8- resistnce is now in prllel with the j6 rectnce, so tht their comintion gives Z =j6 8 = j6 8 = 2.88 j3.84 8 j6 Similrly, the 4- resistnce is in prllel with the j2 rectnce, nd their comintion gives Z 2 = 4 j2 = j2 4 = 3.6 j.2 4 j2

CHAPTER 0 Sinusoidl Stedy-Stte Anlysis 407 d f,d 8 Ω j6 Ω j2 Ω f,d 20 75 V j6 Ω e 8 Ω I V Th I 2 c j2 Ω e () Z Th c f () Figure 0.23 Solution of the circuit in Fig. 0.22: () finding Z Th, () finding V Th. The Thevenin impednce is the series comintion of Z nd Z 2 ; tht is, Z Th = Z Z 2 = 6.48 j2.64 To find V Th, consider the circuit in Fig. 0.23(). Currents I nd I 2 re otined s I = 20 75 8 j6 A, I 2 = 20 75 4 j2 A Applying KVL round loop cde in Fig. 0.23() gives V Th 4I 2 (j6)i = 0 or V Th = 4I 2 j6i = 480 75 4 j2 720 75 90 8 j6 = 37.95 3.43 72 20.87 =28.936 j24.55 = 37.95 220.3 V P R A C T I C E P R O B L E M 0. 8 Find the Thevenin equivlent t terminls - of the circuit in Fig. 0.24. 6 Ω j2 Ω 30 20 V j 0 Ω Figure 0.24 For Prctice Pro. 0.8. Answer: Z Th = 2.4 j3.2,v Th = 8.97 5.57 V.

408 PART 2 AC Circuits E X A M P L E 0. 9 Find the Thevenin equivlent of the circuit in Fig. 0.25 s seen from terminls -. j3 Ω I o 5 0 A 2 Ω j 0.5 I o Figure 0.25 For Exmple 0.9. Solution: To find V Th, we pply KCL t node in Fig. 0.26(). 5 = I o 0.5I o I o = 0 A Applying KVL to the loop on the right-hnd side in Fig. 0.26(), we otin I o (2 j4) 0.5I o (4 j3) V Th = 0 or V Th = 0(2 j4) 5(4 j3) =j55 Thus, the Thevenin voltge is V Th = 55 90 V I o 0.5I o 4 j3 Ω 2 I o 4 j3 Ω V s I s 5 A 2 j 0.5I o V Th 2 j 0.5I o V s I s = 3 0 A () () Figure 0.26 Solution of the prolem in Fig. 0.25: () finding V Th, () finding Z Th. To otin Z Th, we remove the independent source. Due to the presence of the dependent current source, we connect 3-A current source (3 is n ritrry vlue chosen for convenience here, numer divisile y the sum of currents leving the node) to terminls - s shown in Fig. 0.26(). At the node, KCL gives 3 = I o 0.5I o I o = 2A Applying KVL to the outer loop in Fig. 0.26() gives V s = I o (4 j3 2 j4) = 2(6 j)

CHAPTER 0 Sinusoidl Stedy-Stte Anlysis 409 The Thevenin impednce is Z Th = V s 2(6 j) = = 4 j0.6667 I s 3 P R A C T I C E P R O B L E M 0. 9 Determine the Thevenin equivlent of the circuit in Fig. 0.27 s seen from the terminls -. Answer: Z Th = 2.66 36.3,V Th = 7.35 72.9 V. j2 Ω 8 Ω j V o 5 0 A 0.2V o Figure 0.27 For Prctice Pro. 0.9. E X A M P L E 0. 0 Otin current I o in Fig. 0.28 using Norton s theorem. 5 Ω 8 Ω j2 Ω 3 0 A I o 20 Ω 40 90 V 0 Ω j j5 Ω Figure 0.28 For Exmple 0.0. Solution: Our first ojective is to find the Norton equivlent t terminls -. Z N is found in the sme wy s Z Th. We set the sources to zero s shown in Fig. 0.29(). As evident from the figure, the (8 j2) nd (0 j4) impednces re short-circuited, so tht Z N = 5 To get I N, we short-circuit terminls - s in Fig. 0.29() nd pply mesh nlysis. Notice tht meshes 2 nd 3 form supermesh ecuse of the current source linking them. For mesh, j40 (8 j2)i (8 j2)i 2 (0 j4)i 3 = 0 (0.0.) For the supermesh, (3 j2)i 2 (0 j4)i 3 (8 j2)i = 0 (0.0.2)

40 PART 2 AC Circuits I 2 I 3 5 8 j2 0 j4 Z N j40 5 8 I 2 I j2 0 j4 3 I 3 I N 3 j8 5 I o 20 j5 () () (c) Figure 0.29 Solution of the circuit in Fig. 0.28: () finding Z N, () finding V N, (c) clculting I o. P R A C T I C E P R O B L E M 0. 0 At node, due to the current source etween meshes 2 nd 3, Adding Eqs. (0.0.) nd (0.0.2) gives From Eq. (0.0.3), The Norton current is I 3 = I 2 3 (0.0.3) j40 5I 2 = 0 I 2 = j8 I 3 = I 2 3 = 3 j8 I N = I 3 = (3 j8) A Figure 0.29(c) shows the Norton equivlent circuit long with the impednce t terminls -. By current division, 5 I o = 5 20 j5 I N = 3 j8 5 j3 =.465 38.48 A Determine the Norton equivlent of the circuit in Fig. 0.30 s seen from terminls -. Use the equivlent to find I o. j2 Ω 8 Ω Ω j3 Ω 20 0 V 4 90 A I o 0 Ω j5 Ω Figure 0.30 For Prctice Pro. 0.0. Answer: Z N = 3.76 j0.706,i N = 8.396 32.68 A, I o =.97 2.0 A.

0.7 OP AMP AC CIRCUITS CHAPTER 0 Sinusoidl Stedy-Stte Anlysis 4 The three steps stted in Section 0. lso pply to op mp circuits, s long s the op mp is operting in the liner region. As usul, we will ssume idel op mps. (See Section 5.2.) As discussed in Chpter 5, the key to nlyzing op mp circuits is to keep two importnt properties of n idel op mp in mind:. No current enters either of its input terminls. 2. The voltge cross its input terminls is zero. The following exmples will illustrte these ides. E X A M P L E 0. Determine v o (t) for the op mp circuit in Fig. 0.3() if v s = 3 cos 000t V. 20 kω 20 kω V o v s 0 kω 0 kω 0.2 mf 0. mf v o 3 0 V j0 kω 0 kω V 0 kω 0 V 2 V o j5 kω () () Figure 0.3 For Exmple 0.: () the originl circuit in the time domin, () its frequency-domin equivlent. Solution: We first trnsform the circuit to the frequency domin, s shown in Fig. 0.3(), where V s = 3 0, ω = 000 rd/s. Applying KCL t node, we otin 3 0 V = V 0 j5 V 0 V V o 0 20 or 6 = (5 j4)v V o (0..) At node 2, KCL gives V 0 0 = 0 V o j0 which leds to V =jv o (0..2) Sustituting Eq. (0..2) into Eq. (0..) yields 6 =j(5 j4)v o V o = (3 j5)v o V o = 6 =.029 59.04 3 j5 Hence, v o (t) =.029 cos(000t 59.04 ) V

42 PART 2 AC Circuits P R A C T I C E P R O B L E M 0. Find v o nd i o in the op mp circuit of Fig. 0.32. Let v s = 2 cos 5000t V. v s 0 kω 0 nf 20 kω 20 nf i o v o Figure 0.32 For Prctice Pro. 0.. Answer: 0.667 sin 5000t V, 66.67 sin 5000t µa. E X A M P L E 0. 2 C 2 R C R 2 v s Figure 0.33 For Exmple 0.2. vo Compute the closed-loop gin nd phse shift for the circuit in Fig. 0.33. Assume tht R = R 2 = 0 k, C = 2 µf, C 2 = µf, nd ω = 200 rd/s. Solution: The feedck nd input impednces re clculted s R 2 Z f = R 2 = jωc 2 jωr 2 C 2 Z i = R = jωr C jωc jωc Since the circuit in Fig. 0.33 is n inverting mplifier, the closed-loop gin is given y G = V o = Z f jωc R 2 = V s Z i ( jωr C )( jωr 2 C 2 ) Sustituting the given vlues of R, R 2, C, C 2, nd ω, we otin j4 G = = 0.434 49.4 ( j4)( j2) Thus the closed-loop gin is 0.434 nd the phse shift is 49.4. P R A C T I C E P R O B L E M 0. 2 v s C v o Otin the closed-loop gin nd phse shift for the circuit in Fig. 0.34. Let R = 0 k, C = µf, nd ω = 000 rd/s. Answer:.05, 5.599. R R Figure 0.34 For Prctice Pro. 0.2.

CHAPTER 0 Sinusoidl Stedy-Stte Anlysis 43 0.8 AC ANALYSIS USING PSPICE PSpice ffords ig relief from the tedious tsk of mnipulting complex numers in c circuit nlysis. The procedure for using PSpice for c nlysis is quite similr to tht required for dc nlysis. The reder should red Section D.5 in Appendix D for review of PSpice concepts for c nlysis. AC circuit nlysis is done in the phsor or frequency domin, nd ll sources must hve the sme frequency. Although AC nlysis with PSpice involves using AC Sweep, our nlysis in this chpter requires single frequency f = ω/2π. The output file of PSpice contins voltge nd current phsors. If necessry, the impednces cn e clculted using the voltges nd currents in the output file. E X A M P L E 0. 3 Otin v o nd i o in the circuit of Fig. 0.35 using PSpice. 4 kω 50 mh i o 8 sin(000t 50 ) V 2 mf 0.5i o 2 kω v o Figure 0.35 For Exmple 0.3. Solution: We first convert the sine function to cosine. 8 sin(000t 50 ) = 8 cos(000t 50 90 ) = 8 cos(000t 40 ) The frequency f is otined from ω s f = ω 2π = 000 = 59.55 Hz 2π The schemtic for the circuit is shown in Fig. 0.36. Notice the currentcontrolled current source F is connected such tht its current flows from ACMAG=8 ACPHASE=-40 V R 4k AC=yes MAG=yes PHASE=ok C 2 L 3 50mH IPRINT 2u F GAIN=0.5 R2 2k AC=ok MAG=ok PHASE=ok 0 Figure 0.36 The schemtic of the circuit in Fig. 0.35.

44 PART 2 AC Circuits node 0 to node 3 in conformity with the originl circuit in Fig. 0.35. Since we only wnt the mgnitude nd phse of v o nd i o, we set the ttriutes of IPRINT AND VPRINT ech to AC = yes, MAG = yes, PHASE = yes. As single-frequency nlysis, we select Anlysis/Setup/AC Sweep nd enter Totl Pts =, Strt Freq = 59.55, nd Finl Freq = 59.55. After sving the schemtic, we simulte it y selecting Anlysis/Simulte. The output file includes the source frequency in ddition to the ttriutes checked for the pseudocomponents IPRINT nd VPRINT, FREQ IM(V_PRINT3) IP(V_PRINT3).592E02 3.264E-03-3.743E0 FREQ VM(3) VP(3).592E02.550E00-9.58E0 From this output file, we otin V o =.55 95.8 V, I o = 3.264 37.43 ma which re the phsors for nd P R A C T I C E P R O B L E M 0. 3 v o =.55 cos(000t 95.8 ) =.55 sin(000t 5.8 ) V i o = 3.264 cos(000t 37.43 ) ma Use PSpice to otin v o nd i o in the circuit of Fig. 0.37. i o 3 kω 2 kω 2 H 0 cos 3000t A mf v o kω 2v o Figure 0.37 For Prctice Pro. 0.3. Answer: 0.2682 cos(3000t 54.6 ) V, 0.544 cos(3000t 55.2 ) ma. E X A M P L E 0. 4 Find V nd V 2 in the circuit of Fig. 0.38. Solution: The circuit in Fig. 0.35 is in the time domin, wheres the one in Fig. 0.38 is in the frequency domin. Since we re not given prticulr

CHAPTER 0 Sinusoidl Stedy-Stte Anlysis 45 j2 0.2V x V 2 Ω j2 Ω V 2 j2 Ω 2 Ω 3 0 A Ω V x j Ω j Ω 8 30 V Figure 0.38 For Exmple 0.4. frequency nd PSpice requires one, we select ny frequency consistent with the given impednces. For exmple, if we select ω = rd/s, the corresponding frequency is f = ω/2π = 0.5955 Hz. We otin the vlues of the cpcitnce (C = /ωx C ) nd inductnces (L = X L /ω). Mking these chnges results in the schemtic in Fig. 0.39. To ese wiring, we hve exchnged the positions of the voltge-controlled current source G nd the 2 j2 impednce. Notice tht the current of G flows from node to node 3, while the controlling voltge is cross the cpcitor c2, s required in Fig. 0.38. The ttriutes of pseudocomponents VPRINT re set s shown. As single-frequency nlysis, we select Anlysis/Setup/AC Sweep nd enter Totl Pts =, Strt Freq = 0.5955, nd Finl Freq = 0.5955. After sving the schemtic, we select Anlysis/Simulte to simulte the circuit. When this is done, the output file includes FREQ VM() VP().592E-0 2.708E00-5.673E0 FREQ VM(3) VP(3).592E-0 4.468E00 -.026E02 C AC=ok MAG=ok PHASE=yes R2 2 0.5 2 L AC=ok MAG=ok 2H PHASE=ok 3 L2 4 R3 2H 2 5 AC=3 AC I R C2 GAIN=0.2 G C3 ACMAG=8 ACPHASE=30 V 0 Figure 0.39 Schemtic for the circuit in Fig. 0.38.

46 PART 2 AC Circuits from which we otin V = 2.708 56.73 V, V 2 = 4.468 02.6 V P R A C T I C E P R O B L E M 0. 4 Otin V x nd I x in the circuit depicted in Fig. 0.40. 2 0 V Ω j2 Ω V x j2 Ω Ω j0.25 I x 4 60 A 2 Ω j Ω 4I x Figure 0.40 For Prctice Pro. 0.4. Answer: 3.02 76.08 V, 8.234 4.56 A. 0.9 APPLICATIONS The concepts lerned in this chpter will e pplied in lter chpters to clculte electric power nd determine frequency response. The concepts re lso used in nlyzing coupled circuits, three-phse circuits, c trnsistor circuits, filters, oscilltors, nd other c circuits. In this section, we pply the concepts to develop two prcticl c circuits: the cpcitnce multiplier nd the sine wve oscilltors. 0.9. Cpcitnce Multiplier The op mp circuit in Fig. 0.4 is known s cpcitnce multiplier, for resons tht will ecome ovious. Such circuit is used in integrtedcircuit technology to produce multiple of smll physicl cpcitnce C when lrge cpcitnce is needed. The circuit in Fig. 0.4 cn e used to multiply cpcitnce vlues y fctor up to 000. For exmple, 0-pF cpcitor cn e mde to ehve like 00-nF cpcitor. In Fig. 0.4, the first op mp opertes s voltge follower, while the second one is n inverting mplifier. The voltge follower isoltes the cpcitnce formed y the circuit from the loding imposed y the inverting mplifier. Since no current enters the input terminls of the op mp, the input current I i flows through the feedck cpcitor. Hence, t node, I i = V i V o /j ωc = jωc(v i V o ) (0.3)

CHAPTER 0 Sinusoidl Stedy-Stte Anlysis 47 V i R 0 V R 2 I i A 2 A 2 V o Z i V i C Figure 0.4 Cpcitnce multiplier. Applying KCL t node 2 gives or V i 0 R = 0 V o R 2 Sustituting Eq. (0.4) into (0.3) gives ( I i = jωc R ) 2 V i R or The input impednce is where V o = R 2 R V i (0.4) ( I i = jω R ) 2 C (0.5) V i R Z i = V i I i = jωc eq (0.6) C eq = ( R ) 2 C (0.7) R Thus, y proper selection of the vlues of R nd R 2, the op mp circuit in Fig. 0.4 cn e mde to produce n effective cpcitnce etween the input terminl nd ground, which is multiple of the physicl cpcitnce C. The size of the effective cpcitnce is prcticlly limited y the inverted output voltge limittion. Thus, the lrger the cpcitnce multipliction, the smller is the llowle input voltge to prevent the op mps from reching sturtion. A similr op mp circuit cn e designed to simulte inductnce. (See Pro. 0.69.) There is lso n op mp circuit configurtion to crete resistnce multiplier. E X A M P L E 0. 5 Clculte C eq in Fig. 0.4 when R = 0 k, R 2 = M, nd C = nf.

48 PART 2 AC Circuits P R A C T I C E P R O B L E M 0. 5 Solution: From Eq. (0.7) ( C eq = R ) 2 C = ( ) 06 nf= 0 nf R 0 0 3 Determine the equivlent cpcitnce of the op mp circuit in Fig. 0.4 if R = 0 k, R 2 = 0 M, nd C = 0 nf. Answer: 0 µf. 0.9.2 Oscilltors We know tht dc is produced y tteries. But how do we produce c? One wy is using oscilltors, which re circuits tht convert dc to c. An oscilltor is circuit tht produces nc wveform s output whenpowered y dc input. This corresponds to ω = 2πf = 377 rd/s. v 2 R 2 R g Figure 0.42 C 2 R R f Negtive feedck pth to control gin C v o Positive feedck pth to crete oscilltions Wien-ridge oscilltor. The only externl source n oscilltor needs is the dc power supply. Ironiclly, the dc power supply is usully otined y converting the c supplied y the electric utility compny to dc. Hving gone through the troule of conversion, one my wonder why we need to use the oscilltor to convert the dc to c gin. The prolem is tht the c supplied y the utility compny opertes t preset frequency of 60 Hz in the United Sttes (50 Hz in some other ntions), wheres mny pplictions such s electronic circuits, communiction systems, nd microwve devices require internlly generted frequencies tht rnge from 0 to 0 GHz or higher. Oscilltors re used for generting these frequencies. In order for sine wve oscilltors to sustin oscilltions, they must meet the Brkhusen criteri:. The overll gin of the oscilltor must e unity or greter. Therefore, losses must e compensted for y n mplifying device. 2. The overll phse shift (from input to output nd ck to the input) must e zero. Three common types of sine wve oscilltors re phse-shift, twin T, nd Wien-ridge oscilltors. Here we consider only the Wien-ridge oscilltor. The Wien-ridge oscilltor is widely used for generting sinusoids in the frequency rnge elow MHz. It is n RC op mp circuit with only few components, esily tunle nd esy to design. As shown in Fig. 0.42, the oscilltor essentilly consists of noninverting mplifier with two feedck pths: the positive feedck pth to the noninverting input cretes oscilltions, while the negtive feedck pth to the inverting

CHAPTER 0 Sinusoidl Stedy-Stte Anlysis 49 input controls the gin. If we define the impednces of the RC series nd prllel comintions s Z s nd Z p, then The feedck rtio is Z s = R = R j (0.8) jωc ωc Z p = R 2 R 2 = (0.9) jωc 2 jωr 2 C 2 V 2 = Z p (0.0) V o Z s Z p Sustituting Eqs. (0.8) nd (0.9) into Eq. (0.0) gives V 2 V o = ( R 2 R j R 2 ωc ) ( jωr 2 C 2 ) (0.) = ωr 2 C ω(r 2 C R C R 2 C 2 ) j(ω 2 R C R 2 C 2 ) To stisfy the second Brkhusen criterion, V 2 must e in phse with V o, which implies tht the rtio in Eq. (0.) must e purely rel. Hence, the imginry prt must e zero. Setting the imginry prt equl to zero gives the oscilltion frequency ω o s or ω 2 o R C R 2 C 2 = 0 ω o = R R 2 C C 2 (0.2) In most prcticl pplictions, R = R 2 = R nd C = C 2 = C, so tht ω o = RC = 2πf o (0.3) or f o = 2πRC (0.4) Sustituting Eq. (0.3) nd R = R 2 = R, C = C 2 = C into Eq. (0.) yields V 2 = (0.5) V o 3 Thus in order to stisfy the first Brkhusen criterion, the op mp must compenste y providing gin of 3 or greter so tht the overll gin is t lest or unity. We recll tht for noninverting mplifier, or V o V 2 = R f R g = 3 (0.6) R f = 2R g (0.7)

420 PART 2 AC Circuits Due to the inherent dely cused y the op mp, Wien-ridge oscilltors re limited to operting in the frequency rnge of MHz or less. E X A M P L E 0. 6 P R A C T I C E P R O B L E M 0. 6 Design Wien-ridge circuit to oscillte t 00 khz. Solution: Using Eq. (0.4), we otin the time constnt of the circuit s RC = = 2πf o 2π 00 0 =.59 3 06 (0.6.) If we select R = 0 k, then we cn select C = 59 pf to stisfy Eq. (0.6.). Since the gin must e 3, R f /R g = 2. We could select R f = 20 k while R g = 0 k. In the Wien-ridge oscilltor circuit in Fig. 0.42, let R = R 2 = 2.5 k, C = C 2 = nf. Determine the frequency f o of the oscilltor. Answer: 63.66 khz. 0.0 SUMMARY. We pply nodl nd mesh nlysis to c circuits y pplying KCL nd KVL to the phsor form of the circuits. 2. In solving for the stedy-stte response of circuit tht hs independent sources with different frequencies, ech independent source must e considered seprtely. The most nturl pproch to nlyzing such circuits is to pply the superposition theorem. A seprte phsor circuit for ech frequency must e solved independently, nd the corresponding response should e otined in the time domin. The overll response is the sum of the time-domin responses of ll the individul phsor circuits. 3. The concept of source trnsformtion is lso pplicle in the frequency domin. 4. The Thevenin equivlent of n c circuit consists of voltge source V Th in series with the Thevenin impednce Z Th. 5. The Norton equivlent of n c circuit consists of current source I N in prllel with the Norton impednce Z N (= Z Th ). 6. PSpice is simple nd powerful tool for solving c circuit prolems. It relieves us of the tedious tsk of working with the complex numers involved in stedy-stte nlysis. 7. The cpcitnce multiplier nd the c oscilltor provide two typicl pplictions for the concepts presented in this chpter. A cpcitnce multiplier is n op mp circuit used in producing multiple of physicl cpcitnce. An oscilltor is device tht uses dc input to generte n c output.

CHAPTER 0 Sinusoidl Stedy-Stte Anlysis 42 REVIEW QUESTIONS 0. The voltge V o cross the cpcitor in Fig. 0.43 is: () 5 0 V () 7.07 45 V (c) 7.07 45 V (d) 5 45 V Ω 0.5 Refer to the circuit in Fig. 0.47 nd oserve tht the two sources do not hve the sme frequency. The current i x (t) cn e otined y: () source trnsformtion () the superposition theorem (c) PSpice 0 0 V j Ω V o H Ω i x Figure 0.43 For Review Question 0.. sin 2t V F sin 0t V 0.2 The vlue of the current I o in the circuit in Fig. 0.44 is: () 4 0 A () 2.4 90 A (c) 0.6 0 A (d) A 3 0 A j8 Ω I o j2 Ω Figure 0.44 For Review Question 0.2. 0.3 Using nodl nlysis, the vlue of V o in the circuit of Fig. 0.45 is: () 24 V () 8 V (c) 8 V (d) 24 V Figure 0.47 For Review Question 0.5. 0.6 For the circuit in Fig. 0.48, the Thevenin impednce t terminls - is: () () 0.5 j0.5 (c) 0.5 j0.5 (d) j2 (e) j2 Ω H 5 cos t V F Figure 0.48 For Review Questions 0.6 nd 0.7. V o j6 Ω 4 90 A j3 Ω 0.7 In the circuit of Fig. 0.48, the Thevenin voltge t terminls - is: () 3.535 45 V () 3.535 45 V (c) 7.07 45 V (d) 7.07 45 V Figure 0.45 For Review Question 0.3. 0.4 In the circuit of Fig. 0.46, current i(t) is: () 0 cos t A () 0 sin t A (c) 5 cos t A (d) 5 sin t A (e) 4.472 cos(t 63.43 ) A 0.8 Refer to the circuit in Fig. 0.49. The Norton equivlent impednce t terminls - is: () j4 () j2 (c) j2 (d) j4 H F j2 Ω Ω 0 cos t V i(t) 6 0 V j Figure 0.46 For Review Question 0.4. Figure 0.49 For Review Questions 0.8 nd 0.9.

422 PART 2 AC Circuits 0.9 The Norton current t terminls - in the circuit of Fig. 0.49 is: () 0 A ().5 90 A (c).5 90 A (d) 3 90 A 0.0 PSpice cn hndle circuit with two independent sources of different frequencies. () True () Flse Answers: 0.c, 0.2, 0.3d, 0.4, 0.5, 0.6c, 0.7, 0.8, 0.9d, 0.0. PROBLEMS Section 0.2 Nodl Anlysis 0. Find v o in the circuit in Fig. 0.50. 0.4 Compute v o (t) in the circuit of Fig. 0.53. i x H 0.25 F 3 Ω H 0 cos(t 45 ) V F v o 5 sin(t 30 ) V 6 sin (4t 0 ) V Figure 0.53 For Pro. 0.4. 0.5i x Ω v o Figure 0.50 For Pro. 0.. 0.2 For the circuit depicted in Fig. 0.5 elow, determine i o. 0.3 Determine v o in the circuit of Fig. 0.52. 0.5 Use nodl nlysis to find v o in the circuit of Fig. 0.54. 20 Ω 50 mf 0 mh 2 F 2 H 0 cos 0 3 t V i o 20 Ω 4i o 30 Ω v o 6 sin 4t V v o Ω 6 Ω 2 cos 4t A Figure 0.54 For Pro. 0.5. Figure 0.52 For Pro. 0.3. 0.6 Using nodl nlysis, find i o (t) in the circuit in Fig. 0.55. 0 Ω H i o 0.02 F 20 sin ( 0t 4) V 4 cos ( 0t 3) A Figure 0.5 For Pro. 0.2.

CHAPTER 0 Sinusoidl Stedy-Stte Anlysis 423 0.25 F 2 Ω 2 H H 0.9 Solve for the current I in the circuit of Fig. 0.58 using nodl nlysis. 5 0 A i o 8 sin (2t 30 ) V 0.5 F cos 2t A 2 Ω j Ω I Figure 0.55 For Pro. 0.6. 20 90 V j2 Ω 2I 0.7 By nodl nlysis, find i o in the circuit in Fig. 0.56. 2i o Figure 0.58 For Pro. 0.9. 0.0 Using nodl nlysis, find V nd V 2 in the circuit of Fig. 0.59. 0 Ω 0 Ω i o V j5 Ω V 2 20 sin000t A 20 Ω 50 mf 0 mh j2 A 20 Ω j0 Ω j A Figure 0.56 For Pro. 0.7. 0.8 Clculte the voltge t nodes nd 2 in the circuit of Fig. 0.57 using nodl nlysis. Figure 0.59 For Pro. 0.0. 0. By nodl nlysis, otin current I o in the circuit in Fig. 0.60. j 20 30 A 00 20 V j I o 2 Ω Ω 2 3 Ω j2 Ω j2 Ω 0 Ω j2 Ω j5 Ω Figure 0.57 For Pro. 0.8. Figure 0.60 For Pro. 0.. 0.2 Use nodl nlysis to otin V o in the circuit of Fig. 0.6 elow. 8 Ω j6 Ω j5 Ω 4 45 A V x 2 Ω 2V x j Ω j2 Ω V o Figure 0.6 For Pro. 0.2.

424 PART 2 AC Circuits 0.3 Otin V o in Fig. 0.62 using nodl nlysis. j2 Ω Section 0.3 Mesh Anlysis 0.7 Otin the mesh currents I nd I 2 in the circuit of Fig. 0.66. 2 0 V C R 2 Ω V o j 0.2V o V s I C 2 I 2 L Figure 0.62 For Pro. 0.3. 0.4 Refer to Fig. 0.63. If v s (t) = V m sin ωt nd v o (t) = A sin(ωt φ), derive the expressions for A nd φ. Figure 0.66 For Pro. 0.7. 0.8 Solve for i o in Fig. 0.67 using mesh nlysis. 2 H v s (t) R L C v o (t) i o 0 cos 2t V 0.25 F 6 sin 2t V Figure 0.67 For Pro. 0.8. Figure 0.63 For Pro. 0.4. 0.5 For ech of the circuits in Fig. 0.64, find V o /V i for ω = 0, ω, nd ω 2 = /LC. 0.9 Rework Pro. 0.5 using mesh nlysis. 0.20 Using mesh nlysis, find I nd I 2 in the circuit of Fig. 0.68. R L R C j0 Ω 40 Ω V i C V o V i L V o 40 30 V I I j20 Ω 2 50 0 V () () Figure 0.68 For Pro. 0.20. Figure 0.64 For Pro. 0.5. 0.6 For the circuit in Fig. 0.65, determine V o /V s. 0.2 By using mesh nlysis, find I nd I 2 in the circuit depicted in Fig. 0.69. j 3 Ω R 2 Ω V s R 2 L C V o 3 Ω I 30 20 V I 2 j Ω j6 Ω j2 Ω Figure 0.65 For Pro. 0.6. Figure 0.69 For Pro. 0.2.

CHAPTER 0 Sinusoidl Stedy-Stte Anlysis 425 0.22 Repet Pro. 0. using mesh nlysis. 0.23 Use mesh nlysis to determine current I o in the circuit of Fig. 0.70 elow. 0.24 Determine V o nd I o in the circuit of Fig. 0.7 using mesh nlysis. I o 2 0 A j2 Ω 2 Ω j 0 90 V Ω 4 0 A Ω j 4 30 A 2 Ω V o 3V o I o j2 Ω Section 0.4 Figure 0.73 For Pro. 0.29. Superposition Theorem Figure 0.7 For Pro. 0.24. 0.30 Find i o in the circuit shown in Fig. 0.74 using superposition. 0.25 Compute I in Pro. 0.9 using mesh nlysis. 0.26 Use mesh nlysis to find I o in Fig. 0.28 (for Exmple 0.0). 0 cos 4t V 2 Ω i o H 8 V 0.27 Clculte I o in Fig. 0.30 (for Prctice Pro. 0.0) using mesh nlysis. 0.28 Compute V o in the circuit of Fig. 0.72 using mesh nlysis. Figure 0.74 For Pro. 0.30. j j3 Ω 0.3 Using the superposition principle, find i x in the circuit of Fig. 0.75. 4 90 A 2 Ω V o 2 Ω 2 Ω 2 0 V 8 F 3 Ω i x 5 cos(2t 0 ) A 4 H 0 cos(2t 60 ) V 2 0 A Figure 0.72 For Pro. 0.28. 0.29 Using mesh nlysis, otin I o in the circuit shown in Fig. 0.73. Figure 0.75 For Pro. 0.3. 0.32 Rework Pro. 0.2 using the superposition theorem. 0.33 Solve for v o (t) in the circuit of Fig. 0.76 using the superposition principle. 80 Ω I o j60 Ω 20 Ω 00 20 V j40 Ω j40 Ω 60 30 V Figure 0.70 For Pro. 0.23.

426 PART 2 AC Circuits 6 Ω 2 H 20 Ω 0.4 mh 2 cos 3t V v 2 F o 4 sin 2t A 0 V 5 cos 0 5 t V 0.2 mf 80 Ω v o Figure 0.76 For Pro. 0.33. Figure 0.80 For Pro. 0.37. 0.34 Determine i o in the circuit of Fig. 0.77. 0 sin(3t 30 ) V Ω 6 F 24 V 2 H 2 Ω 2 cos 3t i o 0.38 Solve Pro. 0.20 using source trnsformtion. 0.39 Use the method of source trnsformtion to find I x in the circuit of Fig. 0.8. Figure 0.77 For Pro. 0.34. 0.35 Find i o in the circuit in Fig. 0.78 using superposition. 20 mf 2 Ω j j2 Ω I x 60 0 V 6 Ω 5 90 A j3 Ω 50 cos 2000t V 40 mh 80 Ω i o 00 Ω Figure 0.8 For Pro. 0.39. 2 sin 4000t A 60 Ω 24 V Figure 0.78 For Pro. 0.35. 0.40 Use the concept of source trnsformtion to find V o in the circuit of Fig. 0.82. Section 0.5 Source Trnsformtion 0.36 Using source trnsformtion, find i in the circuit of Fig. 0.79. 3 Ω i j3 Ω j 20 0 V j2 Ω 2 Ω j2 Ω V o 5 Ω 8 sin(200t 30 ) A 5 mh Figure 0.82 For Pro. 0.40. mf Figure 0.79 For Pro. 0.36. 0.37 Use source trnsformtion to find v o in the circuit in Fig. 0.80. Section 0.6 Thevenin nd Norton Equivlent Circuits 0.4 Find the Thevenin nd Norton equivlent circuits t terminls - for ech of the circuits in Fig. 0.83.

CHAPTER 0 Sinusoidl Stedy-Stte Anlysis 427 j20 Ω 0 Ω 0.44 For the circuit depicted in Fig. 0.86, find the Thevenin equivlent circuit t terminls -. 50 30 V j0 Ω () j5 Ω 8 Ω 5 45 A j0 Ω j6 Ω Figure 0.86 For Pro. 0.44. 4 0 A 8 Ω j0 Ω 0.45 Repet Pro. 0. using Thevenin s theorem. () 0.46 Find the Thevenin equivlent of the circuit in Fig. 0.87 s seen from: () terminls - () terminls c-d Figure 0.83 For Pro. 0.4. c d 0.42 For ech of the circuits in Fig. 0.84, otin Thevenin nd Norton equivlent circuits t terminls -. 0 Ω j 6 Ω j 20 0 V j5 Ω 4 0 A j2 Ω 2 0 A () 30 Ω Figure 0.87 For Pro. 0.46. 0.47 Solve Pro. 0.3 using Thevenin s theorem. 0.48 Using Thevenin s theorem, find v o in the circuit in Fig. 0.88. 3i o 20 45 V 60 Ω j0 Ω i o 2 H () j5 Ω 2 cos t V 4 F 8 F 2 Ω v o Figure 0.84 For Pro. 0.42. 0.43 Find the Thevenin nd Norton equivlent circuits for the circuit shown in Fig. 0.85. 5 Ω j0 Ω 2 Ω Figure 0.88 For Pro. 0.48. 0.49 Otin the Norton equivlent of the circuit depicted in Fig. 0.89 t terminls -. 5 mf 60 20 V j20 Ω 4 cos(200t 30 ) V 0 H 2 kω Figure 0.85 For Pro. 0.43. Figure 0.89 For Pro. 0.49.

428 PART 2 AC Circuits 0.50 For the circuit shown in Fig. 0.90, find the Norton equivlent circuit t terminls -. 00 kω 0 nf 3 60 A 60 Ω 40 Ω j80 Ω j30 Ω v s 50 kω vo Figure 0.90 For Pro. 0.50. 0.5 Compute i o in Fig. 0.9 using Norton s theorem. 2 Ω 5 cos 2t V i o Figure 0.94 For Pro. 0.54. 0.55 Compute i o (t) in the op mp circuit in Fig. 0.95 if v s = 4 cos 0 4 t V. 50 kω 4 F 4 H 2 F v s nf i o 00 kω Figure 0.9 For Pro. 0.5. 0.52 At terminls -, otin Thevenin nd Norton equivlent circuits for the network depicted in Fig. 0.92. Tke ω = 0 rd/s. 2 sin vt V v o 0 mf 0 Ω 2 cos vt 2 H Figure 0.92 For Pro. 0.52. Section 0.7 Op Amp AC Circuits 0.53 For the differentitor shown in Fig. 0.93, otin V o /V s. Find v o (t) when v s (t) = V m sin ωt nd ω = /RC. v s C Figure 0.93 For Pro. 0.53. R vo 2v o 0.54 The circuit in Fig. 0.94 is n integrtor with feedck resistor. Clculte v o (t) if v s = 2 cos 4 0 4 t V. Figure 0.95 For Pro. 0.55. 0.56 If the input impednce is defined s Z in = V s /I s, find the input impednce of the op mp circuit in Fig. 0.96 when R = 0 k, R 2 = 20 k, C = 0 nf, C 2 = 20 nf, nd ω = 5000 rd/s. I s R R 2 V s C 2 Z in Figure 0.96 For Pro. 0.56. 0.57 Evlute the voltge gin A v = V o /V s in the op mp circuit of Fig. 0.97. Find A v t ω = 0, ω, ω = /R C, nd ω = /R 2 C 2. V s R C R 2 Figure 0.97 For Pro. 0.57. C C 2 Vo V o

CHAPTER 0 Sinusoidl Stedy-Stte Anlysis 429 0.58 In the op mp circuit of Fig. 0.98, find the closed-loop gin nd phse shift if C = C 2 = nf, R = R 2 = 00 k, R 3 = 20 k, R 4 = 40 k, nd ω = 2000 rd/s. 0.6 For the op mp circuit in Fig. 0.0, otin v o (t). 20 kω R 0 kω 0. mf 0.2 mf 40 kω v s C C 2 R 2 R 4 vo 5 cos 0 3 t V v o R 3 Figure 0.0 For Pro. 0.6. Figure 0.98 For Pro. 0.58. 0.59 Compute the closed-loop gin V o /V s for the op mp circuit of Fig. 0.99. 0.62 Otin v o (t) for the op mp circuit in Fig. 0.02 if v s = 4 cos(000t 60 ) V. 50 kω 20 kω 0.2 mf v s R 3 C 2 R 2 R C v o v s 0. mf 0 kω v o Figure 0.99 For Pro. 0.59. 0.60 Determine v o (t) in the op mp circuit in Fig. 0.00 elow. Figure 0.02 For Pro. 0.62. Section 0.8 AC Anlysis Using PSpice 0.63 Use PSpice to solve Exmple 0.0. 0.64 Solve Pro. 0.3 using PSpice. 20 kω 0 kω 0.5 mf v o 2 sin 400t V 0.25 mf 0 kω 40 kω 20 kω Figure 0.00 For Pro. 0.60.

430 PART 2 AC Circuits 0.65 Otin V o in the circuit of Fig. 0.03 using PSpice. j2 Ω 3 0 A j Ω V x Figure 0.03 For Pro. 0.65. 2V x 2 Ω V o 0.66 Use PSpice to find V, V 2, nd V 3 in the network of Fig. 0.04. 0.68 Use PSpice to find v o nd i o in the circuit of Fig. 0.06 elow. Section 0.9 Applictions 0.69 The op mp circuit in Fig. 0.07 is clled n inductnce simultor. Show tht the input impednce is given y where Z in = V in I in = jωl eq L eq = R R 3 R 4 C R 2 R R 2 R 3 C R 4 8 Ω I in V in V j0 Ω j0 Ω V 2 V 3 60 30 V j j 4 0 A Figure 0.04 For Pro. 0.66. Figure 0.07 For Pro. 0.69. 0.70 Figure 0.08 shows Wien-ridge network. Show tht the frequency t which the phse shift etween the input nd output signls is zero is f = 2 πrc, nd tht the necessry gin is A v = V o /V i = 3t tht frequency. 0.67 Determine V, V 2, nd V 3 in the circuit of Fig. 0.05 using PSpice. C R R j0 Ω j V 2 Ω Ω V 2 V 3 V i R V o C R 2 4 0 A 8 Ω j6 Ω j2 Ω 2 0 A Figure 0.05 For Pro. 0.67. Figure 0.08 For Pro. 0.70. 0.7 Consider the oscilltor in Fig. 0.09. () Determine the oscilltion frequency. 20 mf 2 H 6 cos 4t V 0.5v o i o 4i o 0 Ω 25 mf v o Figure 0.06 For Pro. 0.68.

CHAPTER 0 Sinusoidl Stedy-Stte Anlysis 43 () Otin the minimum vlue of R for which oscilltion tkes plce. 20 kω 0 kω 80 kω 0.4 mh 2 nf R (Hint: Set the imginry prt of the impednce in the feedck circuit equl to zero.) 0.74 Design Colpitts oscilltor tht will operte t 50 khz. 0.75 Figure 0.2 shows Hrtley oscilltor. Show tht the frequency of oscilltion is f o = 2π C(L L 2 ) R f Figure 0.09 For Pro. 0.7. R i V o 0.72 The oscilltor circuit in Fig. 0.0 uses n idel op mp. () Clculte the minimum vlue of R o tht will cuse oscilltion to occur. () Find the frequency of oscilltion. C L 2 L MΩ 00 kω 0 mh 2 nf Figure 0.0 For Pro. 0.72. R o 0 kω Figure 0.2 A Hrtley oscilltor; for Pro. 0.75. 0.76 Refer to the oscilltor in Fig. 0.3. () Show tht V 2 = V o 3 j (ωl/r R/ωL) () Determine the oscilltion frequency f o. (c) Otin the reltionship etween R nd R 2 in order for oscilltion to occur. 0.73 Figure 0. shows Colpitts oscilltor. Show tht the oscilltion frequency is f o = 2π LC T where C T = C C 2 /(C C 2 ). Assume R i X C2. R 2 R Vo R L V 2 L R R f R i V o Figure 0.3 For Pro. 0.76. L C 2 C Figure 0. A Colpitts oscilltor; for Pro. 0.73.