ENGG1203: Introduction to Electrical and Electronic Engineering Second Semester, 2017 18 Homework 1 Due: 15 Mar, 2018, 11:55pm Instruction: Submit your answers electronically through Moodle. In Moodle, you must submit under the Homework 1 link with the following files: 1. amon.circ for Question 3; 2. ONE (1) PDF file containing answers to all remaining questions Your homework will be graded electronically so you must submit your work as a PDF file. To generate PDF file from your computer, you may use one of the many free PDF creators available, e.g. PDFCreator (http://sourceforge.net/projects/pdfcreator), CutePDF Writer (http://www.cutepdf.com/products/ CutePDF/Writer.asp). You need to design your circuit in Logisim for Question 3. Logisim can be downloaded freely from http://www.cburch.com/logisim/. It runs on Linux, Mac, and Windows machines. Question 1 Short Questions Part(a) Simplify each of the following Boolean expressions by using K-map. Show the completed K-map and the way you looped the 1 s. Furthermore, based on your K-map, implement the expression using only 2-input AND gates, 2-input OR gates, or NOT gates. 1. Z + XY 2. P Q + (S Q + R S) (P + Q) 3. (A B + C) (A + C)
Part(b) Any combinational circuit can be represented either with a circuit schematic, a Boolean expression, or a truth table. In the following, you are given one representation of a circuit. Your task is to also represent the same circuit with the other 2 representations. In all cases, inputs are A, B, C, and D, while output is always labeled as Y. Simplify your answer and write Boolean expressions in canonical SOP form. (i) Y = AB + B C D + AD + C D (iii) A B C D Y 0 0 0 0 1 0 0 0 1 1 0 0 1 0 1 0 0 1 1 1 0 1 0 0 1 0 1 0 1 1 0 1 1 0 0 0 1 1 1 0 1 0 0 0 0 1 0 0 1 0 1 0 1 0 1 1 0 1 1 0 1 1 0 0 0 1 1 0 1 0 1 1 1 0 0 1 1 1 1 0 (v) (ii) (AC + B D) AD + BC + B C D (iv) A B C D Y 0 0 0 0 1 0 0 0 1 0 0 0 1 0 1 0 0 1 1 0 0 1 0 0 1 0 1 0 1 1 0 1 1 0 1 0 1 1 1 1 1 0 0 0 1 1 0 0 1 0 1 0 1 0 1 1 0 1 1 0 1 1 0 0 0 1 1 0 1 1 1 1 1 0 0 1 1 1 1 1 (vi) A A B Y B Y C C D D r1.2 Page 2 of 14
Part(c) The following FSM implements a sequence detector that examines input X, which is a string of 0 s and 1 s, and generates an output Y, which gives a value of 1 when the pattern 010 is detected, and 0 otherwise. The position of Y = 1 coincides with the last 1 detected in the pattern. For example: X = 0 0 1 0 0 1 1 1 1 0 1 0 1 0 0... Y = 0 0 0 1 0 0 0 0 0 0 0 1 0 1 0... Complete the following state machine such that it will correctly implement this sequence detector. The transitions are labeled with the notation input / [output]. 0/[1] 0/[0] 1/[0] S0 S1 S2 Part(d) Draw the timing diagram of the following circuit: D Y A B C clk r1.2 Page 3 of 14
A B C D Y clk r1.2 Page 4 of 14
Question 2 Complex Number Arithmetic You would like to design a multiplier that multiplies two complex numbers. Let j = 1; engineers like to use j instead of i because the latter is traditionally reserved to denote electric current. Let the two inputs be a + jb and c + jd, then your multiplier produces a complex number e + jf such that and e + jf = (a + jb) (c + jd) { e = ac bd (1a) f = ad + bc (1b) To simplify the design, the complex numbers in your system have only limited range: For all complex numbers x + jy in the system, x, y { 1, 0, 1}. Therefore, for example, 1 + j and j are both valid numbers while 2 + j is not. In your hardware system, each complex number is represented by 4 bits, with 2 bits representing the real part (x of x + jy) in 2 s complement, and 2 bits representing the complex part (y of x + jy) in 2 s complement. Part(a) Real Number Multipliers The first step in your design is to implement a real number multiplier (rm) that you will use to implement equation 1a and 1b. rm takes two 2-bit inputs m (m1m0) and n (n1n0) and produces a 2-bit output p (p1p0). Some examples on how it should behave: m n = p 1 0 = 0 1 1 = 1 1 1 = 1 r1.2 Page 5 of 14
Complete the following truth tables for rm relating p1 p0 to the input m1 m0 n1 n0. Remember: the numbers m, n, p are all encoded as 2-bit 2 s-complement numbers. m1 m0 n1 n0 p1 p0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 1 1 0 1 0 0 0 1 0 1 0 1 1 0 0 1 1 1 1 0 0 0 1 0 0 1 1 0 1 0 1 0 1 1 1 1 0 0 1 1 0 1 1 1 1 0 1 1 1 1 r1.2 Page 6 of 14
Part(b) K-map and Minimization Based on your answer from the previous part, perform the following: 1. Draw the K-map for the signal p1; 2. Derive the minimized Boolean expression for p1 using the above K-map; 3. Express your answer in canonical SOP form. Part(c) Adder/Subtractor Another component needed to implement equation 1a and 1b is a real value adder/subtractor (ras). Recall that in your system real numbers only take the values of { 1, 0, 1}. If the result of an add or subtract is 2 or 2, then the result will wrap back to 0. For example: 1 + 1 = 0 1 + 1 = 0 1 0 = 1 1 + ( 1) = 0 The design of ras has 5 input signals and 2 output signals with the following meanings: Direction Name Description input 1 to perform subtraction, 0 to perform issub addition input s1 s0 2-bit input value in 2 s complement input t1 t0 2-bit input value in 2 s complement output r1 r0 2-bit output value in 2 s complement Complete the following truth table for ras: r1.2 Page 7 of 14
issub s1 s0 t1 t0 r1 r0 Part(d) 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 1 1 0 0 1 0 0 0 0 1 0 1 0 0 1 1 0 0 0 1 1 1 0 1 0 0 0 0 1 0 0 1 0 1 0 1 0 0 1 0 1 1 0 1 1 0 0 0 1 1 0 1 0 1 1 1 0 0 1 1 1 1 1 0 0 0 0 1 0 0 0 1 1 0 0 1 0 1 0 0 1 1 1 0 1 0 0 1 0 1 0 1 1 0 1 1 0 1 0 1 1 1 1 1 0 0 0 1 1 0 0 1 1 1 0 1 0 1 1 0 1 1 1 1 1 0 0 1 1 1 0 1 1 1 1 1 0 1 1 1 1 1 Putting it Together In the following space, draw the design of your complex number multiplier (cm) using the real number multiplier (rm) and the real number adder/subtractor (ras) you designed above as components. Write 1 or 0 if you need to pas a constant 1 or 0 to the circuit. r1.2 Page 8 of 14
d1d0 n1n0 p1p0 m1m0 rm issub c1c0 n1n0 p1p0 m1m0 rm t1t0 r1r0 s1s0 ras f1f0 b1b0 n1n0 p1p0 m1m0 rm issub e1e0 a1a0 n1n0 p1p0 m1m0 rm t1t0 r1r0 s1s0 ras r1.2 Page 9 of 14
Question 3 Alfred the Smart Home Butler You are the chief architecture for Alfred, your company s next flagship product that acts as a voicecontrolled smart home speaker. Alfred is a smart speaker that can play music while controlling all parts of your smart home such lighting and air conditioning. It can process natural language and communicates with you with normal voice conversation. To initiate a voice command, you need to draw Alfred s attention by saying one of the following magic phrases: Hello Alfred With the above, you can then ask Alfred questions such as, Hello Alfred, what is the weather today? or Hello Alfred, turn off the light in kitchen please. In this question, you will design Alfred s monitoring logic that constantly listening to the environment for the magic phrases. As an elite ENGG1203 student, you have decided to implement this logic as a finite state machine. Your monitoring module is connected to the rest of the system as follow. timer s t h p microphone a amon f Query Process Figure 1: Overview of the Alfred system, showing the connection between the monitoring module and the rest of the system. As shown in the diagram your monitoring module has the following input and output signals: Dir Name Description input h 1: the word Hello is detected, 0 otherwise a 1: the word Alfred is detected, 0 otherwise t 1: if timer is expired, 0 otherwise f 1: finished processing voice query, 0 otherwise output s 1: start external timer countdown, 0 otherwise p 1: tell voice query module to process voice command, 0 otherwise A note about the operation of Alfred: amon constantly monitor for the phrase Hello Alfred from the environment. If the phrase is detected, it assert the signal p to start the subsequent query process (e.g. What is the time now?). It relies on the external timer to determine the time between whe the word Hello and Alfred are heard. If, for example, it hears Hello but never hear Alfred within certain time as determined by the timer then it should ignore the Hello and go back to sleep. For example, if someone say, amon should not regard it has a wakeup phrase. Hello Peter, are you going to meet Alfred today? To start the timer, amon should set the signal s to 1 for one cycle. After a specific time, the signal t will be set to 1 by the timer for one cycle. If you assert s before the timer expires, it will simply restart the timer from the begining. Once the Query processing module has completed its task, it assert the signal f for one cycle. r1.2 Page 10 of 14
Part(a) Your amon FSM, has the following states defined: State Sleep Hello Awake Description Alfred is sleeping, waiting for the command Hello Alfred Alfred is half awake after hearing Hello Alfred is awake after successfully detecting a magic phrase h/[0, 0] Sleep Hello Awake Part(b) You are implementing the above FSM in hardware. You are encoding the states with 2 bits (s2 s1 s0) using the following encoding: State s1 Encoding s0 Sleep 0 0 Hello 0 1 Awake 1 0 Complete the next state and output logic table for your FSM in the following page. situations, write down X in the corresponding space. For don t care r1.2 Page 11 of 14
s1 s0 h a t f ns1 ns0 s p 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 1 1 0 0 0 1 0 0 0 0 0 1 0 1 0 0 0 1 1 0 0 0 0 1 1 1 0 0 1 0 0 0 0 0 1 0 0 1 0 0 1 0 1 0 0 0 1 0 1 1 0 0 1 1 0 0 0 0 1 1 0 1 0 0 1 1 1 0 0 0 1 1 1 1 0 1 0 0 0 0 0 1 0 0 0 1 0 1 0 0 1 0 0 1 0 0 1 1 0 1 0 1 0 0 0 1 0 1 0 1 0 1 0 1 1 0 0 1 0 1 1 1 0 1 1 0 0 0 0 1 1 0 0 1 0 1 1 0 1 0 0 1 1 0 1 1 0 1 1 1 0 0 0 1 1 1 0 1 0 1 1 1 1 0 0 1 1 1 1 1 1 0 0 0 0 0 1 0 0 0 0 1 1 0 0 0 1 0 1 0 0 0 1 1 1 0 0 1 0 0 1 0 0 1 0 1 1 0 0 1 1 0 1 0 0 1 1 1 1 0 1 0 0 0 1 0 1 0 0 1 1 0 1 0 1 0 1 0 1 0 1 1 1 0 1 1 0 0 1 0 1 1 0 1 1 0 1 1 1 0 1 0 1 1 1 1 r1.2 Page 12 of 14
Part(c) Implement the above FSM in Logisim. Apart from the I/O described above, your machine should also include a clock input clk, and a reset input clr. The following table summarizes the input/output ports of your state machine. The column Order indicates the order of the pin in the circuit symbol. Direction Order Name Logisim Type input 1 h Pin 2 a Pin 3 t Pin 4 f Pin 5 clk Pin 6 clr Pin output 1 s Pin 2 p Pin Your circuit will be graded automatically, so it is very important for you to use the exact pin names in the above table in your circuit. Download the file http://www.eee.hku.hk/~engg1203/sp18/handouts/ hw1src.zip. You may use the included amon.circ as a template for your design. You may find the file amon-test.circ useful for testing your circuit. Put the two files (amon.circ and amon-test.circ) in the same directory for the file amon-test.circ to run. Save your answer in amon.circ and submit this file via Moodle. Part(d) Optional: Just for Fun Name the comic/movie that may have inspired the product name Alfred. r1.2 Page 13 of 14
Question 4 Number Systems in Computers Part(a) Represent the numbers 12, -5, 332, -9, -1.25, π in the following formats. Write N/A if the number cannot be represented in that format: (i) 6-bit unsigned number (ii) 7-bit 2 s complement number (iii) 10-bit 1 s complement number (iv) 8-bit sign-magnitude number with 1 as the most significant bit representing a negative number. Part(b) Perform the calculation if the 9-bit numbers are in the following formats: (i) 9-bit unsigned number; (ii) 9-bit 1 s complement; (iii) 9-bit 2 s complement; (iv) 9-bit sign-magnitude, with a 1 as the most significant bit representing a negative number. Write your answer in the following table. Indicate with N/A if the number cannot be using the specified format. Write your answers in decimal. number 9-bit unsigned 9-bit 1 s complement sign- 9-bit magnitude 9-bit 2 s complement 111111100 000000111 Part(c) Convert the following numbers into binary: 12.5625, 0.140625, 46.375 Assuming you are using a computer with 8-bit words, and you decide to use 4 bits to store the values on the LEFT of the binary point, and use the remaining 4 bits to store the values on the RIGHT of the binary point, which of the above numbers can be represnted in this new format? r1.2 Page 14 of 14