METR4200 Advanced Control Lecture 4 Chapter Nie Controller Deign via Frequency Repone G. Hovland 2004 Deign Goal Tranient repone via imple gain adjutment Cacade compenator to improve teady-tate error Cacade compenator to improve tranient repone Cacade compenator to improve both teady-tate error and tranient repone Deign via frequency repone parallel deign via rootlocu. In many cae deign via frequency repone i eaier (ref ection.)
The Simplet Controller: The P-Controller u(t) - K G() y(t) Goal: Relate the value of K to percentage overhoot in y(t) for a tep repone in u(t) Gain Adjutment and Percentage Overhoot Firt tep: relate percentage overhoot to phae margin From lecture note 2, we have Phae Margin of 65 o give no peaking Note: Thi i an approximation for a 2 nd order ytem. Derivation of thi curve in Nie page 652-653
2 nd Step: Phae Margin v Gain Adjutment Example.: P-control of DC motor Thi i a imple control problem for a DC motor. The function /(+36) i the tranfer function from torque to peed, given by Inertia of motor and load J w & + Dw τ Vicou friction
For a 9.5% tep-repone overhoot, find K Chooe firt K3.6 to tart curve at 0dB at w0. yield ζ 0.6 Example.: Damping Ratio v. Phae Margin ζ 0.6 PM 59 o A alway, thi i an approximation for a 2 nd order ytem. In the DC motor cae, thi approximation i valid becaue of the amplifier dynamic.
Example.: Locate Phae-Margin 59 o 44.2dB increae required Final K 3.6 x 44.2 db 583.9 w4.5 rad/ec Characteritic of Gain-Compenated DC Motor Note thi error contant. A better controller would increae K v. Note thi frequency! Thi i not a particularly fat controlled DC motor. But we have achieved the goal on overhoot. Thee deign improvement are the next topic!
Table 7.2: Steady-State Error Chapter.3: Lag Compenation Low frequency gain not affected by lag compenator Untable! Stable A lag compenator allow a large low-freq. gain while avoiding intability!
Deign Procedure: Lag-Compenator t tep: Set the gain to the value that atifie the teady-tate error pecification (ee Table 7.2) Deign Procedure: Lag-Compenator 2 nd tep: Find frequency w p where the phae margin i 5 o to 2 o greater than phae margin that yield deired tranient repone. Thi margin i needed ince the lag compenator itelf contribute with negative phae. (The name "lag" come from the negative phae) 0dB decade -20dB/decade { { 5 o to 2 o margin: w p Select upper break decade below Select low freq. gain at 0dB and lope -20 db/decade
Frequency Repone of Lag-Compenator Need factor 0. to reduce low-freq. gain to 0dB -2 o 5 o to 2 o region decade margin to enure Frequency repone plot of a lag compenator, G c () ( + 0.)/( + 0.0) Example.2 Ue Bode diagram to deign a lag-compenator to yield a tenfold improvement in teady-tate error over the imple P-controller while keeping the overhoot at 9.5%
Example.2: t Step t tep: Gain K 0 x 583.9 G( ) 583,900 ( + 36)( + 00) Example.2: 2 nd Step 9.5% overhoot gave 59.2 o phae margin in Ex.. Increae thi margin to 69.2 o (5 o -2 o extra) 24dB 69.2 o margin at w p 9.8 rad/
Example.3: 3 rd tep -24dB 0.062 rad/ec decade, ie. 0.98 rad/ec 0.063( + 0.98) Lag-Compenator for DC motor: G c ( ) ( + 0.062) Characteritic of Lag-Compenated DC Motor Tenfold improvement in teady-tate error contant Overhoot remain the ame, becaue of phae margin. The only drawback
Chapter.4: Lead Compenation Goal Increae phae margin to reduce percentage overhoot (from B to D) Increae croover frequency to realie a fater tranient repone (from A to C) Lead-Compenator G c + ( ) T, < + T "Lead" becaue phae angle are poitive
Lead-Compenator Max Value φ w w φ G c Nie, Page 703 T in + ( jw ) Deign Procedure: Lead Compenator t tep: Find the cloed-loop bandwidth w bw required to meet the ettling time, peak time or rie time (ee Lecture 2 Note) 2 nd tep: The lead compenator ha negligible effect at low frequencie. Hence, et gain K to atify teadytate error. 3 rd tep: Plot Bode for gain value of tep 2. Determine the uncompenated ytem' phae margin. (Could alo be untable) 4 th tep: Find phae margin to determine overhoot requirement (2 nd order approximation). Evaluate additional phae needed from lead compenator
Deign Procedure: Lead Compenator 5 th tep: Determine the value of from phae contribution (φ arcin( (-) / (+) ) 6 th tep: Place w at C. Find T from G c w Plot Bode for compenated ytem. Repeat tep -6 if neceary T + ( ) T, < + T Example.3 Ue Bode diagram to deign a lead-compenator to yield a 20% overhoot and K v 40, with a peak time of 0. econd
Example.3 20% overhoot ζ0.456 T p 0. w bw 46.6 rad/ec K v 40 00K G( ) ( + 36)( + 00) yield K 40 x 36 440 Example.3: Bode plot with K440 ζ0.456 give PM48. o Uncompenated phae margin 34 o at w A 29.6 rad/ec We need an extra 4. o PM. Since w bw will increae, we add 0 o margin Total lead compenation 24. o
Example.3 φ 24. o yield 0.42 G c (jw ) 3.76 db Check next where the uncompenated ytem pae through -3.76 db (tep 6) Yield w 39 rad/ec Hence, T 25.3 Bandwidth w bw 68.8 rad/ec w φ G c T in + ( jw ) Characteritic of Lead-Compenated DC Motor G c + ( ) T + T 2.38 + + 25.3 60.2 Significant bandwidth improvement!
Chapter.5: Lag-Lead Compenation Lag Compenation improve mainly teady-tate error (ie. gain at low frequencie can be raied) and/or tabilie the ytem Lead Compenation improve mainly tranient behaviour (ie. croover frequency can be raied) Lag-Lead Compenation i an attempt to achieve both improvement at once Lag-Lead Compenation G ( ) c G lead ( ) G lag ( ) + + + T T2 γ + T γt 2 Deign parameter T, T 2 and γ Note relation between γ and / See Table 9.0 in Nie
Lag-Lead Compenation: Bode Plot Deign Procedure: Lag-Lead Compenation t tep: Find the cloed-loop bandwidth w bw required to meet the ettling time, peak time or rie time (ee Lecture 2 Note) 2 nd tep: The lag-lead compenator ha negligible effect at low frequencie. Hence, et gain K to atify teadytate error. 3 rd tep: Plot Bode for gain value of tep 2. Determine the uncompenated ytem' phae margin. 4 th tep: Find phae margin to determine overhoot requirement (2 nd order approximation).
Deign Procedure: Lag-Lead Compenation 5 th tep: Select a croover frequency w c near (below) w bw 6 th tep: At w c determine additional amount of phae required. Add a margin of 5 o -0 o. Thi amount determine γ. Ue γ / and lead compenation figure.8. 7 th tep: Deign lag compenator firt. Select upper break frequency decade below w c T 2 8 th tep: Deign lead compenator. w c w /(T ) give T 9 th tep: Plot Bode for compenated ytem and repeat -8 if neceary Example.4 Given the ytem below where G( ) ( K + )( + deign a lead-lag compenator uing Bode plot to yield a 3.25% overhoot, peak time of 2 econd and K v 2. 4)
Example.4 3.25% overhoot ζ0.54 which yield PM 55 o Tp 2.0 w bw 2.29 rad/ec K v 2 G( ) ( yield K 2 x 4 48 K + )( + 4) Example.4: Bode plot for K48 Step 5: Select w c.8 (< 2.29) Phae-76 o Lead Compenation required: 5 o +5 o
Example.4: (γ and T 2 ) Upper break decade below w c. Hence /T 2 0.8 or T 2 5.56 56 o at w c.8 rad/ec yield 0.094 and γ/0.6 φ ) ( in + jw G T w c Example.4: T / T 0.56 when w c w Final lead-lag deign: where T.79, T 2 5.56, γ0.6 φ ) ( in + jw G T w c + + + + 2 2 ) ( ) ( ) ( T T T T G G G lag lead c γ γ
Characteritic of Lead-Lag Compenated Sytem The reult below could not have been achieved with lag or lead compenation alone! The deign approach i approximate. Redeign ometime neceary