COSC 243 Introduction to Logic And Combinatorial Logic 1
Overview This Lecture Introduction to Digital Logic Gates Boolean algebra Combinatorial Logic Source: Chapter 11 (10 th edition) Source: J.R. Gregg, Ones and Zeros Next Lecture Sequential Logic Source: Lecture notes 2
Internal Assessment Data representation test During tutorial time in week 3 10% of final mark No calculators Paper provided Bring a pen or pencil 3
A Bit of History Aristotle (384-322 B.C.) George Boole (1815-1864) Sought to characterize all of human intelligence in precise symbolic form Symbolic logic 4
Introduction to Digital Logic By digital we mean binary True = High = On = 1 False = Low = Off = 0 5
Basic Logic Gates Inverter or NOT AND NAND OR NOR EOR or XOR 6
Inverter or NOT Q = Ā A Q 0 1 1 0 7
How Many Functions How many functions are there of 1 binary input with 1 binary output? A Q A Q A Q A Q 0 0 0 0 0 1 0 1 1 0 1 1 1 0 1 1 FALSE IDENTITY NOT TRUE 8
How Many Functions How many functions are there of 2 binary inputs with 1 binary output? Which ones are useful? A B Q 0 0 0 0 1 0 1 0 1 Also written B=0 B=1 A=0 0 0 A=1 1 1 1 1 1 What is the name of this function? Is it useful? 9
Q = A B AND Can be extended: Q = A B C... A B Q 0 0 0 0 1 0 1 0 0 1 1 1 10
NAND (and then not) Q =A B A B Q 0 0 1 0 1 1 1 0 1 1 1 0 11
Q = A + B OR Can be extended Q = A + B + C +... A B Q 0 0 0 0 1 1 1 0 1 1 1 1 12
NOR (or then not) Q = A + B A B Q 0 0 1 0 1 0 1 0 0 1 1 0 13
EOR / XOR (exclusive or) Q = A B = Ā B + A ഥB A B Q 0 0 0 0 1 1 1 0 1 1 1 0 14
Introduction to Combinatorial Logic Combinatorial logic circuit - one whose outputs are dependent only on the inputs Assume the outputs respond immediately In real circuits, propagation delays must be considered Hence the clock-cycle on your PC 15
Introduction to Combinatorial Logic (cont) Input i 1 i n Combinatorial Logic Circuit O 1 O n Output 16
Defining a Combinatorial Truth table Circuit For each of the 2 n possible combinations of input signals, the binary value of each of the m outputs is listed Boolean equations Each output signal is expressed as a Boolean function of its input signals Graphical signals Interconnection of gates used to implement the circuit 17
1-Bit Half Adder A B C S 0 0 0 0 A B 1-bit half adder Sum S Carry C 0 1 0 1 1 0 0 1 1 1 1 0 The 1-bit Half Adder is the result of adding 2 binary digits together (A+B) 18
1-Bit Half Adder (cont) A B C S 0 0 0 0 0 1 0 1 S = Ā B + A ഥB = A xor B C = A B = A and B 1 0 0 1 1 1 1 0 19
Full Adder Inputs Outputs A B C in C out S 0 0 0 0 0 1 0 0 0 1 0 1 0 0 1 1 1 0 1 0 0 0 1 0 1 1 0 1 1 0 0 1 1 1 0 1 1 1 1 1 20
Ripple Carry Adder 21
Boolean Precedence Operator Precedence - (NOT) 1 (AND) 2 + (OR) 3 22
Boolean Algebra Identity Proposition A + 0 = A A + 1 = 1 A 1 = A A 0 = 0 Inverse Proposition A + Ā= 1 A Ā= 0 23
Boolean Algebra (cont) Commutative Proposition A B = B A A + B = B + A Distributive Proposition A (B + C) = (A B) + (A C) A + (B C) = (A + B) (A + C) Law of Involution നA = A 24
Boolean Algebra (cont) Simplification Theorem A + A B = A A + Ā B = A + B (A + B) (A + C) = A + B C What will your compiler do when you write if (a or (a and b)) { } Is it useful to know this? A B A+A B 0 0 0 0 1 0 1 0 1 1 1 1 25
Boolean Algebra (cont) De Morgan's Theorem A + B = Ā ഥB A B = Ā + ഥB The theorem holds for any number of inputs e.g. A B C... X = Ā + ഥB + തC +...+ ഥX 26
Proof by Truth Table Use first version of De Morgan s theorem A + B = Ā ഥB A B A + B A + B Ā ഥB Ā ഥB 0 0 0 1 1 1 1 0 1 1 0 1 0 0 1 0 1 0 0 1 0 1 1 1 0 0 0 0 27
De Morgan Equations of 1-bit half adder requires 2 AND gates, 1 OR gate, and 2 NOT gates Inefficient since IC s contain groups of a single type of gate De Morgan s theorem states it is possible to convert a NOR into a NAND and vice versa 28
Equivalent Ways of Drawing NAND / NOR Gates 29
Boolean Algebra (cont) Actually, De Morgan Said: Any Boolean function can be represented as the logical sum of logical products And it gets better because AND and OR can be described by combinations of NAND gates Or alternatively NOR gates So all combinatorial circuits can be described using simply one gate type The Apollo Guidance Computer used about 5600 NOR gates and no other gate types! 30
NAND Logic NOT AND OR 31
NAND Logic NAND NOR XOR 32
Example: 3-Bit Parity Generator Add an extra bit to data such that the number of ones in the data is always odd Output - a single output (P) Inputs - three inputs labeled A, B, C A B C Parity Generator P 33
Example (cont) 3-Bit Parity Generator Boolean Equation In sum of products form In which rows does p=1 What are the inputs on those rows P = ഥA ഥB തC + ഥA B C + A ഥB C + A B തC A B C P 0 0 0 0 1 1 0 0 1 0 2 0 1 0 0 3 0 1 1 1 4 1 0 0 0 5 1 0 1 1 6 1 1 0 1 7 1 1 1 0 34
Example (cont) 3-Bit Parity Generator 35
7-Segment Decimal Decoder Example 36
ROMs Combinatorial logic is dependant only on the n inputs There are 2 n possible inputs each numbered from 0 to 2 n -1 The result is a look-up table where the input specifies a row So the logic can be implemented in a ROM chip (with m outputs) 37
Electronic Switch Transistor B=Base, C=Collector, E=Emitter Apply 0v to B and the switch opens C is disconnected from E Apply +5v to B and the switch closes C is connected to E B C E In other words, B is the switch that connects C to E 38
NAND Gate For Q to be Low (binary 0) A and B must be closed Otherwise If A is open A Q +5V +5V flows to Q If A is closed but B is open +5V flows to Q B If A and B are closed short circuit Q 39
Electronic Switch How about a switch that we can turn on and off with a control line (C) Output (Q) = Input (A) iff C = 1 C A Switch Q This is the same as an AND gate C A Q 40
Multiplexer A digital switch in which the select lines (sel 1 & sel 2 ) select between the inputs(i0 I1, I2, I3) Imagine I is 4 x 1-bit memory cells and sel selects the memory location for output to OUT SELECT 00 01 INPUTS sel 1 sel 2 I0 I1 I2 I3 OUT I0 I1 I2 I3 I0 I1 I2 I3 10 I0 I1 I2 I3 I0 I1 I2 I3 11 41
Multiplexer sel 1 sel 2 OUT 0 0 I0 0 1 I1 1 0 I2 1 1 I3 http://en.wikipedia.org/wiki/multiplexer 42
Demultiplexer The demultiplexer works in reverse One of the outputs (Y0-Y3) is selected (sel 1 -sel 2 ) for input Imagine INPUT is 1-bit value and sel selects where to store the value SELECT sel 1 sel 2 OUTPUT sel 1 sel 2 0 0 Y0 INPUT Y3 Y2 Y1 Y0 OUTPUT 0 1 Y1 1 0 Y2 1 1 Y3 43
Multiplexing Imagine using 1 wire to carry 5 conversations 44
Summary Logic gates symbols truth tables Boolean algebra Rules Equations from truth tables Combinatorial logic 45
Homework Draw a half adder using only NAND gates Extend your half-adder to a full adder using only NAND gates Draw the circuit for a 3-bit ripple carry adder Encode your 3-bit ripple carry adder as a program (Java / Python) and check it works Draw the circuit for a 1-input 2-selector 4- output demultiplexer 46