EC 216(R-15) Total No. of Questions :09] [Total No. of Pages : 02 II/IV B.Tech. DEGREE EXAMINATIONS, DECEMBER- 2016 First Semester ELECTRONICS & COMMUNICATION ENGINEERING PROFESSIONAL ETHICS AND HUMAN VALUES Time: Three Hours 1. Explain the following Answer Question No.1 Compulsory. Answer One Question from each Unit. a) Human values b) Normative inquiry c) Moral autonomy d) Whistle blowing e) Collective Bargaining f) Discrimination UNIT-I 2. a) Explain the importance of caring, sharing and honesty Maximum marks:60 6X2=12 M 4X12=48 M b) Explain the importance of integrity, honesty and courage in human values. 3. a) What is the significance of Engineering Ethics? Explain b) What do you understand by the term spirituality? How can it be promoted at work place? UNIT-II 4. a) Explain the Kohlberg s theory of ethics. b) Explain the theories of right action and self-interest. 5. a) Explain various ethical theories. b) What is meant by professional responsibility and discuss the theories about virtues? UNIT-III 6. a) Describe the role of engineers as responsible experimenters. b) Discuss the ways and means of reducing occupational crimes in industries. 7. a) How do engineering projects differ from standard experimentation? b) What is risk? List the factors which influence the assessment and acceptance of risk by the public. 1 P.T.O
UNIT-IV 8. a) Describe the concept of environmental ethics with examples. b) What is meant by ethical hacking? How can technology transfer bring about conflicts of interest? 9. a) What is the importance of computer ethics? Discuss the functioning of anonymity and privacy as (i) helpful (ii) undesirable in computer aided activities. b) Explain the origin and development of the codes of the Engineering Societies. 2
EC/EE/EI 216 (CR) Total No. of Questions :09] [Total No. of Pages : 02 II/IV B.Tech. DEGREE EXAMINATIONS, DECEMBER- 2016 First Semester EC/EE/EI DIGITAL LOGIC DESIGN Time: Three Hours Answer Question No.1 Compulsory. Answer One Question from each Unit. 1. a) What is prime implicant? b) Convert (0.640625) 10 to octal c) Simplify the expression ABC ABC ABC. d) State the limitations of K-map. e) Define encoder. Maximum marks:70 14X1=14 M 4X14=56 M f) Draw the logic symbol and construct the truth table for two input XOR gate. g) Define de-multiplexer h) Write the excitation table for RS flip-flop. i) Define register. j) What is the draw back in SR flip-flop? k) List the differences between combinational circuit and sequential circuit. l) Define fan-in m) Give the two advantages of ECL gate. n) What are the logic families? Which one is the fast in operation? UNIT-I 2. a) Obtain the 1 s and 2 s complement of the following binary numbers i) 1010101 ii) 100000 iii) 011100 iv) 000000 b) Simplify the following Boolean function by using tabulation method. F (0,1,2,8,10,11,14,15) 3. a) Simplify the following Boolean functions to a minimum number of literals i) XYZ X Y XYZ ii) Y () WZ WZ XY iii) ZX ZX Y iv) ()() X Y X Y b) Simplify the following Boolean function using k-map F ABC BCD ABCD ABC 1 P.T.O
UNIT-II 4. a) Implement full adder circuit with a decoder and two OR gates. b) Design a combinational circuit for two input comparator. 5. a) Design a 4 line to 2 line priority encoder include an output E to indicate that at least one input is 1. b) Design a combinational circuit whose input is four bit BCD and whose output is excess-3. UNIT-III 6. a) Draw the logic diagram of JK flip flop and using excitation table, explain its operation b) Design a four bit ripple counter using JK flip flops. 7. a) Design a four bit synchronous counter with JK-flip flops b) Convert from JK flip flop to D flip flop UNIT-IV 8. a) Briefly explain the operation of RTL logic? b) Sequential circuit has two JK flip flops A and B and one input x. The circuit is described by the following flip flop input equations. J a =x K a = B J b =x K b =A i) Derive the state equation A(t+1) and B(t+1) by substituting the input equations for the J and K variables. ii) Draw the state diagram of the circuit 9. a) Design a sequential circuit with two D flip-flops A and B and one input x. When x=0, the state of the circuit remains the same. when x=1, the circuit goes through the state transition from 00 to 11 to 11 to 10 back to 00 and repeats? b) Explain with neat diagram how an open collector TTL operates? 2
EC/EE/EI 216 (RR) Total No. of Questions :09] [Total No. of Pages : 02 II/IV B.Tech. DEGREE EXAMINATIONS, DECEMBER- 2016 First Semester EC/EE/EI DIGITAL ELECTRONICS Time: Three Hours Answer Question No.1 Compulsory. Answer One Question from each Unit. 1. a) What is an essential prime implicant? Maximum marks:70 14X1=14 M 4X14=56 M b) Which gates are called as the universal gates and why? c) Covert gray code of 101011 into its binary equivalent d) Define duality property e) Define multiplexer. f) Write the truth table for half adder? g) What is the difference between decoder and multiplexer h) Define race around condition i) Write the excitation table for JK flip-flop j) Define sequential logic circuit k) Define counter. l) Mention the classification of saturated bipolar logic families. m) State advantages and disadvantages of TTL n) Define power dissipation UNIT-I 2. a) Using 2 s complement subtract following binary numbers i) 1010100-1000100 ii) 1000100-1010100 iii) 1010101-0101010 b) Determine the prime implicates of the following function using tabulation method F(W,X,Y,Z)= (1, 4, 6, 7,8,9,10,11,15) 3. a) Without converting the numbers into decimal add and multiply the following i) Binary number 1010 and 110 (ii) Hexadecimal number 3E and 28 b) Simplify the Boolean function using k-map F(A,B,C,D,E)= (0, 2, 4, 6,9,11,13,15,17, 21, 25, 27, 29,31) 1 P.T.O
4. a) Briefly explain the BCD to 7-segment display using K-map? b) Implement full adder circuit with two half adders and OR gate. 5. a) Design a combinational circuit for two bit comparator. b) Discuss the applications of multiplexer and de-multiplexer. UNIT-III 6. a) Show that the characteristic equation of SR flip flop is Q(t+1)=S+R Q. b) What is the difference between flip flop and latch and explain SR latch. 7. a) Design four bit up-down counter using T-flip flops. b) Convert from SR flip flop to JK flip flop UNIT-IV 8. a) Solve the following two Boolean functions using a PLA having 3-inputs, 4 product terms and 2 outputs? F1(A,B,C)= (0,1, 2, 4) F2(A,B,C)= (0,5, 6, 7) UNIT-II b) What are the differences between PROM, PLA and PAL 9. a) Briefly explain the operation of TTL logic? b) Design and implement 3-bit binary to gray code converter using PLA? 2
EC/EE 216 (CR) Total No. of Questions :09] [Total No. of Pages : 02 II/IV B.Tech. DEGREE EXAMINATIONS, APRIL/MAY- 2016 First Semester EC/EE DIGITAL LOGIC DESIGN Time: Three Hours Answer Question No.1 Compulsory Answer ONE question from each Unit 1. a. State de-morgan s theorems. b. Convert (634) 8 to binary. c. Define duality property. d. List the different classification of binary codes? e. Draw the truth table of Ex-NOR gate. f. Define decoder. g. List the design procedure for combinational circuits? h. Define comparator. i. What is edge triggered flip flop? j. Write the truth table for JK flip flop k. Define race around condition. l. Define fan-out. m. List the important characteristics of digital IC s. n. What are the types of TTL logic. 2. a. Convert the following numbers i. (225.225) 10 to binary ii. (11010111.110) 2 to decimal iii. (623.77) 8 to hexadecimal. UNIT-I b. Minimize the following logic function using tabulation method. F(a,b,c,d) = m (0,1,2,8,10,11,14,15) 3. a. Simplify the following Boolean functions. i. x yz + x yz + xy z + xy z ii. x yz + xy z + xyz + xyz iii. x z x y + xy z + yz iv. x y z + x yz + xy z + xy z +xyz 1 Maximum marks:70 14X1=14 M 4X14=56 M P.T.O
b. Reduce the following function using K-map F= m (1, 4, 5, 6, 7, 8, 9, 14, 15). UNIT-II 4. a. Realize Full Adder Using two half adders and logic gates. b. Draw the block diagram of BCD adder using two 4-bit parallel binary adders and logic gates. 5. a. Implement 64 x 1 multiplexer with four 16 x 1 and 4 x 1 multiplexer. b. Design 4-bit comparator using logic gates? UNIT-III 6. a. Draw the logic diagram of a SR flip flop and using excitation table, explain its operation. b. Convert from SR flip flop to JK flip flop 7. a. Design a four bit synchronous counter with D-flip flops. b. Distinguish between transition table and excitation table. UNIT-IV 8. a. Draw the ASM chart for the following state transition, start from the initial state T1, then if xy=00 go to T2, if xy=01 go to T3, if xy=10 go to T1, other wise go to T3. b. List the differences between TTL, ECL and IIL logic families. 9. a. A sequential circuit has 3 flip-flops, A,B and C one input X. it is described by the following flip flop input functions? D a = ( BC + B C D b = A D c = B ) X + (BC+ BC) X i. Derive the state table for circuit. ii. Draw two state diagrams for x=0 and for x=1. b. Design a DTL NAND gate and explain its operation. 2
EC/EE/EI 216 (RR) Total No. of Questions :09] [Total No. of Pages : 02 II/IV B.Tech. DEGREE EXAMINATIONS, APRIL/MAY- 2016 First Semester EC/EE/EI DIGITAL ELECTRONICS Time: Three Hours Answer Question No.1 Compulsory Answer ONE question from each Unit 1. a. Convert (22.64) 10 to hexadecimal number. b. State the steps involved in Gray to binary conversion? c. Find 2 S complement of (10100011) 2. d. State the distributive property of Boolean algebra. Maximum marks:70 14X1=14 M 4X14=56 M e. Convert the given expression in canonical SOP form Y= AC + AB + BC f. Define half adder and full adder. g. List the design procedure for combinational circuits. h. Define excitation table. i. Define race around condition. j. List the differences between combinational and sequential circuits. k. Write the truth table for SR latch. l. What is edge-triggered flip-flop? m. Lsit the major differences between PLA and PAL. n. Define the term master slave in flip flop. UNIT-I 2. a. Express the following functions in SOP & POS form i. F(x,y,z) = (xy+z) (y+xz) ii. F(a,b,c) = ( a +b) ( b +c) iii. F(x,y,z) = 1 b. Simplify the following Boolean function using tabulation method. F = (0, 1, 2, 8, 10, 11, 14, 15). 3. a. Simplify the following Boolean function using K-map F = ABC ABC BCD ABCD ABC 1 P.T.O
b. Convert the following numbers i. (225.225) 10 to binary ii. (11010111.110) 2 to decimal iii. (623.77) 8 to hexadecimal UNIT-II 4. a. Implement a full subtractor with two half subtractors and an OR gate. b. Draw the block diagram of BCD adder and explain its operation? 5. a. Define binary decoder? Explain the working of 2:4 binary decoder? b. Design a 4-bit binary to BCD converter? UNIT-III 6. a. Draw the logic diagram of a SR flip flop and using excitation table, explain its operation. b. Design a four bit synchronous counter with D-flip flop. 7. a. Define T flip-flop with the help of a logic diagram and characteristic table? b. Convert from JK flip flop to T flip flop. UNIT-IV 8. a. Give the differences between CMOS and TTL. Explain about CMOS basic circuit diagram? b. Solve the following two Boolean functions using a PLA having 3-inputs, 4 product terms and 2 outputs? F A, A,(0,1,3,5) A m 1 2 1 0 F A, A,(3,5,7) A m 2 2 1 0 9. a. Lsit out the differences between TTL, ECL and IIL logic families. b. Design and implement 3-bit binary to gray code converter using PLA? 2