Metal-ide-semiconductor field effect transistors ( lectures) MOS physics (brief in book) Current-voltage characteristics - pinch-off / channel length modulation - weak inversion - velocity saturation - metrics extraction Capacitances Small-signal model Reading: (4-5 th edition) 1.5 (not 1.5.4) 1.6 (not 1.6.6, 1.6.8) 1.7 (not 1.7., 1.7.3): not in detail 1
n-type MOSFET layout Gate ( ) Source (grounded) SiO rain ( S ) n ++ p-type Si n ++ Body ( SB )
Energy bands 1 flat band semiconductor y L Metal E C E i x E F E ide ρ Gate ide has large band gap no current. E F constant in semiconductor x 3
Energy bands - depletion L E C Φ = surface potential + E i + ρ n p <<p p <<N A p p =N A E F E Charge per area: N q -N A x Q s 0 q N A Q C A 4
Energy bands 3 intrinsic surface L Φ E C + E i E F + ρ n p =p p =n i << N A -N A E x Q s 0 q N N A Q C q A 5
Energy bands 4 weak inversion L Φ E C E i + E F + ρ n n p p -N A p p N A E x Q s 0 q N N A Q C q A 6
Energy bands 5 onset of strong inversion ( = t ) L Φ E C + S E i Φ f Φ=* Φ f E F + ρ Φ f n n p p N -N A p A p E Many free electrons at surface x Q s 0 q N N A Q C q A 7
Strong inversion > t Φ E C Φ Φ f E i E F E Φ f np N A np N A ρ ρ Conducting channel at surface! -N A x -N A x 8
Q (surface charge) Charge vs surface potential depletion / weak inversion only acceptors contribute -> slow increase in Q (increase ) ρ Q const * -N A strong inversion mainly electrons contribute -> exponential increase in Q ρ Q const * exp( ) -N A Φ (surface potential) Threshold for channel formation 9
Surface potential variation with gate voltage Φ () Φ = Q C falls over both ide and semiconductor Φ=*Φ f Φ falls only over ide (parallel-plate capacitor) t () 10
C gs (F m - ) MOS physics: capacitance max(c gs )=C ρ depletion inversion ρ C dq d -N A -N A SiO Low frequency (10 Hz) p-type semiconductor Minority carriers don t have time to be generated high frequency (>1 MHz) min(c gs ) related to can get N A () 11
min exercise metal work function variation Metal and semiconductor work functions usually not the same (as we assumed before). 1. Sketch band diagram for metal with higher work function in MOS.. How does the higher work function impact t (threshold voltage needed for strong inversion)? semiconductor + =??? Metal ΔΦ ms 1
nversion layers creates channel in MOSFET Gate = 0. 0.4 1.0 Source SiO rain N ++ N ++ S > 0 P-type semiconductor 13
Geometry for drain current calculation S =0 Z Oxide Gate S Oxide S Source channel rain Q (y)=c ( -(y)- t ) y channel x L y W S Q (y) = electrons per unit area at position y (y) = voltage at y ε(y) = electric field at y 14
() Current and channel shape linear (triode) region 5 rainström (ma) 4 3 1 0 S = - t 0 nc W L < t t S S > t S < - t 0 1 3 4 5 6 rainspänning S () () Q ( y) C ( y) t 15
() Current and channel shape saturation region (pinch-off) rainström (ma) 5 4 3 1 S = - t, sat nc W L Pinch-off: independent of S t 0 Q 0 1 3 4 5 6 S < - t C rainspänning () S () (y) t Q S = - t 0 C t S > - t Q C t (y) Q L 0 Q L 0 16
Pinch-off band structure and electron velocity High field region High velocity -> low Q Pinch-off point: Electrons swept into drain by E-field 17
Channel length modulation d Q C t (y), sat C W L n t 1 S Slope=1/r 0 - A non-inverted region is formed beyond pinch-off i.e. the channel length is reduced with S - Gives output resistance r d d 0 S 1 1 - Output conductance g d =1/r 0 - λ 0.005-0.05-1 18
Example: MOSFET with channel length modulation t = 1.0 C = 3 mf/m µ n = 0.135 m /s L = 5 µm W = 50 µm λ = 0.0-1 Calculate for 1) S =0.5, 1, & 3 if = 0 ) S =0.5, 1, & 3 if =.5 Linear region S t nc W L t S S saturation S t, sat C W L n t 1 S 19
min exercise source/drain resistance n modern MOSFETs, resistance in the source/drain can not always be neglected. How does the output characteristics change if a significant source/drain resistance is added? SiO n ++ n p-type Si ++ p-type Si n ++ SiO n ++??? S 0
Subthreshold current (weak inversion) (don t read 1.8) - For < t (but high enough for weak inversion): channel charge << inversion charge - rift current is small, mainly diffusion current (as NPN BJT) - Exponentially increasing injection over barrier with. exp n T t 1 exp S T S exponential increase t ρ n ++ SiO p-type Si n ++ = t, Φ=* Φ f < t -N A Forward biased np-junction 1
elocity saturation in short-channel MOSFETs (1.7.1) - Short channel length, high S -> high electric field - At critical field ε c (1.5*10 6 ) electron velocity saturates due to optical phonon emission v d µ n 1 / c c c v v d d µ µ n n c v scl lim E C 0 = WC t v scl Without velocity sat. ( ) With velocity sat. ( ) S t
etrimental effects Junction breakdown For large S (long channel) the drainsubstrate pn-junction is reversed biased enough to cause avalanche breakdown. Punchthrough For large S (short channel) the drain depletion region can tough the source depletion region. Slower current increase than junction breakdown Hot carriers high electric fields give electrons enough energy to be injected into gate ide. Can give higher gate current and/or shift the threshold voltage. Oxide breakdown For high (6*10 6 /cm) vertical electric fields (from gate) the gate ide may break. 3
Summary MOSFET C characteristics Linear (triode) S < t + nc W L T S S Saturation (active, pinch-off) S > t + included channel length modulation, sat C W L n t 1 S elocity saturation lim E C 0 = WC t v scl 4
Parameter extraction from output characteristics 5
Parameter extraction from transfer characteristics Long channel Short channel (velocity saturation) 6
Parameter extraction from transfer characteristics (log) 7
1 min excercise MOSCAP vs MOSFET How can a MOSFET operate at GHz when MOSCAP only responds at frequencies < 1 MHz in inversion? >GHz < MHz SiO SiO N ++ N ++ P-type semiconductor P-type semiconductor 8
Small-signal model G d (t)= +i d (t) + v gs (t) = gs (t) gs (t) S t S + i d (t) = d (t) gs (t)= +v gs (t) t rainström (ma) () 5 4 3 1 0 0 1 3 4 5 6 rainspänning () S () 1 st order Taylor expansion - linearization f ( x x) f ( x ) df ( x) dx 0 0 xx d v v gs d d 9 d 0 x S vds S vds S vds S gs g m 1 r 0... v gs
Capacitances v i C gs SiO C gd N ++ P-type semiconductor N ++ Linear region Saturation region C gs 1 Cgd WLC (C [F/µm ]) C gs WLC 3 C gd 0 (pinched off channel derived on page 51) 30
(simple) Small-signal model - saturation G C G AC g m v gs r 0 C g m v gs r 0 S S - Transconductance controls the current source - Output resistance channel length modulation with increasing S - gate-source capacitance g m µ n C 1 ro S C WLC 3 W L - nput resistance infinite due to gate ide 31
Small-signal model more advanced Add more elements: - drain-body / source-body capacitances (C db /C sb ) reversed biased pn-junctions - gate overlap capacitances (C ol ) - gate-body capacitance - outside active device area - body transconductance acting as nd gate - source/drain resistances (not included here) body effects 3
Summary - MOSFETs n-type (p-doped substrate) or p-type (n-doped substrate) ncreasing voltage beyond t gives inversion layer (channel) under gate Linear (triode): depends on both and S Saturation (active): depends only on due to pinch-off of channel at drain Channel length modulation: ncreasing S beyond pinch-off shortens channel increasing with S. Small signal model: nfinite input resistance due to gate ide. Output resistance (r 0 ) due to channel length modulation. Gate-source capacitance (C ) dominates Can add more capacitances and resistances to get more accurate (and complicated) model. 33
BJTs vs MOSFETs BJT MOSFET Terminals Emitter, base, collector Source, gate, drain, (base) Symmetric no (more doping in emitter) yes Transport mechanism iffusion rift (diffusion below t ) Current formula (active region) C BE CE T S 1 e nc W 1 A, sat L t S Transconductance g m C T g m µ n C W L nput resistance (r 0 ) Finite due to base current nfinite due to insulating gate ide 34
Si MOSFET development (for digital logic) 35
Modern transistors MOSFET Strain enhance mobility High-k gate dielectric gives higher C without leakage current Tri-gate enables channel length reduction due to better electrostatic control (less short-channel effects) (- semiconductors would give higher mobility) L = 3 nm High electron mobility transistor (HEMT) - semiconductors to get high mobility Move doping away from channel to avoid scattering Heterojunction bipolar transistor (HBT) Combine (-) semiconductors with different E g (HBT). alence band barrier gives less backinjection from base to emitter. ncrease base doping with same gain. 36
Modern MOSFET ngaas channel Highly doped regrown contact gives self-aligned gate No pn-junctions, fully depleted channel on =.0 ma/μm g m = 1.9 ms/μm f t = 44 GHz 37