Engineering 1620 Spring 2011 Answers to Homework # 4 Biasing and Small Signal Properties

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Engineering 60 Spring 0 Answers to Homework # 4 Biasing and Small Signal Properties.).) The in-band Thevenin equivalent source impedance is the parallel combination of R, R, and R3. ( In-band implies the reactance of Cin is negligible.) Let that impedance be RSRC R3 R R. In the small signal model the current source I EE is an open circuit (it s not time dependent), so the complete small signal circuit with a test source connected to the output and v in set to zero is given below. i b r b h fe i b r O R SRC i test R O.) Looking at the circuit to calculate the test current, we notice that r o is in parallel with R O and with the sum of r b and R SRC. Moreover, the important piece will be the current in the controlled source. After all, what is really going on is that a change in output current affects the base-emitter voltage, the signal source holding the input to the base more or less constant. When v BE changes, the biggest result is a change in collector and hence emitter current. The controlled current source in the model accounts for this physical effect. The base current will be ib and the current in the controlled source will vtest RSRC hfevtest be hfeib. By KCL at the emitter node, the test current is given by RSRC hfe itest vtest. Then the output impedance is equivalent to ro RO RSRC RSRC R SRC R SRC Zout ro RO. An equivalent way to express this is Zout ro RO re. h fe h fe.) The minimum output voltage is 0.5 volts, the minimum of the current source compliance. The maximum is V CC V BE. Optimum quiescent output is halfway between these two values because nothing makes one or the other limit undesirable. (There is no problem with turning the transistor off, because the collector current stays almost conv test

stant over that range of output.) So V OUT = ½(V CC V BE + 0.5) = 7.4 volts and V CEQ = ½(V CC + V BE - 0.5). The quiescent base voltage is higher than V OUT by V BE. There is no real distinction between the instantaneous and quiescent values of V BE because the collector current changes very little with output voltage when R O and r O are very large..3) With I EE = 0.ma, I B = 0.67 a. The voltage at the base node is ½ of 5 +0.7+ 0.5 = 8.0 volts. The current through R is 8.0 a and through R is 8.7 a. The voltage across R is 6.9 volts so R = 85 K ohms. VA VCEQ 08.4) For an Early voltage of 00 volts, r O is ro.08 Meg. R 4 O is the IC 0 same so their parallel value is.04 Meg. The Thevinnen equivalent source impedance kt R SRC = 0K 75K 00K 8.K and hfe 38.7 K. The output impedance qiee is.04 Meg in parallel with (8. + 38.7)/5 = 30 ohms. Obviously the Meg has little effect so the output impedance is 3 ohms..5) For this part of the calculation, it is clear that the input impedance of the transistor 6 8 itself, ztr hfe re ro RO 5.030.56 0, is too big to matter. So the equivalent circuit is shown below and requires a capacitorcin.40 fd. R3 CIN 0 f R3 R R C v in R R.) To find the optimal collector current, one has to begin by computing the impedance of the shaker. The reactance of the coil at 60 Hz is.6 ohms. The phase angle is.6 tan 66. deg. The magnitude of the impedance is 0.6 4.7 0 ohms. Then the optimal collector current is VCC VCESAT 40.3 ICopt.amperes. R Z.5.96. DC AC We next want to select values for the two biasing resistors. The complicating factor is that h FE varies from 750 to 0,000 and that is a 7: range. To maintain fairly tight control of the quiescent current, R BB will probably have to be low, much lower than the minimum of hfe RE 75.5 5 ohms. I tried using a lower resistor R = 0 ohms (a standard resistance about 0 % of 5) and R BB will be a little lower than that. By using the nominal conditions (h FE = 4000, V BE =.35) and KCL at the base node, this gives R =.66 K. With these values, V BB = 3.06 volts and R BB = 03 ohms. The range

of base-emitter voltage is the temperature change times twice the temperature coefficient of one emitter-base junction or 70**.00=.308 volts. Then one tests the two cases:.) for h FE = 750, V BE =.504 volts (.35 +.54) one gets I C =.88 Amps which is 80 % of the nominal value just enough!.) for h FE = 0000, V BE =.0 volts (.35.54) one gets I C =.3 amps or % of nominal - a comfortable margin. There are certainly other solutions near these values. For the input capacitor calculation, we need the input impedance of R BB Ztr at nominal conditions or 660 0 (4000*.53) = 97 ohms. One DB loss is a factor of.89 and the ratio of 60 Hz to cutoff must be.95 for a single pole circuit like this one. 60 / f3db ( 0.89 ) That places the 3 DB cutoff at 30.5 Hz and 60/ f C IN 3DB 6.6 f R f 9630.5. in c 3.) The first stage Q is CB because the 0. uf capacitor connects its base to ground at midband and the signal comes in on the emitter, leaves on the collector. The second stage Q is CC. 3.) The resistor that sets the collector current of Q is R E. The easiest way to do the problem is to use the formula we developed for common emitter biasing the DC equivalent circuit is indistinguishable between CE and CB for this case. R BB = 3K 0K =.3 K. The Thevinen equivalent voltage, V BB, is the voltage across the 3 K resistor because the PNP transistor has its emitter connected to VCC. V BB = 3*/3 =.77 volts. 3 VBB VBE 8.77.7 Then: IC 50. Solving for R E gives 380 ohms. R R 30 8R BB E E 3.3) The other resistor, which sets the bias on Q and therefore the output impedance of the circuit, is R E. The output impedance of a common collector circuit is ZCCOUT RE re ZS /( hfe) where Z S is the source impedance of the signal driving the stage. In this case, Z S is 000 ohms because that is the output impedance of the Q stage. We know that the voltage across R E is about 4. volts or thereabouts because the base current of Q is not likely to have much effect on the output of Q. This will make R E much bigger than r e and probably make the output impedance Z CCOUT be dominated by the quantity in parentheses. Then 8.056 / I E 000 /6 from which we conclude that I E =.54 ma. To get the value of R E we note that the Thevinnen equivalent of the Q output is V BB = 5 volts, R BB = 000 ohms and we solve 3 hfe VBB VBE 55 0.7.450 from which we get R E =.67K ohms. RBB hfe RE 000 6RE Notice that.67 K is some 90 times bigger than the 8 ohm output impedance, so our neglect of it in computing the collector current produced an error about %. It is not that hard to do the problem exactly, but it is not necessary. 3

3.4) The three transistor parameters that affect the gain calculation are: 0.988, r e = 5. ohm, and r e = 0 ohms. The input impedance of the common collector stage, Q, is z h r R 69.3 Kohms. The gain of Q in midband is then 000 69,300 tr fe e E G 5.6. The gain of Q is very nearly unity (actually re 80 845/(845+0) =.988. The overall gain is the product of the two stage gains or G = 5. (4.3 DB). 3.5) The midband input resistance of the Q stage is 80 + r e = 90. Thus C IN 0.084 ufd. f 90 3.6) The purpose of the capacitor from the base of Q to ground is to assure that the base of the common base circuit is indeed a signal ground. For this purpose, its reactance in band has to be much lower than r of Q. At 0 KHz, 0. uf has a reactance of 60 ohms while r is 8*r e = 43 ohms, so this requirement is indeed met. 4.) Here is a small-signal model of the circuit with no input voltage but with a test voltage source at the output. I have left the collector resistor in the circuit to show how it is in parallel with the output but have drawn the marker for i test in a way that will define the output impedance of the transistor. ib itest r b hfeib r O R C v test R E v e The critical point here is that the controlled current source is neither zero nor any other constant. The test current changes the emitter voltage and that implies a change in base current. The change in base current then changes the current source. The transistor output impedance has to be calculated by nodal analysis at the collector and emitter, being careful with signs. Three equations give everything one needs: 4

vtest ve By KCL at the collector: itest hfeib ro By KCL at the emitter noticing that the sum of the currents in r O and the source is i test itself and that r b and RE are in parallel : ve itest RE ve By Ohm s law being careful of the sign: ib Rr E b Manipulation proceeds as: vtest ro itest ve hfero ib REr h b fere vtest itest ro ro RE RE The transistor output impedance is simply the ratio of the test voltage to the test current hfere rr b E or: ztran _ out ro. RE RE The second term represents the fact that even shorting the emitter and collector will still leave at least the emitter resistance and the emitter-base dynamic resistance in parallel. The important part is the first pair of terms proportional to the Early resistance. For the original circuit, the quiescent V CE voltage is 5 7.5 -.35 = 7.5 volts. That 75 7. makes ro 8. kilohms and r 3 b hfe re 05.6.59 kilohms. 0 3 00350 586350 That makes the output resistance z tran _ out 8.0.06 936 936 megohms! That is so much bigger than the 7.5 K collector resistor that only the latter matters to the gain or output impedance calculation. (Nothing in a circuit like this is known to part in 40!) The gain is the usual result: RC.997500 G 9.8 r R 5.6 350 e E (5.9 db) 5.) Sedra and Smith problem 5. from the 5th edition or 6.95 from the 6th except do the problem twice, once with the hybrid-pi model and once with the Tee/common base model. Suppose you wanted to calculate input resistance. Which model is easier to use to find that by hand? 6.) Sedra and Smith problem 6.4 from the 6th edition. 5

NOTE: This is the official answer but it has some errors and unstated assumptions. First, the units of g m are A/V. The early voltage is assumed to be 00 V. I 6

do not care if you neglect it entirely as its value was not stated in the problem. The collector current is.85 ma not.68 ma. The parentheses in the expression for R in are not necessary. 7