Investigation of the Thermal Noise of MOS Transistors under Analog and RF Operating Conditions

Similar documents
The Devices. Digital Integrated Circuits A Design Perspective. Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic. July 30, 2002

Digital Integrated Circuits A Design Perspective. Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic. The Devices. July 30, Devices.

ECE 342 Electronic Circuits. 3. MOS Transistors

MOSFET Model with Simple Extraction Procedures, Suitable for Sensitive Analog Simulations

Device Models (PN Diode, MOSFET )

ECE 342 Electronic Circuits. Lecture 6 MOS Transistors

Device Models (PN Diode, MOSFET )

Lecture 12: MOSFET Devices

Fundamentals of the Metal Oxide Semiconductor Field-Effect Transistor

Microelectronics Part 1: Main CMOS circuits design rules

CMOS INVERTER. Last Lecture. Metrics for qualifying digital circuits. »Cost» Reliability» Speed (delay)»performance

MOSFET. Id-Vd curve. I DS Transfer curve V G. Lec. 8. Vd=1V. Saturation region. V Th

The Devices. Digital Integrated Circuits A Design Perspective. Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic. July 30, 2002

MOS Transistors. Prof. Krishna Saraswat. Department of Electrical Engineering Stanford University Stanford, CA

1/13/12 V DS. I d V GS. C ox ( = f (V GS ,V DS ,V SB = I D. + i d + I ΔV + I ΔV BS V BS. 19 January 2012

Chapter 6: Field-Effect Transistors

ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems. Today. Refinement. Last Time. No Field. Body Contact

MOS Transistor I-V Characteristics and Parasitics

N Channel MOSFET level 3

Operation and Modeling of. The MOS Transistor. Second Edition. Yannis Tsividis Columbia University. New York Oxford OXFORD UNIVERSITY PRESS

Lecture 4: CMOS Transistor Theory

ECE 546 Lecture 10 MOS Transistors

Lecture 29 - The Long Metal-Oxide-Semiconductor Field-Effect Transistor (cont.) April 20, 2007

Practice 3: Semiconductors

Lecture 15: MOS Transistor models: Body effects, SPICE models. Context. In the last lecture, we discussed the modes of operation of a MOS FET:

Lecture 13 MOSFET as an amplifier with an introduction to MOSFET small-signal model and small-signal schematics. Lena Peterson

EKV MOS Transistor Modelling & RF Application

MOSFET: Introduction

Spring Semester 2012 Final Exam

Self-heat Modeling of Multi-finger n-mosfets for RF-CMOS Applications

3. Design a stick diagram for the PMOS logic shown below [16] Y = (A + B).C. 4. Design a layout diagram for the CMOS logic shown below [16]

MOS Transistor Properties Review

EECS130 Integrated Circuit Devices

Lecture 3: CMOS Transistor Theory

Integrated Circuits & Systems

MOS Transistor Theory

Today s lecture. EE141- Spring 2003 Lecture 4. Design Rules CMOS Inverter MOS Transistor Model

EE105 - Fall 2006 Microelectronic Devices and Circuits

EE 330 Lecture 16. MOS Device Modeling p-channel n-channel comparisons Model consistency and relationships CMOS Process Flow

Lecture 11: MOSFET Modeling

EE 330 Lecture 16. Devices in Semiconductor Processes. MOS Transistors

Chapter 3. FET Amplifiers. Spring th Semester Mechatronics SZABIST, Karachi. Course Support

EE105 - Fall 2005 Microelectronic Devices and Circuits

Introduction to CMOS VLSI. Chapter 2: CMOS Transistor Theory. Harris, 2004 Updated by Li Chen, Outline

6.012 Electronic Devices and Circuits Spring 2005

Electronic Circuits 1. Transistor Devices. Contents BJT and FET Characteristics Operations. Prof. C.K. Tse: Transistor devices

ANALYSIS AND MODELING OF 1/f NOISE IN IGZO TFTS

The Devices. Jan M. Rabaey

Simulation of the Temperature Influence in IC-EMC

MOS Transistor Theory

Analysis of Transconductances in Deep Submicron CMOS with EKV 3.0

SECTION: Circle one: Alam Lundstrom. ECE 305 Exam 5 SOLUTIONS: Spring 2016 April 18, 2016 M. A. Alam and M.S. Lundstrom Purdue University

ESE 570: Digital Integrated Circuits and VLSI Fundamentals

Lecture 10 MOSFET (III) MOSFET Equivalent Circuit Models

ECE315 / ECE515 Lecture-2 Date:

The Devices: MOS Transistors

ELEC 3908, Physical Electronics, Lecture 27. MOSFET Scaling and Velocity Saturation

Lecture 30 The Short Metal Oxide Semiconductor Field Effect Transistor. November 15, 2002

Lecture 28 - The Long Metal-Oxide-Semiconductor Field-Effect Transistor (cont.) April 18, 2007

ECE 497 JS Lecture - 12 Device Technologies

The PSP compact MOSFET model An update

Nanoscale CMOS Design Issues

EE105 Fall 2014 Microelectronic Devices and Circuits. NMOS Transistor Capacitances: Saturation Region

VLSI Design and Simulation

! PN Junction. ! MOS Transistor Topology. ! Threshold. ! Operating Regions. " Resistive. " Saturation. " Subthreshold (next class)

A Compact Analytical Modelling of the Electrical Characteristics of Submicron Channel MOSFETs

Analysis and Design of Analog Integrated Circuits Lecture 14. Noise Spectral Analysis for Circuit Elements

ECE 546 Lecture 11 MOS Amplifiers

EE105 - Fall 2006 Microelectronic Devices and Circuits. Some Administrative Issues

Transistor Noise Lecture 10 High Speed Devices

CMPEN 411 VLSI Digital Circuits. Lecture 03: MOS Transistor

Field effect = Induction of an electronic charge due to an electric field Example: Planar capacitor

Complete Surface-Potential Modeling Approach Implemented in the HiSIM Compact Model Family for Any MOSFET Type

EE 230 Lecture 31. THE MOS TRANSISTOR Model Simplifcations THE Bipolar Junction TRANSISTOR

Lecture 04 Review of MOSFET

The Gradual Channel Approximation for the MOSFET:

Microelectronics Main CMOS design rules & basic circuits

Technische Universität Graz. Institute of Solid State Physics. 11. MOSFETs

Lecture 210 Physical Aspects of ICs (12/15/01) Page 210-1

ECE 523/421 - Analog Electronics University of New Mexico Solutions Homework 3

Lecture 11: MOS Transistor

Electronics Fets and Mosfets Prof D C Dube Department of Physics Indian Institute of Technology, Delhi

Semiconductor Integrated Process Design (MS 635)

EE 560 MOS TRANSISTOR THEORY PART 2. Kenneth R. Laker, University of Pennsylvania

EEC 116 Lecture #3: CMOS Inverters MOS Scaling. Rajeevan Amirtharajah University of California, Davis Jeff Parkhurst Intel Corporation

SD2902. RF POWER TRANSISTORS HF/VHF/UHF N-CHANNEL MOSFETs

EE5311- Digital IC Design

EE 230 Lecture 33. Nonlinear Circuits and Nonlinear Devices. Diode BJT MOSFET

Lecture 10 MOSFET (III) MOSFET Equivalent Circuit Models

EEC 118 Lecture #2: MOSFET Structure and Basic Operation. Rajeevan Amirtharajah University of California, Davis Jeff Parkhurst Intel Corporation

ECE 438: Digital Integrated Circuits Assignment #4 Solution The Inverter

CHAPTER 3: TRANSISTOR MOSFET DR. PHAM NGUYEN THANH LOAN. Hà Nội, 9/24/2012

Sadayuki Yoshitomi. Semiconductor Company 2007/01/25

Lecture 11: J-FET and MOSFET

Chapter 4 Field-Effect Transistors

Part 4: Heterojunctions - MOS Devices. MOSFET Current Voltage Characteristics

FIELD-EFFECT TRANSISTORS

ECE-343 Test 2: Mar 21, :00-8:00, Closed Book. Name : SOLUTION

Fig. 1 CMOS Transistor Circuits (a) Inverter Out = NOT In, (b) NOR-gate C = NOT (A or B)

CMPEN 411 VLSI Digital Circuits. Lecture 04: CMOS Inverter (static view)

Transcription:

Investigation of the Thermal Noise of MOS Transistors under Analog and RF Operating Conditions Ralf Brederlow 1, Georg Wenig 2, and Roland Thewes 1 1 Infineon Technologies, Corporate Research, 2 Technical University Munich Foil 1

Purpose of the Work The thermal noise magnitude is an important design parameter for high performance analog and RF- CMOS circuits (which are strongly needed in many SoC designs) There is a lot of controversial discussion on the validity of the classical noise models in modern short channel MOS devices In this work we will present experimental noise data for modern devices and a simple physics based and analytical model to explain these data Foil 2

Content Measurement Set-up New Model for the Thermal Noise Comparison to Classical Theory Comparison to Experimental Data Conclusions Foil 3

Measurement Set-up I To remove noise components arising from the set-up three different noise measurements of the DUT are taken They give information about the total noise (including the device noise) and the noise of the set-up From these data the device s noise is calculated Foil 4

Measurement Set-up II 5 4 theory measured noise error 5 4 S i [pa/hz] 3 2 1 3 2 1 Error [%] 1 1 1 2 1 3 R small signal [Ohm] The accuracy of the set-up is better than 1% especially in the impedance range between 4Ω and 4Ω Foil 5

Classical Model versus Experiment Drain current noise [A/ Hz] 1-1 n-mos 2µm /.5µm experimental data classical model 1-11 1-12 1 5 1 6 1 7 1 8 Frequency [Hz] V gs,eff :.2V; V ds :.65V; g ds :.63mS; g m : 6.5mS; g mb : 1.26mS; The noise is slightly higher than expected from classical theory Foil 6

Theory of Thermal Noise Thermal noise arises from the random thermal motion of the carriers in addition to its drift in the field The contribution of a carrier to the total noise at a certain location in the device is proportional to the conductance in that region: 2 i = 4kT g( x) f Foil 7

Classical Theory of Thermal Noise of MOSFETs The thermal noise of a MOSFET is given by: i 2 d = 4kT W L f d V d V µ 2 ( V ) Q 2 ( V ) dv µ ( V ) Q( V ) dv (after Klaasen/Prins) This formula is often simplified by using a constant mobility µ : i Vd 2 2 Q ( V ) dv d, classical W = 4kT µ = f ( Vgs, Vds) V f L d Q( V ) dv kt g m,max Foil 8

Local Channel Approach for the Noise of MOSFETs For the new model we use the following formula for µ(v) instead: µ ( V ) = 1+ Θ ( V µ gs, eff V ) 1+ 1 V L E c Together with an approximation for the noise arising in the region beyond the pinch-off point the following formula results: i 2 2 Vd d, new 4kT W 2 2 4 = ( V ) Q ( V ) dv + Ids f Ids L µ WL kt E 2 c ( V V ) ds d (the remaining integral is analytically solvable) Foil 9

Comparison to Classical Theory 1.4 i ds,new ² / i ds,classical ² 1.3 1.2 1.1 V ds = V gs,eff + V th L =.5µm, n-mos 1...5 1. Effective gate voltage [V] With increasing effective gate voltage the new theory gives higher noise values compared to the classical theory. The new model does not use any additional fit parameters and can be easily included into a circuits simulation model. Foil 1

Gate Voltage Dependence n-mos Drain current noise [pa/ Hz] 25. 2. 15. 1. 5. classical model n-mos 2µm /.5µm new model n-mos 2µm /.5µm experimental n-mos 2µm /.5µm..6.7.8.9 1. Gate and drain voltage [V] Good agreement between new model and experiment Agreement better than compared to classical model Foil 11

Gate Voltage Dependence p-mos Drain current noise [pa/hz] 5 4 3 2 1 classical model p-mos 1µm/.25µm new model p-mos 1µm/.25µm experiment p-mos 1µm/.25µm class. model p-mos 2µm/.5µm new model p-mos 2µm/.5µm experiment p-mos 2µm/.5µm.4.6.8 1. 1.2 Drain and gate voltage [V] Good agreement between new model and experiment Agreement better than compared to classical model Foil 12

Drain Voltage Dependence n-mos Drain current noise [pa/ Hz] 2 18 16 14 12 classical model n-mos 2µm /.5µm new model n-mos 2µm /.5µm experimental n-mos 2µm /.5µm 1..5 1. 1.5 2. 2.5 Drain voltage [V] at V gs =.75V Good agreement between new model and experiment Agreement better than compared to classical model Foil 13

Drain Voltage Dependence p-mos Drain current noise [pa/ Hz] 2 15 1 classical model p-mos 1µm/.25µm new model p-mos 1µm/.25µm experiment p-mos 1µm/.25µm classical model p-mos 2µm/.5µm new model p-mos 2µm/.5µm experiment p-mos 2µm/.5µm 5..5 1. 1.5 2. 2.5 Drain voltage [V] at V gs =.55V Good agreement between new model and experiment Agreement better than compared to classical model Foil 14

Length Dependence p-mos Drain current noise [pa/ Hz] 2 15 1..5 1. 1.5 Gate length [µm] classical model new model experimental data V ds = V gs =.6V Especially for short gate lengths the new model gives much better results Foil 15

Conclusion A new analytical model for the thermal noise of short channel MOSFETs is presented The model is in excellent agreement with experimental data from a.25µm analog CMOS technology It can easily be implemented for circuit simulation without fitting parameters The observed noise enhancements compared to the classical model are less severe than proposed by several other groups ( 4% for analog/rf relevant operating conditions) Foil 16