ECE37 Advanced Analog Circuits Higher-Order Σ Modulators and the Σ Toolbox Richard Schreier richard.schreier@analog.com NLCOTD: Dynamic Flip-Flop Standard CMOS version D CK Q Q Can the circuit be simplified? Is a complementarty clock necessary? ECE37 2
desired signal f B shaped noise f B f B Review: A Σ ADC System f s 2 f s 2 Nyquist-rate PCM Data U Σ Modulator V Digital Decimator W U Loop Filter DAC V (z )= STF (z )U( z )+ NTF (z )E (z ) STF (z ): signal transfer function NTF (z ): noise transfer function E (z ): quantization error ECE37 3 Y E V U Review: MOD Q E z - z - V NTF( z) = ( z ) STF( z) = NTF poles & zeros: 4 3 NTF e j 2πf ( ) 2 2 ω 2 π 2 σ2 e IQNP = ------------ ( OSR) 3 3..2.3.4.5 Normalized Frequency (f ) ECE37 4
U z z Review: MOD2 z Q E V NTF( z) = ( z ) 2 STF( z) = z NTF poles & zeros: 6 NTF e j 2πf ( ) 2 8 ω 4 IQNP π 4 σ2 ------------ e ( OSR) 5 5..2.3.4.5 Normalized Frequency (f ) ECE37 5 = Review Summary Σ works by spectrally separating the quantization noise from the signal Requires oversampling. OSR f s ( 2f B ). Achieved by the use of filtering and feedback. A binary DAC is inherently linear, and thus a binary Σ modulator is too MOD-CT has inherent anti-aliasing MOD has NTF (z) = z Arbitrary accuracy for DC inputs; 9 db/octave SQNR-OSR trade-off. MOD2 has NTF (z) = ( z ) 2 5 db/octave SQNR-OSR trade-off. ECE37 6
MODN [Ch. 4 of Schreier & Temes] N integrators U z z (N ) non-delaying, delaying z z z Q V STF( z) = z NTF( z) = ( z ) N MODN s NTF is the N th power of MOD s NTF ECE37 7 4 NTF Comparison 2 NTF ( e j2πf ) (db) 2 4 6 8 MOD MOD2 MOD3 MOD4 MOD5-3 -2 - Normalized Frequency (f ) ECE37 8
Predicted Performance In-band quantization noise power IQNP = =.5 OSR.5 OSR NTF( e j 2πf ) 2 S ee () f ( 2πf ) 2N 2σ2 e df π 2N ------------------------------------------------------- σ2 ( 2N + ) ( OSR) 2N + e Quantization noise drops as the (2N+) th power of OSR (6N+3) db/octave SQNR-OSR trade-off ECE37 9 df Improving NTF Performance NTF Zero Optimization Minimize the integral of NTF 2 over the passband Normalize passband edge to for ease of calculation: Hf a a Need to find the a i which minimize () 2 the integral f/f B x 2 a 2 ( ) 2 dx, n = 2 x 2 x 2 a 2 ( ) 2 dx, n = 3 ( x 2 a 2 ) 2 x 2 a 2 ( 2 ) 2 dx, n = 4 ECE37
Order Solutions Up to Order = 8 Optimal Zero Placement Relative to f B SQNR Improvement db 2 ± 3 3.5 db 3, ± 3 5 8 db 4 ± 3 7 ± ( 3 7) 3 35 3 db 5, ± 5 9 ± ( 5 9) 5 2 [Y. Yang] 8 db 6 ±.23862, ±.662, ±.93247 23 db 7, ±.4585, ±.7453, ±.949 28 db 8 ±.8343, ±.52553, ±.79667, ±.9629 34 db ECE37 Topological Implication Feedback around pairs integrators: 2 Delaying Integrators z -g z Poles are the roots of + g ------------ 2 = z i.e. z = ± j g Not quite on the unit circle, but fairly close if g<<. Non-delaying + Delaying Integrators (LDI Loop) z z -g z Poles are the roots of gz + ------------------- ( z ) 2 = i.e. z = e ± jθ, cosθ = g 2 Precisely on the unit circle, regardless of the value of g. ECE37 2
Problem: A High-Order Modulator Wants a Multi-bit Quantizer E.g. MOD3 with an Infinite Quantizer and Zero Input v 7 5 3 - -3-5 -7 2 3 4 Sample Number Quantizer input gets large, even if the input is small. 6 quantizer levels are used by a small input. ECE37 3 v Simulation of MOD3-b (MOD3 with a Binary Quantizer) Long strings of +/ y 2 3 4 2 2 2 3 4 Sample Number HUGE! MOD3-b is unstable, even with zero input! ECE37 4
Solutions to the Stability Problem Historical Order Multi-bit quantization Initially considered undesirable because we lose the inherent linearity of a -bit DAC. 2 More general NTF (not pure differentiation) Lower the NTF gain so that quantization error is amplified less. Unfortunately, reducing the NTF gain reduces the amount by which quantization noise is attenuated. 3 Multi-stage (MASH) architecture Combinations of the above are possible ECE37 5 Multi-bit Quantization A modulator with NTF = H and STF = is guaranteed to be stable if u < u max at all times, where u max = nlev + h and h = hi () i = In MODN Hz ( ) = ( z ) N, so hn ( ) = {, a, a 2, a 3, ( ) N a N, }, a i > and thus h = H( ) = 2 N nlev = 2 N implies u max = nlev + h = MODN is guaranteed to be stable with an N-bit quantizer if the input magnitude is less than /2=. This result is quite conservative. Similarly, nlev = 2 N + guarantees that MODN is stable for inputs up to 5% of full-scale ECE37 6
M-Step Symmetric Quantizer = 2, (nlev = M + ) M odd: mid-rise M even: mid-tread e = v y M v e = v y y M M + M M + M 2 v y M v: odd integers from M to +M M v: even integers from M to +M No-overload range: y nlev e 2 = ECE37 7 Inductive Proof of Criterion h Assume STF = and ( n) ( un ( ) u max ) Assume ei () for i < n.[induction Hypothesis] i = i = i = yn ( ) = un ( ) + hi ()en ( i) u max u max + hi () en ( i) + hi () = u max + h Then u max = nlev + h yn ( ) nlev en ( ) So by induction ei () for all i > ECE37 8
More General NTF Instead of NTF( z) = Az ( ) Bz ( ) with Bz ( ) = z n, use a more general Bz ( ) Roots of B are the poles of the NTF and must be inside the unit circle. Moving the poles away from z = toward z = makes the gain of the NTF approach unity. ECE37 9 The Lee Criterion for Stability in a -bit Modulator: H 2 [Wai Lee, 987] The measure of the gain of H is the maximum magnitude of H over frequency, aka the infinitynorm of H: H max He ( jω ) ω [ 2π, ] Q: Is the Lee criterion necessary for stability? No. MOD2 is stable (for DC inputs less than FS) but H = 4. Q: Is the Lee criterion sufficient to ensure stability? No. There are lots of counter-examples, but H.5 often works. ECE37 2
Simulated SQNR vs. H 5 th -order NTFs; -b Quant.; OSR = 32 SQNR (db) 9 7 SQNR has a broad maximum cliff! 5.25.5.75 2 H umax (dbfs) Stable input limit drops as increases. H 2.25.5.75 2 H ECE37 2 SQNR Limits -bit Modulation Peak SQNR (db) 4 2 8 6 4 N = 8 N 7 N = 6 N = 5 N = 4 N = 3 N = 2 N = 2 4 8 6 32 64 28 256 52 24 OSR ECE37 22
SQNR Limits for 2-bit Modulators 4 N = 8 N = 7 N = 6 N = 5 N = 4 N = 3 N = 2 Peak SQNR (db) 2 8 6 4 2 N = 4 8 6 32 64 28 256 52 24 OSR ECE37 23 SQNR Limits for 3-bit Modulators 4 N = 8 N = 7 N = 6 N = 5 N = 4 N = 3 N = 2 Peak SQNR (db) 2 8 6 4 2 N = 4 8 6 32 64 28 256 52 24 OSR ECE37 24
Generic Single-Loop Σ ADC Linear Loop Filter + Nonlinear Quantizer: E U L Y V L Y = L U + L V V = Y + E V = STF U + NTF E, where NTF = -------------- & STF = L L NTF Inverse Relations: L = /NTF, L = STF / NTF ECE37 25 Σ Toolbox http://www.mathworks.com/matlabcentral/fileexchange Search for Delta Sigma Toolbox Specify OSR, lowpass/bandpass, no. of Q. levels. NTF (and STF) available. synthesizentf calculatetf Parameters for a specific topology. stuffabcd mapabcd scaleabcd ABCD: statespace description of the modulator. Time-domain simulation and SNR measurements. realize- NTF predictsnr, simulatedsm, simulatesnr Also mapctod simulateesl designhbf Manual is delsig.pdf (App. B of Schreier & Temes) ECE37 26
Σ Toolbox Modulator Model Modulator: U [-M, +M ] Quantizer: L L Y M = M = 2 M = 3 3 v 2 v v y y y 2 2 3 3 4 4 - e 2 e e -3 ECE37 27 V [-M, +M ] = 2 Loop filter can be specified by NTF or by ABCD, a state-space representation Mid-tread quantizer; v: even integers [ M,+M ] NTF STF = = -------------- L L -------------- L Mid-rise quantizer; v: odd integers [ M,+M ] NTF Synthesis synthesizentf Not all NTFs are realizable Causality requires h( ) =, or, in the frequency domain, H( ) =. Recall Hz ( ) = h( )z + h( )z + Not all NTFs yield stable modulators Rule of thumb for single-bit modulators: H <.5 [Lee]. Can optimize NTF zeros to minimize the mean-square value of H in the passband The NTF and STF share poles, and in some modulator topologies the STF zeros are not arbitrary Restrict the NTF such that an all-pole STF is maximally flat. (Almost the same as Butterworth poles.) ECE37 28
Lowpass Example [dsdemo] 5 th -order NTF, all zeros at DC Pole/Zero diagram: OSR = 32; H = synthesizentf(5); plotpz(h); f = linspace(,.5); z = exp(2i*pi*f); H_z = evaltf(h,z); plot(f,dbv(h_z)); g = rmsgain(h,,.5/osr) ECE37 29 Lowpass NTF Out-of-band gain =.5 db 2 4 rms in-band gain = 47 db 4 5 6 6 /64 8.5 Normalized Frequency (f /f s ) ECE37 3
Improved 5 th -Order Lowpass NTF Zeros optimized for OSR=32 optimization flag OSR = 32; H = synthesizentf(5,osr,);... Zeros spread across the band-of-interest to minimize the rms value of the NTF. ECE37 3 Improved NTF db 2 6 rms gain = 66 db 4 7 6 8 /64 8.5 Normalized Frequency (f /f s ) ECE37 32
Bandpass Example OSR = 64; center frequency f = /6; H=synthesizeNTF(6,OSR,,[],f);... [] or NaN means use default value, i.e. Hinf =.5 ECE37 33 Bandpass NTF and STF db NTF all-pole STF with same poles as Σ toolbox NTF 2 4 6.5 Normalized Frequency (f /f s ) ECE37 34
Summary: NTF Selection If OSR is high, a single-bit modulator may work To improve SQNR, Optimize zeros, H Increase, or Increase order. If SQNR is insufficient, must use a multi-bit design Can turn all the above knobs to enhance performance. Feedback DAC assumed to be ideal ECE37 35 NTF-Based Simulation [dsdemo2] order=5; OSR=32; ntf = synthesizentf(order,osr,); N=2^7; fbin=959; A=.5; % 28K points input = A*sin(2*pi*fbin/N*[:N-]); output = simulatedsm(input,ntf); spec = fft(output.*ds_hann(n)/(n/4)); plot(dbv(spec(:n/(2*osr)))); In mex form; 28K points in <. sec dbfs/nbw 5 5 NBW=.5 bins 2 24 248 FFT Bin Number (28K-point FFT) ECE37 36
Simulation Example Cont d u dbfs/nbw v 2 4 6 5 Time (sample number) 8 NBW =.8x 4 f s (8k-point FFT) 2.5 Normalized Frequency (f /f s ) ECE37 37 SNR vs. Amplitude: simulatesnr [snr amp] = simulatesnr(ntf,osr); plot(amp,snr,'b-^'); 8 OSR=32 Peak SNR is 85 db. Max. input is 3 dbfs. SQNR (db) 6 4 2 8 6 4 2 Input Amplitude (dbfs) ECE37 38
U MOD2 Expanded z z z Q E V un ( ) x ( n + ) x 2 ( n + ) x ( n) z - z - x 2 ( n) vn ( ) Q Difference Equations: v( n) = Qx ( 2 ( n) ) x ( n + ) = x ( n) vn ( ) + un ( ) x 2 ( n + ) = x 2 ( n) vn ( ) + x ( n + ) ECE37 39 Example Matlab Code function [v] = simulatemod2(u) x = ; x2 = ; for i = :length(u) v(i) = quantize( x2 ); x = x + u(i) - v(i); x2 = x2 + x - v(i); end return function v = quantize( y ) if y>= v = ; else v = -; end return ECE37 4
NLCOTD: True Single-Phase Dynamic FF D C Q + Clock not inverted anywhere + Small + Fast ECE37 4 TSPFF Operation D C C Y Z Q X C Can drop inverter. (Handy if making a divider.) D C X Y Z Q d ~d d ~d d ECE37 42
TSPFF Gotchas Leakage: Won t work if clock is too slow. Possible high current if clock is stopped. Need to add devices to hold the dynamic nodes at a safe value. No positive feedback Vulnerable to metastability. ECE37 43