RRAM technology: From material physics to devices. Fabien ALIBART IEMN-CNRS, Lille

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Transcription:

RRAM technology: From material physics to devices Fabien ALIBART IEMN-CNRS, Lille

Outline Introduction: RRAM technology and applications Few examples: Ferroelectric tunnel junction memory Mott Insulator memory Electro Chemical Memory (CB-RAM) OxRAM Valence Change Memory Thermo Chemical Memory Conclusion: main challenges

Principle of RRAM V read V write R on = logical 1 R off = logical 0 The time voltage dilemma RRAM: big picture Induce a change of resistivity to discriminate two (or more) resistance states by electrical stress (1 bit of information, or more) Evaluate this state by a Read voltage, i.e. probing current Equivalent to a tunable resistor Non volatile In other words: we want the write voltage V write to be fast and to induce a large change of resistance and we want to be able to read for a very long time at V read w/o changing the state: not trivial. Whatever is the physical mechanism originating the change of resistance, we need NON LINEARITY Ex: the worst non-volatile memory Storing charge on a capacitor Q i v T store /T write ~1 R V Write Read Write Read t V t A V Metal electrode Switching material T store /T write >10^6 to become a Non- Volatile memory

Some semantic There is today a debat around the proposition of memristance by HP in 2008. If we follow precisely the definition of memristor, none of the RRAM belongs to this class, but if we extend memrsitor to memristive devices, all RRAM can fit into this class More or less the same, but not exactly similar Classification under construction

The Holy grale: a universal memory For RRAM to become a success story, it needs to bring more to industry, not only equivalent performances Fast (sub 10ns) Need refresh and/or power ON slow need large voltages Scaling issue 4-terminal High retention time Try to do both with the same device: Fast (<10ns) Low switching energy (pj) Non-volatile (10 year@85c) Reliable High endurance (up to 10 12 cycles And more Sub 10 nm integration New computing solution Multi-bit

Current ( ua ) Wide range of material systems (many CMOS compatible) and physical phenomena High density due to lateral scaling and.. HPLab, 2005 monolithical 3D integration RRAM potential PROS and CONS but simple functionality 200 100 50 nm hp 0 + Pt -100 TiO V <50 ns TiO x 2Pt - -200-2 -1 0 1 2 Voltage ( V ) J. Yang et al. Nature Nano, (2008) Solution: hybrid circuits M.-J.Lee et al. IEDM 85 (2008) Kawahara et al. Samsung, 2012 6 crossbar add-on with integrated memristive devices CMOS circuits

CMOS decoder MEMORIES AND STORAGE 1transistor/1resistor(1T1R) memory cell memristor (CMOS) transistor selected bit line CMOS sense/drive circuits READ OPERATION leakage current selected word line Killer Applications crossbar add-on with integrated memristive devices conventional complimentary metal oxide semiconductor (CMOS) circuits HYBRID CIRCUITS bottom (nano)wire level top (nano)wire level similar twoterminal memristive devices at each crosspoint - OFF state V WRITE i V TH -V TH V READ ON state v VWRITE V READ crossbar wires (only few are shown for clarity) B FPGA A B A+B floated 0 0T1R memory cell LOGIC (HPLab, Nature) A A B vias connecting CMOS cell CMOS and crossbar wires A CMOS cell BIO-INSPIRED AND MIXED-SIGNAL INFORMATION PROCESSING synapses CMOS neuron R A+ B B diode-like memristors R w i x i A B synapses CMOS inverter A+ B diode-resistor logic crossbar nanowire x 1 x 2 y synapses neuron w 1 w 2 x 1 x 2 CMOS neurons

State-of-the-Art Performance Govoreanu,et all IEDM, 2012 1) yield and repeatability 10) density 2) endurance storage 9) number of states logic 8) nonlinear I-V bio Endruance (cycles) memory 3) reciprocal switching energy 4) switching speed demonstrated 1E13 1E11 1E9 1E7 100,000 1,000 SAIT HP Labs Panasonic Corp. Fujitsu Labs several groups 2006 2007 2008 2009 2010 2011 Year ON OFF Current @-200mV (A) Kawahara et al. Samsung, 2012 1E-4 1E-5 Decrease Weight Increase Weight Stand-by (Read only) 120 A 60 A 30 A 7 A 0 1000 2000 3000 Pulse Number 15 A Alibart et al, Nanotechnology, 23, 074508, 2012 7) ON state resistance 5) retention 6) on/off current ratio J. Yang and D. Strukov (Nature Nano 2013) Schindler, PhD Thesis, 2009 Strachan et al, Nanotechnology, 22, 505402 2011 Torrezan et al, Nanotechnology, 22, 485203 2011

1) yield and repeatability 10) density 2) endurance 9) number of states storage memory 3) reciprocal switching energy logic 8) nonlinear I-V bio demonstrated 4) switching speed 7) ON state resistance 6) on/off current ratio 5) retention

See J. Grollier talk RRAM technologies Mott transition See J. Tranchant (IMN) talk Chen-NatNano2012 Anderson localisation tunning in SiO2_Pt/NPs films This review Thermally-induced phase change

Work from UMPhys-Thales (Paris) FeRAM Change of resistivity is associated to the change of polarization of a ferroelectric thin film PFM analysis of domains reversal via electric field stress Polarization -> change of band alignment -> change of resitivity

FeRAM Non-linearity: Exp(Ea/kT) >< Exp(qV/kT) Ea Next big challenge: Integration with CMOS friendly materials

Work from IMN, Nantes Mott Memory Clustered lacunar spinel structure : V V SG F-43m V V th R low level t t t t delay no transition volatile Resistive switching fast non-volatile Resistive switching

Modeling of the volatile resistive switching Model Electric Field conductor insulator Electric Field induced Breakdown of the Mott state Metastable ON state -> OFF state more stable (volatile transition) BUT domain size effect that induces a nonvolatile transition P. Stoliar et al., Adv. Mater. 25, 3222 (2013) Time (cycle #) 14 V. Guiot et al. Nature Comm; 4, 1722 (2013)

Electrical performances of GaV 4 S 8 for Mott memories Resistive switch cycling endurance 2V / 1ms pulses on 50x50µm² MIM structures Writing / erasing times 100 ns, error rate < 0,1 8V / 100ns pulses on 20x3 µm² planar structures GaV 4 S 8 + writing / erasing voltage 2V J. Tranchant et al. Thin Solid Films, 533 (2013) 61 Data retention : high and low resistance states > 10 years 20 µm Increase of R on /R off with downscaling (extrapolation on 2x2 µm² MIM structures)

Electrochemical Cell Other names: Solid state electrolyte memory Conductive bridge memory Programmable metallization cell Active Electrode (e.g., Ag, Cu) Solid state electrolyte with host ions M Z+ ions (e.g. Ag 2 S, Cu 2 S, RbAg 4 I 5 ) or insulator doped with M Z+ (e.g. SiO 2, WO 2, GeS, GeSe) Counter Electrode (e.g., Pt, Ir, Au, W) typically amorphous or crystalline

Electrochemical Cell

Typical I-V and Process Cartoon (A) OFF state (B, C) SET process: (i) Ag oxidized to Ag + ; (ii) drift in electric field ; (iii) reduced and electro-crystallized (D) SET process: complete bridging (compliancerelated) (E) RESET process: opposite of SET (heat assisted?) Ag-Ge-Se

(a) (b) (c) Anodic oxidation and dissolution of M: M M z+ +ze - Migration of M z+ across thin film (migrations is strongly enhanced by extended defects) Reduction and electrocrystallization of M on the surface of CE: M z+ +ze - M Formation of filament growing (typically) in the direction of the active electrode. A forming step (first sweep) is required The growth is limited by current compliance SET Process Origin of Non-linearity Butler-Volmer equation for oxidation reductions Exponential for high overpotentials Δφ~applied potential α: cathodic charge transfer coef.

Ox(ide)RAM (redox based) OxRAM is typically a transition metal oxide sandwiched between inert electrodes (no metal cations available as in ECM). If a sufficient voltage (or current) stress is applied, the insulating material can become conductive Two distinct I-V switching phenomena are reported Unipolar: The same polarity can tune ON and OFF the cell Bipolar: One polarity switch ON, the other switch OFF A V Metal 1 M y O x Metal 2 Thermo Chemical Memory UNIPOLAR Valence Change Memory BIPOLAR What is happening?

Valence Change Memory (redox-based) In TMO, oxygen vacancies (V O 2+ )are much more mobile than cations. This has been evidenced by coloration measurement in slightly doped oxide cristal Metal 1 M y O x The doping vision (in cristal): By changing the V 2+ O distribution, two doping region can be formed, n and p respectively. For highly doped TMO, the n-type can become highly conductive Metal 2 Slightly Fe doped STO Red: Fe 4+, p-type region White: Fe <4+, n-type region (Vo rich)

Valence Change Memory (redox-based) In the case of thin films, the TMO are most of the time amorphous. But still, the V O 2+ are expected to be the mobile species (no direct evidence of V O 2+ migration in amorphous TMO) The stochiometry vision : Metal 1 M y O x Metal 2

Electroforming (cristal) During electroforming, conducting filament are created into the oxide.

Electroforming (thin film) Example of forming Observation of Magneli phases in TiO2 Exp. setup X ray-diffraction TEM image - Forming is thermally assisted and two step process (reduction and migration)

Bipolar switching Pt/ZrO x /Zr Green = O Purple = Zr in lower valence state Oxygen mobile, Zr is immobile

Mechanism for switching Practically, even if one mechanism is more important, switching results from a combination

Non linearity Vacancies mobility increase exponentially with temperature Other factor: Maybe the stability of the two phases (i.e. stochiometric vs high V O 2+ concentration) barrier modulation due to: 2 electric field 1 heating 1 ~ k B T 2 ~Eaq/2 U A ion hopping initial profile 3 U A hop distance a energy 3 phase transition or redox reaction position

RRAM Challenges Main challenge: deal with dispersion Because forming is stochastic, dispersion in switching properties are huge Solution: towards forming free devices 25 nm Au / 15 nm Pt top electrode 30 nm TiO 2-x e-beam patterned Pt protrusion 5 nm Ti / 25 nm Pt bottom electrode 20 nm AE = active electrode (low oxygen affinity, high work function, e.g Pt, Ir, TiN) OE = Ohmic electrode (opposite, e.g Ti, Ta) (a) (b) (c) Homogeneous monolayer, e.g. TiO2-x forming is crucial Homogeneous bi-layer, e.g. TiO2/TiO2-x or Ta2O5/TaOx Hetergeneous bi-layer, e.g. Al2O3/TiO2-x or HfO2/TiO2-x

RRAM Challenges Main challenge: energy consumption Lowest E/Bit reported is few pj. Ideally, we want to go to the sub pj regime Solution: filament engineering Trade off between filament resistance and ON/OFF ratio. (Need to increase the resistance of the filament) High conductivity (metallic filament) Moderate conductivity (Semi-metallic) Scaling of the filament Control of defects in the filament (i.e. control of conductivity)

Main challenge: high density crossbar implementation RRAM challenges Additionnal challenges: Nanowire resistance contribution and high current effect on wire during operation Solutions: Complementary switching Selector device: Tunnel junction S type Diode 4 Intrinsic non-linear I-V 10 Current (ma) 2 0-2 Current (ma) 5 0-5 -4-10 -1.0-0.5 0.0 0.5 1.0 Voltage (V) -1.5-1.0-0.5 0.0 0.5 1.0 1.5 Voltage (V)

Thanks for your attention