Type Ordering Code Package TLE 4729 G Q67006-A9225 P-DSO-24-3 (SMD)

Similar documents
2-Phase Stepper-Motor Driver Bipolar-IC TLE4729G

5-V Low Drop Fixed Voltage Regulator TLE 4268

Smart Highside Power Switch

Smart Highside Power Switch

Smart Highside Power Switch PROFET

Smart Two Channel Highside Power Switch

Smart High-Side Power Switch

Features / Advantages: Applications: Package: Y4

Features / Advantages: Applications: Package: Y4

HV513 8-Channel Serial to Parallel Converter with High Voltage Push-Pull Outputs, POL, Hi-Z, and Short Circuit Detect

Smart Power High-Side-Switch

MC74HC138A. 1 of 8 Decoder/ Demultiplexer. High Performance Silicon Gate CMOS

Features / Advantages: Applications: Package: Y4

XPT IGBT Module MIXA450PF1200TSF. Phase leg + free wheeling Diodes + NTC MIXA450PF1200TSF. Part number

Dual Low Drop Voltage Regulator TLE 7469

Smart Highside Power Switch

Smart Highside Power Switch

Data Sheet, Rev. 1.1, September 2011 HITFET - BTS3405G. Smart Low-Side Power Switch. Automotive Power

CoolMOS 1) Power MOSFET with Series Schottky Diode and Ultra Fast Antiparallel Diode

SOTiny Gate STX. Input. Descriptio n. Features. Block Diagram. Pin Configuration. Recommended Operating Conditions (1) Pin Description.

PROFET BTS 840 S2. Smart High-Side Power Switch Two Channels: 2 x 30mΩ Current Sense

Standard Rectifier Module

3~ Rectifier Bridge, half-controlled (high-side) + Brake Unit + NTC /20 NTC. Features / Advantages: Applications: Package: E2-Pack

Smart Highside Power Switch

Converter - Brake - Inverter Module (CBI2)

NDP4050L / NDB4050L N-Channel Logic Level Enhancement Mode Field Effect Transistor

Converter - Brake - Inverter Module (CBI2)

MC74HC165A. 8 Bit Serial or Parallel Input/ Serial Output Shift Register. High Performance Silicon Gate CMOS

Smart Sense High-Side Power Switch For Industrial Applications

Converter - Brake - Inverter Module (CBI3)

Type Ordering Code Package TLE 6255 G Q67006-A9352 P-DSO-14-9 (SMD)

Silicon Controlled Rectifiers UNIT-1

Quad 2-Input OR Gate High-Performance Silicon-Gate CMOS

Converter - Brake - Inverter Module (CBI2)

Smart Highside Power Switch

Data Sheet, Rev. 1.0, March 2008 BTS4130QGA. Smart High-Side Power Switch. Automotive Power

Smart Lowside Power Switch HITFET BSP 75N

N channel vertical power FET in Smart SIPMOS technology. Fully protected by embedded protection functions. Overvoltage- Protection

N channel vertical power FET in Smart SIPMOS technology. Fully protected by embedded protection functions. Overvoltage- Protection

PI74STX1G126. SOTiny Gate STX Buffer with 3-State Output. Features. Descriptio n. Block Diagram. Pin Configuration

MC14175BDR2G. Quad Type D Flip Flop

Data Sheet, Rev. 1.0, March 2008 BTS4160DGA. Smart High-Side Power Switch. Automotive Power

Datasheet, Rev. 1.1, February 2008 BTS3160D. 10mOhm Smart Low Side Power Switch. Automotive Power

Features / Advantages: Applications: Package: SMPD

High Speed Optocoupler, 1 MBd, Photodiode with Transistor Output. i179081

p h a s e - o u t Three Phase Rectifier Bridge with IGBT and Fast Recovery Diode for Braking System VVZB 135 = 1600 V = 135 A Recommended replacement:

Infineon Basic LED Driver TLD1124EL. Data Sheet. Automotive. 1 Channel High Side Current Source. Rev. 1.0,

Smart High-Side Power Switch

Data Sheet, Rev.1.0, April 2008 BTS4175SGA. Smart High-Side Power Switch. Automotive Power

Data Sheet, Rev. 1.0, March 2008 BTS4300SGA. Smart High-Side Power Switch. Automotive Power

L1, L2, N1 N2. + Vout. C out. Figure 2.1.1: Flyback converter

PI5A3157. SOTINY TM Low Voltage SPDT Analog Switch 2:1 Mux/Demux Bus Switch. Features. Descriptio n. Applications. Connection Diagram Pin Description

MC74VHC1GT125. Noninverting Buffer / CMOS Logic Level Shifter with LSTTL Compatible Inputs

Lecture -14: Chopper fed DC Drives

SFH636. Optocoupler, Phototransistor Output, 1 Mbd, 10 kv/ms CMR, Split CollectorTransistor Output VISHAY. Vishay Semiconductors.

SFH6345. High Speed Optocoupler, 1 Mbd, 15 kv/ms CMR, Transistor Output Features VISHAY. Vishay Semiconductors. Agency Approvals.

Application Note AN Software release of SemiSel version 3.1. New semiconductor available. Temperature ripple at low inverter output frequencies

Data Sheet, V1.0, January 2004 BTS 5234L. Smart High-Side Power Switch PROFET Two Channels, 60 mω. Automotive Power. Never stop thinking.

SFH636. Pb Pb-free. Optocoupler, Phototransistor Output, 1 Mbd, 10 kv/ms CMR, Split CollectorTransistor Output VISHAY. Vishay Semiconductors

High Voltage Standard Rectifier Module

Top View. Top View. V DS Gate-Source Voltage ±8 ±8 Continuous Drain Current Pulsed Drain Current C V GS I D -2.5 I DM P D 0.

Type Marking Pin Configuration Package SMBT3904/MMBT3904 SOT23 SMBT3904S 2=E 1=B 3=C 1=E1 2=B1 3=C2

EECS 141: FALL 00 MIDTERM 2

Analog Multiplexer Demultiplexer High-Performance Silicon-Gate CMOS

AO V Complementary Enhancement Mode Field Effect Transistor

Silicon Diffused Power Transistor

p h a s e - o u t Three phase full Bridge with Trench MOSFETs in DCB isolated high current package GWM X2

Silicon Diffused Power Transistor

Smart Sense High-Side Power Switch

Silicon Diffused Power Transistor

SOTiny TM LVDS High-Speed Differential Line Receiver. Features. Description. Applications. Pinout. Logic Diagram. Function Table

p h a s e - o u t Dual Power MOSFET Module VMM X2 V DSS = 75 V I D25 = 1560 A R DS(on) = 0.38 mω Phaseleg Configuration

Chapter 7 Response of First-order RL and RC Circuits

HITFET HITFET - BTS3046SDR. Datasheet. Automotive Power. Smart Low Side Power Switch

IXGH48N60C3D1. GenX3 TM 600V IGBT with Diode V CES = 600V I C110. = 48A V CE(sat) 2.5V t fi(typ) = 38ns. High speed PT IGBT for kHz Switching

MC74HC595A. 8-Bit Serial-Input/Serial or Parallel-Output Shift Register with Latched 3-State Outputs. High Performance Silicon Gate CMOS

V DS. 100% UIS Tested 100% R g Tested. Top View. Top View S2 G2

Silicon Diffused Power Transistor

Non Linear Op Amp Circuits.

Introduction to Digital Circuits

NDS356P P-Channel Logic Level Enhancement Mode Field Effect Transistor

Silicon Diffused Power Transistor

Silicon Diffused Power Transistor

NDS332P P-Channel Logic Level Enhancement Mode Field Effect Transistor

Smart High-Side Power Switch for Industrial Applications 1 Channel: 1 x 200mΩ

Top View. Top View S2 G2 S1 G1

EE141. EE141-Spring 2006 Digital Integrated Circuits. Administrative Stuff. Challenges in Digital Design. Last Lecture. This Class

MC3x063A 1.5-A Peak Boost/Buck/Inverting Switching Regulators

Silicon Diffused Power Transistor

Designing Information Devices and Systems I Spring 2019 Lecture Notes Note 17

Silicon Diffused Power Transistor

SFH6345. Pb Pb-free. High Speed Optocoupler, 1 Mbd, 15 kv/ms CMR, Transistor Output. Vishay Semiconductors

Outline. Chapter 2: DC & Transient Response. Introduction to CMOS VLSI. DC Response. Transient Response Delay Estimation

U(t) (t) -U T 1. (t) (t)

TrenchMV TM Power MOSFET

Part Ordering code Marking Remarks 1N4148W-V 1N4148W-V-GS18 or 1N4148W-V-GS08 A2 Tape and Reel

NDS355AN N-Channel Logic Level Enhancement Mode Field Effect Transistor

Standard Rectifier Module

8. Basic RL and RC Circuits

Silicon Diffused Power Transistor

Transcription:

2-Phase Sepper-Moor Driver Bipolar-IC TE 4729 G Feaures 2.7 amp. full bridge oupus Inegraed driver, conrol logic and curren conrol (chopper) ery low curren consumpion in inhibi mode Fas free-wheeling diodes Max. supply volage 45 Oupu sages are free of crossover curren Offse-phase urn-on of oupu sages All oupus shor-circui proof Error-flag for overload, open load, over-emperaure SMD package P-DSO-24-3 P-DSO-24-1, -3 Type Ordering Code Package TE 4729 G Q676-A9225 P-DSO-24-3 (SMD) Funcional Descripion TE 4729 G is a bipolar, monolihic IC for driving bipolar sepper moors, DC moors and oher inducive loads ha operae by consan curren. I is fully pin and funcion compaible excep he curren programming is inverse o he TE 4729 G wih an addiional inhibi feaure. The conrol logic and power oupu sages for wo bipolar windings are inegraed on a single chip which permis swiched curren conrol of moors wih.7 A per phase a operaing volages up o 16. The direcion and value of curren are programmable for each phase via separae conrol inpus. In he case of low a all four curren program inpus he device is swiched o inhibi mode auomaically. A common oscillaor generaes he iming for he curren conrol and urn-on wih phase offse of he wo oupu sages. The wo oupu sages in full-bridge configuraion include fas inegraed freewheeling diodes and are free of crossover curren. The device can be driven direcly by a microprocessor in several modes by programming phase direcion and curren conrol of each bridge independenly. Daa Shee 1 21-4-9

Wih he wo error oupus he TE 4729 G signals malfuncion of he device. Seing he conrol inpus high reses he error flag and by reacivaing he bridges one by one he locaion of he error can be found. Pin Configuraion (op view) TE 4729 G Ι 1 Ι 11 Phase 1 OSC GND GND GND GND Q11 R 1 + S Q12 1 24 2 23 3 4 5 6 7 8 9 1 11 12 22 21 2 19 18 17 16 15 14 13 Ι 2 Ι 21 Phase 2 Error 1 GND GND GND GND Q21 R 2 Error 2 Q22 AEP2195 Figure 1 Daa Shee 2 21-4-9

Pin Definiions and Funcions Pin Funcion 1, 2, 23, 24 Digial conrol inpus IX, IX1 for he magniude of he curren of he paricular phase. I se = 45 ma wih R sense = 1 Ω IX1 IX Phase Curren Example of Moor Saus No curren 1).155 I se old I se Normal mode 1.55 I se Accelerae 1) No curren in boh bridges inhibis he circui and curren consumpion will sink below 5 µa (inhibi-mode) 3 Inpu phase 1; conrols he curren hrough phase winding 1. On -poenial he phase curren flows from Q11 o Q12, on -poenial in he reverse direcion. 5 8, Ground; all pins are conneced a leadframe inernally. 17 2 4 Oscillaor; works a approx. 25 kz if his pin is wired o ground across 2.2 nf. 1 Resisor R 1 for sensing he curren in phase 1. 9, 12 Push-pull oupus Q11, Q12 for phase 1 wih inegraed free-wheeling diodes. 11 Supply volage; block o ground, as close as possible o he IC, wih a sable elecrolyic capacior of a leas 47 µf in parallel wih a ceramic capacior of 1 nf. 14 Error 2 oupu; signals wih low he errors: shor circui o ground of one or more oupus or over-emperaure. 13, 16 Push-pull oupus Q22, Q21 for phase 2 wih inegraed free-wheeling diodes. 15 Resisor R 2 for sensing he curren in phase 2. 21 Error 1 oupu; signals wih low he errors: open load or shor circui o + S of one or more oupus or shor circui of he load or overemperaure. 22 Inpu phase 2; conrols he curren flow hrough phase winding 2. On -poenial he phase curren flows from Q21 o Q22, on -poenial in he reverse direcion. Daa Shee 3 21-4-9

Block Diagram + S C OSC OSC Ι 1 Ι 11 Phase 1 Error 1 Oscillaor Funcion ogic Phase 1 T11 T13 D11 D13 T12 D12 T14 D14 Q11 Q12 R 1 Error 2 Error-Flag Generaion TE 4729 G R sense + S Ι 2 Ι 21 Phase 2 Inhibi Funcion ogic Phase 2 T21 T23 D21 D23 T22 D22 T24 D24 Q21 Q22 R 2 GND R sense AEB2196 Figure 2 Daa Shee 4 21-4-9

Absolue Maximum Raings T j = 4 o 15 C Parameer Symbol imi alues Uni Remarks min. max. Supply volage S.3 45 Error oupus Err I Err.3 45 3 ma Oupu curren I Q 1 1 A Ground curren I GND 2 A ogic inpus IXX 15 15 IXX; Phase 1, 2 Oscillaor volage OSC.3 6 R 1, R 2 inpu volage RX.3 5 Juncion emperaure T j 4 15 C Sorage emperaure T sg 5 15 C Thermal resisances Juncion-ambien Juncion-ambien (soldered on a 35 µm hick 2 cm 2 PC board copper area) Juncion-case R h ja R h ja R h jc 75 5 15 K/W K/W K/W Measured on pin 5 Operaing Range Supply volage S 5 16 Case emperaure T C 4 11 C Measured on pin 5 P diss = 2 W Oupu curren I Q 8 8 ma ogic inpus IXX 5 + 6 IXX; Phase 1, 2 Error oupus Err I Err 25 1 ma Daa Shee 5 21-4-9

Characerisics S = 6 o 16 ; T j = 4 o 13 C Parameer Symbol imi alues Uni Tes Condiion min. yp. max. Curren Consumpion From + S From + S I S I S 2 3 5 5 µa ma IXX = ; S = 12 ; T j 85 C I Q1, 2 = A Oscillaor Oupu charging curren Charging hreshold Discharging hreshold Frequency I OSC OSC OSC f OSC 9.8 1.7 18 12 1.3 2.3 24 15 1.9 2.9 3 µa kz C OSC = 2.2 nf Phase Curren ( S = 9 16 ) Mode no curren olage hreshold of curren Comparaor a R sense in mode: old Sepoin Accelerae I Q ch cs ca 4 41 63 7 45 7 1 51 8 ma m m m IX = ; IX1 = IX = ; IX1 = IX = ; IX1 = IX = ; IX1 = ogic Inpus (Phase X) Threshold yseresis -inpu curren -inpu curren -inpu curren I Iy I I I I I I 1.2 1 1 1 1.7 2 1 2 2.2 1 5 1 m µa µa µa I = 1.2 I = I = 5 ogic Inpus (IX1; IX) Threshold yseresis -inpu curren -inpu curren I Iy I I I I.8 1 5 1.7 2 2 2.2 + 5 5 m µa µa I = I = 5 Daa Shee 6 21-4-9

Characerisics (con d) S = 6 o 16 ; T j = 4 o 13 C Parameer Symbol imi alues Uni Tes Condiion min. yp. max. Error Oupus Sauraion volage eakage curren ErrSa 5 I Err 2 5 1 m µa I Err = 1 ma Err = 25 Thermal Proecion Shudown Prealarm Dela yseresis shudown yseresis prealarm T jsd T jpa T j T jsdhy T jpahy 14 12 1 15 13 2 2 2 16 14 3 C C K K K I Q1, 2 = A Err = T j = T jsd T jpa Power Oupus Diode Transisor Sink Pair (D13, T13; D14, T14; D23, T23; D24, T24) Sauraion volage Sauraion volage Reverse curren Forward volage Forward volage sai sai I RI FI FI.1.2 5.6.7.3.5 1.9 1..5.8 15 1.2 1.3 µa I Q =.45 A I Q =.7 A S = Q = 4 I Q =.45 A I Q =.7 A Diode Transisor Source Pair (T11, D11; T12, D12; T21, D21; T22, D22) Sauraion volage Sauraion volage Sauraion volage Sauraion volage Reverse curren Forward volage Forward volage Diode leakage curren sauc saud sauc saud I Ru Fu Fu I S.6.1.7.2 4.7.8 1..3 1.2.5 8 1. 1.1 3 1.2.6 1.5.8 12 1.3 1.4 1 µa ma I Q =.45 A; charge I Q =.45 A; discharge I Q =.7 A; charge I Q =.7 A; discharge S = 4, Q = I Q =.45 A I Q =.7 A I F =.7 A Daa Shee 7 21-4-9

Characerisics (con d) S = 6 o 16 ; T j = 4 o 13 C Parameer Symbol imi alues Uni Tes Condiion min. yp. max. Error Oupu Timing Time Phase X o IXX Time IXX o Phase X Delay Phase X o Error 2 Delay Phase X o Error 1 Delay IXX o Error 2 Rese delay afer Phase X Rese delay afer IXX PI IP PEsc PEol IEsc RP RI 5 12 45 15 3 3 1 2 1 1 5 8 1 5 µs µs µs µs µs µs µs For deails see nex four pages. These parameers are no 1% esed in producion, bu guaraneed by design. Daa Shee 8 21-4-9

Diagrams Timing beween IXX and Phase X o preven seing he error flag Operaing condiions: + S = 14, T j = 25 C, I err = 1 ma, load = 3.3 m, 1 Ω a) ΙXX Phase X PI AET2197 If PI < yp. 5 µs, an error open load will be se. b) ΙXX Phase X IP AET2198 If IP < yp. 12 µs, an error open load will be se. Daa Shee 9 21-4-9

This ime srongly depends on + S and induciviy of he load, see diagram below. Time IP vs. oad Induciviy 3 AED2199 IP µ s 25 S = 6 2 15 1 5 9 12 16 1 2 3 4 m 6 Propagaion Delay of he Error Flag Operaing condiions: + S = 14, T j = 25 C, I err = 1 ma, load = 3.3 m, 1 Ω a) IXX =, error condiion: shor circui o GND. Phase X Error 2 PEsc AED22 yp. PEsc : 45 µs Daa Shee 1 21-4-9

b) IXX =, error condiion: open load (equivalen: shor circui o + S ). Phase X Error 1 PEol AET221 yp. PEol : 15 µs c) Phase X = or, cons.; error condiion: shor circui o GND. ΙXX Error 2 IEsc AET222 yp. IEsc : 3 µs IEsc is also measured under he condiion: begin of shor circui o GND ill error flag se. Daa Shee 11 21-4-9

d) IXX =, rese of error flag when error condiion is no rue. Phase x Error X RP AET223 yp. RP : 3 µs e) Phase X = or, cons.; rese of error flag when error condiion is no rue. ΙXX Error X RI AET224 yp. RI : 1 µs Daa Shee 12 21-4-9

Quiescen Curren I S vs. Supply olage S ; bridges no chopping; T j = 25 C Quiesc. Curren I S vs. Junc. Temp. T j ; bridges no chopping, S = 14 Ι S 6 ma 5 AED225 = Ι QX.7 A Ι S 6 ma 5 Ι QX = AED226.7 A 4.45 A 4.45 A 3.7 A 3.7 A 2 2 1 1 5 1 15 S 2-5 5 1 C T j 15 Oscillaor Frequency f Osc vs. Juncion Temperaure T j Oupu Curren I QX vs. Juncion Temperaure T j 3 kz f Osc AED227 8 ma 7 Ι QX 6 AED228 ΙX1 =, ΙX = 25 5 2 S = 14 C OSC = 2.2 nf 4 3 2 S = 14 R X = 1Ω ΙX1 =, ΙX = 1 15-5 5 1 C 15-5 5 1 C 15 T j T j Daa Shee 13 21-4-9

Oupu Sauraion olages sa vs. Oupu Curren I Q Forward Curren I F of Free-Wheeling Diodes vs. Forward olages F 2. sa 1.5 S T j = 14 = 25 C AED229 1. Ι F A T j = 25 C Fl Fu.8 AED221 1. sauc.6.4.5 sal saud.2.2.4.6 A.8 Ι Q.5 1. 1.5 F Typical Power Dissipaion P o vs. Oupu Curren I Q (non sepping) Permissible Power Dissipaion P o vs. Case Temp. T C (measured a pin 5) P o 4 W 3 phase x = 1 m R phase x = 2 Ω C OSC = 2.2 nf T C = 25 C boh phases acive AED2211 P o 16 W 12 1 AED2212 2 1 S = 14 8 6 4 T jmax = 15 C 12 C 2.2.4.6 A.8 Ι Q -25 25 75 125 C 175 T C Daa Shee 14 21-4-9

Inpu Characerisics of I XX, Phase X Oupu eakage Curren i Ι xx 4 µ A 2 Ι xx AED2213 1.2 ma Ι R.8 AED2214-2 -4-6 -8-1 T j = 4 C 25 C 15 C Phase X.4 -.4 S = 16 S = 4-12 -6-4 -2 2 4 6 Ιxx -.8 1 2 3 Q 4 Quiescen Curren I S vs. Supply olage S ; inhibi mode; T j = 25 C Ι S 25 µa 2 AED2215 15 1 5 5 1 15 S 2 Daa Shee 15 21-4-9

1 nf 1 µ F +12 11 Microconroller 1 2 3 21 14 24 23 22 Ι1 Ι11 Phase 1 Error 1 Error 2 Ι2 Ι21 Phase 2 OSC 4 22 nf TE 4729 G 15 R 2 1Ω 1 R 1 1Ω S 9 Q11 12 Q12 16 Q21 Q22 13 GND 5,6,7,8, 17,18,19,2 M Sepper Moor AES2216 Figure 3 Applicaion Circui Daa Shee 16 21-4-9

1 µ F 1 nf Ι S S + S sau Fu Ι Ι Ι Ι Err ΙXX, Phase X Error X TE 4729 G Oupu Ι Q Ι Rl Ι Ru Err OSC Osc Ι OSC 2.2 nf Ι S GND Ι GND C R sense Ι Rsense 1Ω Fl sal AES2217 Figure 4 Tes Circui Daa Shee 17 21-4-9

accelerae mode full sep operaion normal mode Ι1 Ι11 Phase 1 i acc i se Ι Q1 -i se - i acc i acc i se Ι Q2 -i se - i acc Phase 2 Ι 2 Ι 21 AED2218 Figure 5 Full Sep Operaion Daa Shee 18 21-4-9

accelerae mode half sep operaion normal mode Ι1 Ι11 Phase 1 i acc i se Ι Q1 Ι Q2 -i se - i acc i acc i se -i se - i acc Phase 2 Ι 2 Ι 21 AED2219 Figure 6 alf Sep Operaion Daa Shee 19 21-4-9

Osc Osc Osc Ι Rsense 1 Ι Rsense 2 Q12 + S FU sal ca Q11 + S sau D sau C Q22 + S Q21 + S Ι Q1 i acc Ι i Q2 acc Operaing condiions: S = 14 Phase x = phase x = 1 m ΙXX = Rphase x = 4 Ω AED222 Figure 7 Curren Conrol in Chop-Mode Daa Shee 2 21-4-9

Osc 2.3 Phase 1.3 Oscillaor igh Imped. Phase change-over Ι Rsense 1 Q11 + S igh Impedance Q12 + S igh Impedance Ι Ι se Phase 1 fas curren decay T 1 slow curren decay Operaing condiions: - Ι se S = 14 11 = for < T 1 phase 1 = 1 m Ι11 = for > T 1 Rphase 1 = 4 Ω Ι1 = Ι 2X = Ι slow curren decay AED2221 Figure 8 Phase Reversal and Inhibi Daa Shee 21 21-4-9

Calculaion of Power Dissipaion The oal power dissipaion P o is made up of Sauraion losses P sa (ransisor sauraion volage and diode forward volages), Quiescen losses P q (quiescen curren imes supply volage) and Swiching losses P s (urn-on / urn-off operaions). The following equaions give he power dissipaion for chopper operaion wihou phase reversal. This is he wors case, because full curren flows for he enire ime and swiching losses occur in addiion. P o = 2 P sa + P q + 2 P s where I N { sai d + Fu (1 d) + sauc d + saud (1 d)} P sa P q = I q S I N I q i D i R p ON OFF DON = Nominal curren (mean value) = Quiescen curren = Reverse curren during urn-on delay = Peak reverse curren = Conducing ime of chopper ransisor = Turn-ON ime = Turn-OFF ime = Turn-ON delay DOFF = Turn-OFF delay T = Cycle duraion d = Duy cycle p / T sal = Sauraion volage of sink ransisor (TX3, TX4) sauc = Sauraion volage of source ransisor (TX1, TX2) during charge cycle saud = Sauraion volage of source ransisor (TX1, TX2) during discharge cycle Fu = Forward volage of free-wheeling diode (DX1, DX2) = Supply volage S P q ------ S id ------------------------ DON T 2 ( i D + i R ) ON I N + ------------------------------------- + ----- ( 4 2 DOFF + OFF ) Daa Shee 22 21-4-9

+ S Tx1 Dx1 Dx2 Tx2 Tx3 Dx3 Dx4 Tx4 C R sense AET2222 Figure 9 Turn-ON Turn-OFF olage and Curren on Chopper Transisor i D i R Ι N S + Fu S+ Fu sal D ON ON D OFF OFF P AET2223 Figure 1 olage and Curren on Chopper Transisor Daa Shee 23 21-4-9

Applicaion ins The TE 4729 G is inended o drive boh phases of a sepper moor. Special care has been aken o provide high efficiency, robusness and o minimize exernal componens. Power Supply The TE 4729 G will work wih supply volages ranging from 5 o 16 a pin S. Surges exceeding 16 a S won harm he circui up o 45, bu whole funcion is no guaraneed. As soon as he volage drops below approximaely 16 he TE 4729 G works promply again. As he circui operaes wih chopper regulaion of he curren, inerference generaion problems can arise in some applicaions. Therefore he power supply should be decoupled by a.1 µf ceramic capacior locaed near he package. Unsabilized supplies may even afford higher capaciies. Inhibi Mode In he case of low a all four curren program inpus IXX he device will swich ino inhibi condiion; he curren consumpion is reduced o very low values. When saring operaion again, i.e. puing a leas one IXX o high poenial, he Error 1 oupu signals an open load error if he corresponding phase inpu is high. The error is rese by firs recirculaion in chop mode. Curren Sensing The curren in he windings of he sepper moor is sensed by he volage drop across R sense. Depending on he seleced curren inernal comparaors will urn off he sink ransisor as soon as he volage drop reaches cerain hresholds (ypical,.7,.45 and.7 ). These hresholds are no affeced by variaions of S. Consequenly insabilized supplies will no affec he performance of he regulaion. For precise curren level i mus be considered, ha inernal bounding wire (yp. 6 mω) is a par of R sense. Due o chopper conrol fas curren rises (up o 1 A/µs) will occur a he sensing resisors. To preven malfuncion of he curren sensing mechanism R sense should be pure ohmic. The resisors should be wired o GND as direcly as possible. Capaciive loads such as long cables (wih high wire o wire capaciy) o he moor should be avoided for he same reason. Synchronizing Several Choppers In some applicaions synchrone chopping of several sepper moor drivers may be desirable o reduce acousic inerference. This can be done by forcing he oscillaor of he TE 4729 G by a pulse generaor overdriving he oscillaor loading currens (approximaely ± 12 µa). In hese applicaions low level should be beween and.8 while high level should beween 3 and 5. Daa Shee 24 21-4-9

Applicaion ins (con d) Opimizing Noise Immuniy Unused inpus should always be wired o proper volage levels in order o obain highes possible noise immuniy. To preven crossconducion of he oupu sages he TE 4729 G uses a special break before make iming of he power ransisors. This iming circui can be riggered by shor gliches (some hundred nanoseconds) a he phase inpus causing he oupu sage o become high resisive during some microseconds. This will lead o a fas curren decay during ha ime. To achieve maximum curren accuracy such gliches a he phase inpus should be avoided by proper conrol signals. To lower EMI a ceramic capacior of max. 3 nf is advisable from each oupu o GND. Thermal Shu Down To proec he circui agains hermal desrucion, hermal shu down has been implemened. Error Monioring The error oupus signal corresponding o he logic able he errors described below. ogic Table Kind of Error Error Oupu Error 1 Error 2 a) No error b) Shor circui o GND c) Open load 1) d) b) and c) simulaneously e) Temperaure prealarm 1) Also possible: shor circui o + S or shor circui of he load. Over-Temperaure is implemened as pre-alarm; i appears approximaely 2 K before hermal shu down. To deec an open load, he recirculaion of he inducive load is wached. If here is no recirculaion afer a phase change-over, an inernal error flipflop is se. Because in mos kinds of shor circuis here won flow any curren hrough he moor, here will be no recirculaion afer a phase change-over, and he error flipflop for open load will be se, oo. Addiionally an open load error is signaled afer a phase change-over during hold mode. Daa Shee 25 21-4-9

Only in he case of a shor circui o GND, he mos probably kind of a shor circui in auomoive applicaions, he malfuncion is signaled dominan (see d) in logic able) by a separae error flag. Simulaneously he oupu curren is disabled afer 3 µs o preven disurbances. A phase change-over or puing boh curren conrol inpus of he affeced bridge on low poenial reses he error flipflop. Being a separae flipflop for every bridge, he error can be locaed in easy way. Daa Shee 26 21-4-9

Package Oulines P-DSO-24-3 (Plasic Dual Small Ouline Package).2 -.1 2.45 -.2 2.65 max 1) 7.6 -.2.35 x 45.23 +.9 8 max 1.27 2).35 +.15.2 24x 24 13.1.4 +.8 1.3 ±.3 Index Marking 1 12 1) 15.6 -.4 1) Does no include plasic or meal prorusions of.15 max rer side 2) Does no include dambar prorusion of.5 max per side GPS5144 Sors of Packing Package oulines for ubes, rays ec. are conained in our Daa Book Package Informaion. SMD = Surface Mouned Device Dimensions in mm Daa Shee 27 21-4-9