CpE358/CS38 Switchin Theory and Loical Desin Class 7 CpE358/CS38 Summer 24 Copyriht 24 236
Today Fundamental concepts o diital systems (Mano Chapter ) Binary codes, number systems, and arithmetic (Ch ) Boolean alebra (Ch 2) Simpliication o switchin equations (Ch 3) Diital device characteristics (e.., TTL, CMOS)/desin considerations (Ch ) Combinatoric loical desin includin LSI implementation (Chapter 4) Fliplops and state memory elements (Ch 5) Sequential loic analysis and desin (Ch 5) Hazards, Races, and time related issues in diital desin (Ch 9) Synchronous vs. asynchronous desin (Ch 9) Counters, shit reister circuits (Ch 6) Memory and Prorammable loic (Ch 7) Minimization o sequential systems Introduction to Finite Automata CpE358/CS38 Summer 24 Copyriht 24 237
Synchronous Sequential Circuit I n inputs Combinational Circuit O m outputs Storae Element(s) Clock CpE358/CS38 Summer 24 Copyriht 24 238
MasterSlave D FlipFlop Qt ( + ) = D D C Q D Q C C Clock CpE358/CS38 Summer 24 Copyriht 24 239
JK Flip Flop Qt ( + ) = JQ' + KQ ' J K Q i+ Meanin J Q Q i No chane Clockin K Q i Clockin Tole Constructin a JK rom a D Constructin a D rom a JK J K Q D J Q Q K CpE358/CS38 Summer 24 Copyriht 24 24
Fliplop Timin Considerations There are propaation delays due to the internal loic o any liplop J K Q J K DQ Q D C Q CpE358/CS38 Summer 24 Copyriht 24 24
Fliplop Timin Considerations There are propaation delays due to the internal loic o any liplop J K Q J K DQ Q D C Q Clock t setup Input t hold Output t phl t plh CpE358/CS38 Summer 24 Copyriht 24 242
Fliplop Timin Considerations There are propaation delays due to the internal loic o any liplop J K Q J K DQ Q D C Q Clock t setup Input t hold Output t phl t plh Device operation may not be as expected i setup and hold time requirements are not observed CpE358/CS38 Summer 24 Copyriht 24 243
Abstraction o Sequential Circuit Outputs Boolean Equations Truth Table Karnauh Map Loic Diaram Inputs Transition Controls equations table diaram CpE358/CS38 Summer 24 Copyriht 24 244
Typical Sequential Circuit With No Inputs A B C Clock CpE358/CS38 Summer 24 Copyriht 24 245
Typical Sequential Circuit With No Inputs Description by Equations Clock A B C A( t+ ) = B( t) C( t) Bt ( + ) = At ( ) Ct ( + ) = Bt ( ) A(t+) = B(t+) = A(t) C(t+) = B(t) CpE358/CS38 Summer 24 Copyriht 24 246
Typical Sequential Circuit With No Inputs Description by Table A B C A Present B C Input A Next B C Output Clock CpE358/CS38 Summer 24 Copyriht 24 247
Typical Sequential Circuit With No Inputs Description by Diaram A B C Clock CpE358/CS38 Summer 24 Copyriht 24 248
Sequential Machine Moore Models Output is a unction o state only Outputs outputs input values Transition Controls B/ A/ C/ Inputs CpE358/CS38 Summer 24 states Copyriht 24 state transitions or various input conditions 249
Sequential Machine Mealy Models Output is a unction o state and inputs outputs input values / B / / / / A / C Transition Controls states state transitions or various input conditions Inputs Output Loic Outputs CpE358/CS38 Summer 24 Copyriht 24 25
Typical Sequential Circuit Description by Equations x A B C A( t+ ) = x C( t) Bt ( + ) = At ( ) Ct ( + ) = Bt ( ) Clock CpE358/CS38 Summer 24 Copyriht 24 25
Typical Sequential Circuit Description by Table A Present B C Input X A Next B C Output x A B C Clock CpE358/CS38 Summer 24 Copyriht 24 252
CpE358/CS38 Summer 24 253 Copyriht 24 Typical Sequential Circuit Description by Table Clock A B C x C B A X C B A Output Next Input Present
CpE358/CS38 Summer 24 254 Copyriht 24 Typical Sequential Circuit Description by Table Clock A B C x C B A X C B A Output Next Input Present
Typical Sequential Circuit Description by Diaram x Clock A B C CpE358/CS38 Summer 24 Copyriht 24 255
Problem 57 Derive state equations, state table and state diaram Is this a Mealy or Moore machine? What unction does this sequential circuit perorm? x y A B C i Full Adder Σ C o S Clock CpE358/CS38 Summer 24 Copyriht 24 256
Problem 57 Derive state equations, state table and state diaram Is this a Mealy or Moore machine? What unction does this sequential circuit perorm? x y A B C i Full Adder Σ C o S Present C i (t) X Input Y Next C i (t+) Output S Clock CpE358/CS38 Summer 24 Copyriht 24 257
Problem 57 Derive state equations, state table and state diaram Is this a Mealy or Moore machine? What unction does this sequential circuit perorm? / x y A B C i Full Adder Σ C o S / / / / / Clock / CpE358/CS38 Summer 24 Copyriht 24 / 258
Problem 57 Derive state equations, state table and state diaram Is this a Mealy or Moore machine? What unction does this sequential circuit perorm? x y A B C i Full Adder Σ C o S C ( t+ ) = C ( t) = xy + xc ( t) + yc ( t) i o i i S = x y C i Clock CpE358/CS38 Summer 24 Copyriht 24 259
Problem 57 Derive state equations, state table and state diaram Is this a Mealy or Moore machine? What unction does this sequential circuit perorm? / x y A B C i Full Adder Σ C o S / / / / / Clock / CpE358/CS38 Summer 24 Copyriht 24 / 26
Problem 57 Derive state equations, state table and state diaram Is this a Mealy or Moore machine? What unction does this sequential circuit perorm? x y A B C i Full Adder Σ C o S. Assume initial state is 2. Assume x and y chane in sync with clock 3. Consider the input sequences: x = y = Clock CpE358/CS38 Summer 24 Copyriht 24 26
Problem 57 Derive state equations, state table and state diaram Is this a Mealy or Moore machine? What unction does this sequential circuit perorm? x y A B C i Full Adder Σ C o S. Assume initial state is 2. Assume x and y chane in sync with clock 3. Consider the input sequences: x = y = Present C i (t) Input X Y Next C i (t+) Output S C i x y S C o Clock CpE358/CS38 Summer 24 Copyriht 24 262
Problem 57 Derive state equations, state table and state diaram Is this a Mealy or Moore machine? What unction does this sequential circuit perorm? x y A B C i Full Adder Σ C o S. Assume initial state is 2. Assume x and y chane in sync with clock 3. Consider the input sequences: x = y = Present C i (t) Input X Y Next C i (t+) Output S C i x y S C o Clock S = CpE358/CS38 Summer 24 Copyriht 24 263
Problem 57 Derive state equations, state table and state diaram Is this a Mealy or Moore machine? What unction does this sequential circuit perorm? x y A B C i Full Adder Σ C o S. Assume initial state is 2. Assume x and y chane in sync with clock 3. Consider the input sequences: x = y = Notice: 8 + + 29 C i x y S C o Clock This is a Serial Adder Data is entered LSB irst S = CpE358/CS38 Summer 24 Copyriht 24 264
Another Analysis Example What unction does this circuit perorm? x J Q A J Q B J Q C K K K J A =x BC+xC K A =x B +xc J B =xa+x A C K B = xa +x C J C =x A B +xb K C =x A+xB CpE358/CS38 Summer 24 Copyriht 24 265
Another Analysis Example What unction does this circuit perorm? x J Q A J Q B J Q C K K K J A =x BC+xC K A =x B +xc J B =xa+x A C K B = xa +x C J C =x A B +xb K C = x A+xB CpE358/CS38 Summer 24 Copyriht 24 266
Another Analysis Example What unction does this circuit perorm? x J Q A J Q B J Q C K K K J A =x BC+xC K A =x B +xc J B =xa+x A C K B = xa +x C J C =x A B +xb K C = x A+xB Reconize these characteristics o a JK liplop: X X X X CpE358/CS38 Summer 24 Copyriht 24 267
Another Analysis Example What unction does this circuit perorm? J A =x BC+xC K A =x B +xc J B =xa+x A C K B = xa +x C J C =x A B +xb K C = x A+xB ABC X J A K A A t+ J B K B B t+ J C K C C t+ Next CpE358/CS38 Summer 24 Copyriht 24 268
Another Analysis Example What unction does this circuit perorm? Present Input Next /Output ABC X ABC (t+) J A =x BC+xC K A =x B +xc J B =xa+x A C K B = xa +x C J C =x A B +xb K C = x A+xB ABC X J A K A A t+ J B K B B t+ J C K C C t+ Next CpE358/CS38 Summer 24 Copyriht 24 269
Another Analysis Example What unction does this circuit perorm? CpE358/CS38 Summer 24 Copyriht 24 27
Another Analysis Example What unction does this circuit perorm? Consider that outputs are drivin LEDs: x= x= x= and S is or CpE358/CS38 Summer 24 Copyriht 24 27
Reduction Input sequence S I System X N liplops System Y M liplops Output sequence S OX Output sequence S OY S S OX OY = X( S ) = Y( S ) I I ( ) ( X Y) S X( S ) = Y( S ) I I I I M<N, Y is a statereduced version o X CpE358/CS38 Summer 24 Copyriht 24 272
Reduction I there is a System Y with ewer states than X that produces the same output as X, some o the states o X must be equivalent to each other. Y can be enerated by eliminatin all the equivalent states. I there are two states (B&C) that, iven the same startin state (A) and inputs, arrive in equivalent states with the same output, those states (B&C) are equivalent Input sequence S I System X 2 N states Output sequence S OX Input s o X ACD Output o X s o W 34 Output o W X A / X C / X D / X B / X E / ACE 35 ABD 34 ABE 35 s B and C are equivalent CpE358/CS38 Summer 24 Copyriht 24 273
Reduction I there is a System Y with ewer states than X that produces the same output as X, some o the states o X must be equivalent to each other. Y can be enerated by eliminatin all the equivalent states. I there are two states (B&C) that, iven the same startin state (A) and inputs, arrive in equivalent states with the same output, those states (B&C) are equivalent Input sequence S I System X 2 N states Output sequence S OX Input s o X ACD Output o X s o W 34 Output o W X A / X C / X D / X B / X E / ACE 35 ABD ABE 34 35 System W 2 N states Output sequence S OW, W / W 3 / W 4 / W 5 / CpE358/CS38 Summer 24 Copyriht 24 274
Reduction Problem 52 Reduce the number o states in this state table and tabulate the reduced state table: Present Next x= x= Output x= x= a a b b c d c e b d a e d c b c h h a e d h CpE358/CS38 Summer 24 Copyriht 24 275
Reduction Problem 52 Reduce the number o states in this state table and tabulate the reduced state table: Present Next x= x= x= Output x= a b b d c c e d a e d c b h h a Start by assumin all states are equivalent. Create a sinle equivalence set: {abcdeh} CpE358/CS38 Summer 24 Copyriht 24 276
Reduction Problem 52 Reduce the number o states in this state table and tabulate the reduced state table: Present Next x= x= x= Output x= a b b d c c e d a e d c b h h a Start by assumin all states are equivalent. Create a sinle equivalence set: {abcdeh} Without chanin states, apply inputs x= and x= to distinuish states: {abce} {dh} {} {} CpE358/CS38 Summer 24 Copyriht 24 277
Equivalence sets: {abce} {dh} {} {} Reduction Problem 52 Can {abce} be separated? Can {dh}? Consider the nextstates that ollow: Are they in separate sets? { dh} { } { dh} { a} {dh} cannot be separated Present a b c d e h Next x= d d x= b c e a c b h a Output x= x= { abce} { }{ d} { abce} { bce} {ac} {be} can be separated, since with a input, they o to distinct states (d and ) Equivalence sets: {ac} {be} {dh} {} {} CpE358/CS38 Summer 24 Copyriht 24 278
Reduction Problem 52 Equivalence sets: {ac} {be} {dh} {} {} Aain, consider the nextstates that ollow: Are they in separate sets { ac} { } { ac} { be} { be} { d} { be} { c} Present a b c d e h Next x= d d x= b c e a c b h a Output x= x= These sets cannot be separated, so the equivalence sets are: {ac} {be} {dh} {} {} CpE358/CS38 Summer 24 Copyriht 24 279
Reduction Problem 52 Equivalence sets: {ac} {be} {dh} {} {} The reduced state table is: a Present ac Next x= x= be x= Output x= b be dh ac C e c dh E d ac c e F G b dh d h H a Present Next x= x= Output x= x= a b b d a d a b d CpE358/CS38 Summer 24 Copyriht 24 28
Reduction Problem 52 The reduced state table is: Present Next x= x= x= Output x= a a b b d d a a b b d c 8 states required at least 3 FFs 5 states requires at least 3 FFs e d h CpE358/CS38 Summer 24 Copyriht 24 28
Implications o Reduction System B has N states System C has NK states (K>) Which is preerable? CpE358/CS38 Summer 24 Copyriht 24 282
Implications o Reduction System B has N states System C has NK states (K>) Which is preerable? B requires at least lo 2( N) liplops C requires at least lo 2( N K) liplops Is lo ( N K) < lo ( N)? 2 2 M Not unless ( N K) 2 < N Which requires more combinatorial loic? Possibly C. CpE358/CS38 Summer 24 Copyriht 24 283
Assinment Start with either symbolic names or binary numbers or states, dependin on task timer sinal sync LOS init wait acq stable LOS timeout sync timeout timer sinal sync LOS timeout sync timeout For N states, number o bits (FF s) needed is: B lo 2 N Look or state assinments that have meanin. E.., initial state xx not init xx sinal present xx sinal present CpE358/CS38 Summer 24 Copyriht 24 284
An Aside A Brie Discussion o Formal Lanuaes How does a computer understand what the ollowin means? loat inner_product(coe, values) { loat sum = ; or(index=;index<n;index++) { sum += *coe++ * *values++; } return(sum); } CpE358/CS38 Summer 24 Copyriht 24 285
Translatin Code into s and s Your_avorite_lanuae Parser Lexical Analyzer Optimizer Assembler Linker Loader Libraries Relocation parameters Code Generator Compiler CpE358/CS38 Summer 24 Copyriht 24 286
An Excerpt rom the Alol6 Formal Lanuae Speciication <diit> ::= 2 3 4 5 6 7 8 9 <letter> ::= a b c d e h x y z A B C D X Y Z <delimiter> ::= <operator> <separator> <bracket> <declarator> <speciicator> <identiier> ::= <letter> <identiier> <letter> <identiier> <diit> <procedure_identiier> ::= <identiier> <actual_parameter> ::= <strin> <expression> <array_identiier> <switch_identiier> <procedure_identiier>... CpE358/CS38 Summer 24 Copyriht 24 287
Finite Machines and Sequential Loic Reconize a strin o letters that ends with one or more space characters. Preceedin nonletter symbols are inored Initial state letter space space / / 2/ Not a letter Not a letter letter Not a letter The Finite Machine that reconizes Formal Lanuaes is described with the same state diaram we would use to desin a sequential circuit CpE358/CS38 Summer 24 Copyriht 24 288
Summary Fundamental concepts o diital systems (Mano Chapter ) Binary codes, number systems, and arithmetic (Ch ) Boolean alebra (Ch 2) Simpliication o switchin equations (Ch 3) Diital device characteristics (e.., TTL, CMOS)/desin considerations (Ch ) Combinatoric loical desin includin LSI implementation (Chapter 4) Fliplops and state memory elements (Ch 5) Sequential loic analysis and desin (Ch 5) Hazards, Races, and time related issues in diital desin (Ch 9) Synchronous vs. asynchronous desin (Ch 9) Counters, shit reister circuits (Ch 6) Memory and Prorammable loic (Ch 7) Minimization o sequential systems Introduction to Finite Automata CpE358/CS38 Summer 24 Copyriht 24 289
Homework 7 due in Class 9 As always, show all work Problems 52, 5 CpE358/CS38 Summer 24 Copyriht 24 29