TSHEET ISL88E/8E/8E/8E/8E/86E/88E ±kv ES, V, Full Fail-Safe, /8 Unit Load, S-8/S- Transceivers FN68 ev. February, 6 The ISL88xE are icmos, ES protected, V powered, single transceivers that meet both the S-8 and S- standards for balanced communication. Each driver output, and receiver input, is protected against ±kv ES strikes without latch-up, and unlike competitive products, this Intersil family is specified for % tolerance supplies (.V to.v). These devices have very low bus currents (+µ/-7µ), so they present a true /8 unit load to the S-8 bus. This allows up to 6 transceivers on the network without violating the S-8 specification s unit load maximum, and without using repeaters. For example, in a remote utility meter reading system, individual meter readings are routed to a concentrator via an S-8 network, so the high allowed node count minimizes the number of repeaters required. ata for all meters is then read out from the concentrator via a single access port, or a wireless link. eceiver (x) inputs feature a Full Fail-Safe design, which ensures a logic high x output if x inputs are floating, shorted, or terminated but undriven. The ISL88E, ISL88E, ISL88E, ISL88E, ISL88E utilize slew rate limited drivers which reduce EMI, and minimize reflections from improperly terminated transmission lines, or unterminated stubs in multidrop and multipoint applications. Slew rate limited versions also include receiver input filtering to enhance noise immunity in the presence of slow input signals. Hot Plug circuitry ensures that the Tx and x outputs remain in a high impedance state until the power supply has stabilized, and the Tx outputs are fully short circuit protected. The ISL88E, ISL88E, ISL88E, ISL886E are configured for full duplex (separate x input and Tx output pins) applications. The half duplex versions multiplex the x inputs and Tx outputs to allow transceivers with output disable functions in 8 Ld packages. Features Pb-Free vailable (ohs Compliant) S-8 I/O Pin ES Protection.......... ±kv HM Class ES Protection (HM) on all Pins........ >7kV Tiny MSOP Packages Save % oard Space Full Fail-Safe (Open, Short, Terminated and Floating) eceivers Hot Plug Circuitry (ISL88E, ISL88E, ISL88E, ISL88E) - Tx and x Outputs emain Three-state uring Power-up/Power-down True /8 Unit Load llows up to 6 evices on the us Specified for Single V, % Tolerance, Supplies High ata ates..................... up to Mbps Low Quiescent Supply Current............... µ Ultra Low Shutdown Supply Current............ 7n -7V to +V Common Mode Input Voltage ange Half and Full uplex Pinouts Three-State x and Tx Outputs (Except ISL88E) Current Limiting and Thermal Shutdown for driver Overload Protection pplications utomated Utility Meter eading Systems High Node Count Systems Factory utomation Field us Networks Security Camera Networks uilding Environmental Control Systems Industrial/Process Control Networks FN68 ev. Page of February, 6
ISL88E/8E/8E/8E/8E/86E/88E TLE. SUMM OF FETUS PT NUME HLF/FULL UPLEX T TE (Mbps) SLEW- TE LIMITE? HOT PLUG # EVICES ON US x/tx ENLE? QUIESCEN T I CC (µ) LOW POWE SHUTOWN? PIN COUNT ISL88E Full. es es 6 es es, ISL88E Half. es es 6 es es 8 ISL88E Full. es es 6 es es, ISL88E (No longer available or supported) Full. es No 6 No No 8 ISL88E Half. es es 6 es es 8 ISL886E Full No No 6 es es, ISL888E Half No No 6 es es 8 Pinouts ISL88E, ISL88E, ISL888E (8 L MSOP, SOIC) TOP VIEW ISL88E (8 L SOIC) TOP VIEW E 8 7 6 / / GN GN NO LONGE VILLE O SUPPOTE 8 7 6 ISL88E, ISL88E, ISL886E ( L MSOP) TOP VIEW ISL88E, ISL88E, ISL886E ( L SOIC) TOP VIEW E 9 8 NC NC 7 E GN 6 GN 6 9 GN 7 8 NC FN68 ev. Page of February, 6
ISL88E/8E/8E/8E/8E/86E/88E Ordering Information PT NUME (Note ) PT MKING TEMP. NGE ( C) PCKGE (ohs Compliant) PKG. WG. # ISL88EI (Note ) 88EI - to +8 Ld SOIC M. ISL88EIU (Note ) 8 - to +8 Ld MSOP M.8 ISL88EI (Note ) 88 EI - to +8 8 Ld SOIC M8. ISL88EIU (Note ) 8 - to +8 8 Ld MSOP M8.8 ISL88EI (Note ) 88EI - to +8 Ld SOIC M. ISL88EIU (Note ) 8 - to +8 Ld MSOP M.8 ISL88EI (Note ) (No longer available or supported, ecommended eplacements ISL88EI or ISL888EI) 88 EI - to +8 8 Ld SOIC M8. ISL88EI (Note ) 88 EI - to +8 8 Ld SOIC M8. ISL88EIU (Note ) 8 - to +8 8 Ld MSOP M8.8 ISL886EI (Note ) 886EI - to +8 Ld SOIC M. ISL886EIU (Note ) 86 - to +8 Ld MSOP M.8 ISL888EI (Note ) 888 EI - to +8 8 Ld SOIC M8. ISL888EIU (Note ) 88 - to +8 8 Ld MSOP M8.8 NOTES:. dd -T suffix for tape and reel. Please refer to T7 for details on reel specifications.. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and % matte tin plate plus anneal (e termination finish, which is ohs compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEEC J ST-. Truth Tables TNSMITTING INPUTS OUTPUTS E X X X High- High- X High- * High-* NOTE: *Shutdown Mode (See Notes and ). E Half uplex INPUTS CEIVING E Full uplex - OUTPUT X -.V X -.V X Inputs Open/Shorted X High-* X High- NOTE: *Shutdown Mode (See Notes and ). Pin escriptions PIN E FUNCTION eceiver output: If - -mv, is high; If - -mv, is low; = High if and are unconnected (floating) or shorted. eceiver output enable. is enabled when is low; is high impedance when is high. river output enable. The driver outputs, and, are enabled by bringing E high. They are high impedance when E is low. FN68 ev. Page of February, 6
ISL88E/8E/8E/8E/8E/86E/88E Pin escriptions (Continued) PIN GN / / NC river input. low on forces output low and output high. Similarly, a high on forces output high and output low. Ground connection. ±kv HM ES Protected S-8/S- level, noninverting receiver input and noninverting driver output. Pin is an input if E = ; pin is an output if E =. ±kv HM ES Protected S-8/S- level, Inverting receiver input and inverting driver output. Pin is an input if E = ; pin is an output if E =. ±kv HM ES Protected S-8/S- level, noninverting receiver input. ±kv HM ES Protected S-8/S- level, inverting receiver input. ±kv HM ES Protected S-8/S- level, noninverting driver output. ±kv HM ES Protected S-8/S- level, inverting driver output. System power supply input (.V to.v). No Connection. FUNCTION Typical Operating Circuit ISL88E, ISL88E, ISL888E +V 8 +.µf.µf + +V 8 E / / 7 6 T T 7 6 / / E GN GN FN68 ev. Page of February, 6
ISL88E/8E/8E/8E/8E/86E/88E Typical Operating Circuit (Continued) ISL88E, ISL88E, ISL886E +V +.µf.µf + +V E T 9 E GN 6, 7 9 T GN 6, 7 +V ISL88E +V +.µf.µf + 8 7 T 6 GN 6 T 7 8 GN FN68 ev. Page of February, 6
ISL88E/8E/8E/8E/8E/86E/88E bsolute Maximum atings to Ground....................................... 7V Input Voltages, E,......................... -.V to ( +.V) Input/Output Voltages,,,.................................. -9V to +V,,, (Transient Pulse Through, Note )...... ±7V............................... -.V to ( +.V) Short Circuit uration,....................................... Continuous ES ating......................... See Specification Table Thermal Information Thermal esistance (Typical, Note ) J ( C/W) 8 Ld SOIC Package......................... 8 Ld MSOP Package........................ Ld MSOP Package....................... 9 Ld SOIC Package........................ 8 Maximum Junction Temperature (Plastic Package)...... + C Maximum Storage Temperature ange..........-6 C to + C Pb-free reflow profile..........................see link below http://www.intersil.com/pbfree/pb-freeeflow.asp Operating Conditions Temperature ange..........................- C to +8 C CUTION: o not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. NOTE:. J is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech rief T79 for details. Electrical Specifications Test Conditions: =.V to.v; Unless Otherwise Specified. Typicals are at = V, T = + C (Note ). PMETE SMOL TEST CONTIONS TEMP ( C) MIN (Note ) TP MX (Note ) UNITS C CHCTEISTICS river ifferential V OUT (no load) V O Full - - V river ifferential V OUT (with load) V O L = (S-) (Figure ) Full.9 - V L = (S-8) (Figure ) Full.. V L = 6, -7V V CM V (Figure ) Full..6 - V Change in Magnitude of river ifferential V OUT for Complementary Output States V O L = or (Figure ) Full -.. V river Common-Mode V OUT V OC L = or (Figure ) Full -.8 V Change in Magnitude of river Common-Mode V OUT for Complementary Output States V OC L = or (Figure ) Full -.. V Logic Input High Voltage V IH E,, Full - - V Logic Input Low Voltage V IL E,, Full - -.8 V Input Hysteresis Voltage V HS - - mv Logic Input Current I IN E,, Full - - µ Input Current (, ) I IN E = V, = V or.v V IN = V Full - 7 µ V IN = -7V Full -7 - µ Output Leakage Current (, ) (Full uplex Versions Only) I IN = V, E = V, = V or.v (Note ) V IN = V Full - 7 µ V IN = -7V Full -7 - µ Output Leakage Current (, ) in Shutdown Mode (Full uplex) river Short-Circuit Current, V O = High or Low I IN =, E = V, = V or.v (Note ) V IN = V Full - µ V IN = -7V Full - 9 - µ I OS E =, -7V V or V V (Note 7) Full - - m FN68 ev. Page 6 of February, 6
ISL88E/8E/8E/8E/8E/86E/88E Electrical Specifications Test Conditions: =.V to.v; Unless Otherwise Specified. Typicals are at = V, T = + C (Note ). (Continued) PMETE SMOL TEST CONTIONS TEMP ( C) MIN (Note ) TP MX (Note ) UNITS eceiver ifferential Threshold Voltage V TH -7V V CM V Full - -9 - mv eceiver Input Hysteresis V TH V CM = V - - mv eceiver Output High Voltage V OH I O = -m, V I = -mv Full -.6 - V eceiver Output Low Voltage V OL I O = -m, V I = -mv Full -.. V Three-State (high impedance) eceiver Output Current I O.V V O.V (Note ) Full -. µ eceiver Input esistance IN -7V V CM V Full 96 6 - k eceiver Short-Circuit Current I OS V V O Full ±7 - ±8 m SUPPL CUNT No-Load Supply Current (Note 6) I CC Half uplex Versions, E =, = X, = V or Full - 6 7 µ ll Versions, E = V, = V, or Full uplex Full - 6 µ Versions, E =, = X. = V or Shutdown Supply Current I SHN E = V, =, = V or (Note ) Full -.7 µ ES PEFOMNCE S-8 Pins (,,, ) Human ody Model (HM), Pin to GN - ± - kv ll Other Pins HM, per MIL-ST-88 Method - ±7 - kv IVE SWITCHING CHCTEISTICS (kbps Versions; ISL88E, ISL88E) Machine Model - ± - V river ifferential Output elay t PLH, t PHL FF =, C L = pf (Figure ) Full 78 ns river ifferential Output Skew t SKEW FF =, C L = pf (Figure ) Full - ns river ifferential ise or Fall Time t, t F FF =, C L = pf (Figure ) Full 667 ns Maximum ata ate f MX C = 8pF (Figure ) (Note ) Full 666 - kbps river Enable to Output High t H L =, C L = pf, SW = GN (Figure ), (Note 8) river Enable to Output Low t L L =, C L = pf, SW = (Figure ) (Note 8) Full - 78 ns Full - ns river isable from Output Low t L L =, C L = pf, SW = (Figure ) Full - 67 ns river isable from Output High t H L =, C L = pf, SW = GN (Figure ) Full - 8 ns Time to Shutdown t SHN (Note ) Full 6 6 6 ns river Enable from Shutdown to Output High river Enable from Shutdown to Output Low t H(SHN) L =, C L = pf, SW = GN (Figure ) (Notes, ) t L(SHN) L =, C L = pf, SW = (Figure ) (Notes, ) Full - ns Full - ns IVE SWITCHING CHCTEISTICS (kbps Versions; ISL88E, ISL88E, ISL88E) river ifferential Output elay t PLH, t PHL FF =, C L = pf (Figure ) Full 6 ns river ifferential Output Skew t SKEW FF =, C L = pf (Figure ) Full - ns river ifferential ise or Fall Time t, t F FF =, C L = pf (Figure ) Full 7 7 ns Maximum ata ate f MX C = 8pF (Figure ) (Note ) Full - kbps FN68 ev. Page 7 of February, 6
ISL88E/8E/8E/8E/8E/86E/88E Electrical Specifications Test Conditions: =.V to.v; Unless Otherwise Specified. Typicals are at = V, T = + C (Note ). (Continued) PMETE SMOL TEST CONTIONS TEMP ( C) MIN (Note ) TP MX (Note ) UNITS river Enable to Output High t H L =, C L = pf, SW = GN (Figure ), (Notes 8, ) river Enable to Output Low t L L =, C L = pf, SW = (Figure ), (Notes 8, ) river isable from Output Low t L L =, C L = pf, SW = (Figure ), (Note ) river isable from Output High t H L =, C L = pf, SW = GN (Figure ), (Note ) Full - 7 ns Full - ns Full - 6 ns Full - 8 ns Time to Shutdown t SHN (Note ) Full 6 6 6 ns river Enable from Shutdown to Output High river Enable from Shutdown to Output Low t H(SHN) L =, C L = pf, SW = GN (Figure ), (Notes,, ) t L(SHN) L =, C L = pf, SW = (Figure ), (Notes,, ) Full - 6 ns Full - ns IVE SWITCHING CHCTEISTICS (Mbps Versions; ISL886E, ISL888E) river ifferential Output elay t PLH, t PHL FF =, C L = pf (Figure ) Full - 6 ns river ifferential Output Skew t SKEW FF =, C L = pf (Figure ) Full - ns river ifferential ise or Fall Time t, t F FF =, C L = pf (Figure ) Full - ns Maximum ata ate f MX C = 7pF (Figure ) (Note ) Full - Mbps river Enable to Output High t H L =, C L = pf, SW = GN (Figure ), (Note 8) river Enable to Output Low t L L =, C L = pf, SW = (Figure ), (Note 8) Full - ns Full - ns river isable from Output Low t L L =, C L = pf, SW = (Figure ) Full - 66 ns river isable from Output High t H L =, C L = pf, SW = GN (Figure ) Full - 8 ns Time to Shutdown t SHN (Note ) Full 6 6 6 ns river Enable from Shutdown to Output High river Enable from Shutdown to Output Low t H(SHN) L =, C L = pf, SW = GN (Figure ), (Notes, ) t L(SHN) L =, C L = pf, SW = (Figure ), (Notes, ) Full - ns Full - 8 ns CEIVE SWITCHING CHCTEISTICS (kbps and kbps Versions; ISL88E THU ISL88E) Maximum ata ate f MX (Figure ) (Note ) Full. - Mbps eceiver Input to Output elay t PLH, t PHL (Figure ) Full - ns eceiver Skew t PLH - t PHL t SK (Figure ) Full - 7 ns eceiver Enable to Output Low t L L = k, C L = pf, SW = (Figure 6), (Notes 9, ) eceiver Enable to Output High t H L = k, C L = pf, SW = GN (Figure 6), (Notes 9, ) eceiver isable from Output Low t L L = k, C L = pf, SW = (Figure 6), (Note ) eceiver isable from Output High t H L = k, C L = pf, SW = GN (Figure 6), (Note ) Full - ns Full - ns Full - ns Full - ns Time to Shutdown t SHN (Notes, ) Full 6 6 6 ns FN68 ev. Page 8 of February, 6
ISL88E/8E/8E/8E/8E/86E/88E Electrical Specifications Test Conditions: =.V to.v; Unless Otherwise Specified. Typicals are at = V, T = + C (Note ). (Continued) PMETE SMOL TEST CONTIONS TEMP ( C) MIN (Note ) TP MX (Note ) UNITS eceiver Enable from Shutdown to Output High eceiver Enable from Shutdown to Output Low t H(SHN) L = k, C L = pf, SW = GN (Figure 6), (Notes,, ) t L(SHN) L = k, C L = pf, SW = (Figure 6), (Notes,, ) Full - ns Full - ns CEIVE SWITCHING CHCTEISTICS (Mbps Versions; ISL886E, ISL888E) Maximum ata ate f MX (Figure ) (Note ) Full - Mbps eceiver Input to Output elay t PLH, t PHL (Figure ) Full - 7 ns eceiver Skew t PLH - t PHL t SK (Figure ) Full - ns eceiver Enable to Output Low t L L = k, C L = pf, SW = (Figure 6) (Note 9) eceiver Enable to Output High t H L = k, C L = pf, SW = GN (Figure 6) (Note 9) Full - ns Full - ns eceiver isable from Output Low t L L = k, C L = pf, SW = (Figure 6) Full - ns eceiver isable from Output High t H L = k, C L = pf, SW = GN (Figure 6) Full - ns Time to Shutdown t SHN (Note ) Full 6 6 6 ns eceiver Enable from Shutdown to Output High eceiver Enable from Shutdown to Output Low t H(SHN) L = k, C L = pf, SW = GN (Figure 6) (Notes, ) t L(SHN) L = k, C L = pf, SW = (Figure 6) (Notes, ) Full - ns Full - ns NOTES:. Parameters with MIN and/or MX limits are % tested at + C, unless otherwise specified. Temperature limits established by characterization and are not production tested.. ll currents into device pins are positive; all currents out of device pins are negative. ll voltages are referenced to device ground unless otherwise specified. 6. Supply current specification is valid for loaded drivers when E = V. 7. pplies to peak current. See Typical Performance Curves beginning on page for more information. 8. Keep = to prevent the device from entering SHN. 9. The signal high time must be short enough (typically <ns) to prevent the device from entering SHN.. Transceivers are put into shutdown by bringing high and E low. If the inputs are in this state for less than 6ns, the parts are guaranteed not to enter shutdown. If the inputs are in this state for at least 6ns, the parts are guaranteed to have entered shutdown. See Low Power Shutdown Mode on page.. Keep = VCC, and set the E signal low time >6ns to ensure that the device enters SHN.. Set the signal high time >6ns to ensure that the device enters SHN.. oes not apply to the ISL88E.. Tested according to TI/EI-8-, section..6 (±7V for µs at a % duty cycle).. Limits established by characterization and are not production tested. FN68 ev. Page 9 of February, 6
ISL88E/8E/8E/8E/8E/86E/88E Test Circuits and Waveforms E V O L / E V O L = 6 7 V CM -7V TO +V L / V OC 7 FIGU. V O N V OC FIGU. V O WITH COMMON MOE LO FIGU. C IVE TEST CICUITS.V.V V V E FF C L = pf C L = pf OUT () OUT () t PLH t PHL V OH V OL SIGNL GENETO FF OUT ( - ) 9% 9% % % +V O -V O t t F SKEW = t PLH - t PHL FIGU. TEST CICUIT FIGU. MESUMENT POINTS FIGU. IVE PPGTION EL N FFENTIL TNSITION TIMES SIGNL GENETO E SW GN PMETE OUTPUT SW C L (pf) t H / X / GN t L / X / t H / (Note 8) / GN t L / (Note 8) / C L E NOTE t H, t H(SHN) NOTES 8, OUT (, ) t L, t L(SHN) NOTES 8, OUT (, ).V.V t H OUTPUT HIGH.V t L.V OUTPUT LOW V V V OH -.V V OL +.V V OH V V OL t H(SHN) / (Note ) / GN t L(SHN) / (Note ) / FIGU. TEST CICUIT FIGU. MESUMENT POINTS FIGU. IVE ENLE N SLE TIMES (OES NOT PPL TO THE ISL88E) FN68 ev. Page of February, 6
ISL88E/8E/8E/8E/8E/86E/88E Test Circuits and Waveforms (Continued) E 6 C + V O - V V SIGNL GENETO FF OUT ( - ) -V O +V O V FIGU. TEST CICUIT FIGU. IVE T TE FIGU. MESUMENT POINTS V pf V V +.V -.V t PLH t PHL SIGNL GENETO.V.V V FIGU. TEST CICUIT FIGU. MESUMENT POINTS FIGU. CEIVE PPGTION EL N T TE SIGNL GENETO GN k pf SW GN NOTE.V.V V V PMETE E SW t H +.V GN t H, t H(SHN) NOTES 9, OUTPUT HIGH.V t H V OH -.V V OH V t L -.V t H (Note 9) +.V GN t L (Note 9) -.V t H(SHN) (Note ) +.V GN t L, t L(SHN) NOTES 9,.V OUTPUT LOW t L V OL +.V V OL t L(SHN) (Note ) -.V FIGU 6. TEST CICUIT FIGU 6. MESUMENT POINTS FIGU 6. CEIVE ENLE N SLE TIMES (OES NOT PPL TO THE ISL88E) pplication Information S-8 and S- are differential (balanced) data transmission standards for use in long haul or noisy environments. S- is a subset of S-8, so S-8 transceivers are also S- compliant. S- is a point-to-multipoint (multidrop) standard, which allows only one driver and up to (assuming one unit load devices) receivers on each bus. S-8 is a true multipoint standard, which allows up to one unit load devices (any combination of drivers and receivers) on each bus. To allow for multipoint operation, the S-8 specification requires that drivers must handle bus contention without sustaining any damage. FN68 ev. Page of February, 6
ISL88E/8E/8E/8E/8E/86E/88E nother important advantage of S-8 is the extended common mode range (CM), which specifies that the driver outputs and receiver inputs withstand signals that range from +V to -7V. S- and S-8 are intended for runs as long as, so the wide CM is necessary to handle ground potential differences, as well as voltages induced in the cable by external fields. eceiver Features These devices utilize a differential input receiver for maximum noise immunity and common mode rejection. Input sensitivity is ±mv, as required by the S- and S-8 specifications. eceiver input resistance of 96k surpasses the S- specification of k, and is eight times the S-8 Unit Load (UL) requirement of k minimum. Thus, these products are known as one-eighth UL transceivers, and there can be up to 6 of these devices on a network while still complying with the S-8 loading specification. eceiver inputs function with common mode voltages as great as ±7V outside the power supplies (i.e., +V and -7V), making them ideal for long networks where induced voltages are a realistic concern. ll the receivers include a full fail-safe function that guarantees a high level receiver output if the receiver inputs are unconnected (floating) or shorted. eceivers easily meet the data rates supported by the corresponding driver, and all receiver outputs are three-statable via the active low input (except for the ISL88E). river Features The S-8/S- driver is a differential output device that delivers at least.v across a load (S-8), and at least V across a load (S-). The drivers feature low propagation delay skew to maximize bit width, and to minimize EMI. ll drivers are three-statable via the active high E input (except for the ISL88E). The kbps and kbps driver outputs are slew rate limited to minimize EMI, and to minimize reflections in unterminated or improperly terminated networks. Outputs of the ISL886E, ISL888E drivers are not limited, so faster output transition times allow data rates of at least Mbps. Hot Plug Function When a piece of equipment powers up, there is a period of time where the processor or SIC driving the S-8 control lines (E, ) is unable to ensure that the S-8 Tx and x outputs are kept disabled. If the equipment is connected to the bus, a driver activating prematurely during power-up may crash the bus. To avoid this scenario, the ISL88, ISL88, ISL88, ISL88 versions incorporate a Hot Plug function. Circuitry monitoring ensures that, during power-up and power-down, the Tx and x outputs remain disabled, regardless of the state of E and, if is less than ~.V. This gives the processor/sic a chance to stabilize and drive the S-8 control lines to the proper states. IVE OUTPUT (V).. / FIGU 7. HOT PLUG PEFOMNCE (ISL88E) vs EVICE WITHOUT HOT PLUG CICUIT (ISL886E) ES Protection.V ISL88E ISL88E TIME (µs/v).v ll pins on these devices include class Human ody Model (HM) ES protection structures, but the S-8 pins (driver outputs and receiver inputs) incorporate advanced structures allowing them to survive ES events in excess of ±kv HM. The S-8 pins are particularly vulnerable to ES damage because they typically connect to an exposed port on the exterior of the finished product. Simply touching the port pins, or connecting a cable, can cause an ES event that might destroy unprotected ICs. These new ES structures protect the device whether or not it is powered up, protect without allowing any latchup mechanism to activate, and without degrading the S-8 common mode range of -7V to +V. This built-in ES protection eliminates the need for board level protection structures (e.g., transient suppression diodes), and the associated, undesirable capacitive load they present. ata ate, Cables, and Terminations = L = k L = k S-8/S- are intended for network lengths up to, but the maximum system data rate decreases as the transmission length increases. evices operating at Mbps are limited to lengths less than, while the kbps versions can operate at full data rates with lengths of several. Twisted pair is the cable of choice for S-8/S- networks. Twisted pair cables tend to pick up noise and other electromagnetically induced voltages as common mode signals, which are effectively rejected by the differential receivers in these ICs. Proper termination is imperative (when using the Mbps devices) to minimize reflections. Short networks using the.... (V) CEIVE OUTPUT (V) FN68 ev. Page of February, 6
ISL88E/8E/8E/8E/8E/86E/88E kbps versions need not be terminated, but, terminations are recommended unless power dissipation is an overriding concern. In point-to-point, or point-to-multipoint (single driver on bus) networks, the main cable should be terminated in its characteristic impedance (typically ) at the end farthest from the driver. In multi-receiver applications, stubs connecting receivers to the main cable should be kept as short as possible. Multipoint (multi-driver) systems require that the main cable be terminated in its characteristic impedance at both ends. Stubs connecting a transceiver to the main cable should be kept as short as possible. uilt-in river Overload Protection s stated previously, the S-8 specification requires that drivers survive worst case bus contentions undamaged. These devices meet this requirement via driver output short circuit current limits, and on-chip thermal shutdown circuitry. The driver output stages incorporate short circuit current limiting circuitry which ensures that the output current never exceeds the S-8 specification, even at the common mode voltage range extremes. dditionally, these devices utilize a foldback circuit which reduces the short circuit current, and thus the power dissipation, whenever the contending voltage exceeds either supply. In the event of a major short circuit condition, devices also include a thermal shutdown feature that disables the drivers whenever the die temperature becomes excessive. This eliminates the power dissipation, allowing the die to cool. The drivers automatically re-enable after the die temperature drops about + C. If the contention persists, the thermal shutdown/re-enable cycle repeats until the fault is cleared. eceivers stay operational during thermal shutdown. Low Power Shutdown Mode These CMOS transceivers all use a fraction of the power required by their bipolar counterparts, but they also include a shutdown feature (except for the ISL88E) that reduces the already low quiescent I CC to a 7n trickle. These devices enter shutdown whenever the receiver and driver are simultaneously disabled ( = and E = GN) for a period of at least 6ns. isabling both the driver and the receiver for less than 6ns guarantees that the transceiver will not enter shutdown. Note that receiver and driver enable times increase when the transceiver enables from shutdown. efer to Notes 8 thru, at the end of the Electrical Specification Table on page 9, for more information. Typical Performance Curves = V, T = + C; Unless Otherwise Specified 9. IVE OUTPUT CUNT (m) 8 7 6 FFENTIL OUTPUT VOLTGE (V)...8.6.. FF = FF = FFENTIL OUTPUT VOLTGE (V) FIGU 8. IVE OUTPUT CUNT vs FFENTIL OUTPUT VOLTGE. - - 7 8 TEMPETU ( C) FIGU 9. IVE FFENTIL OUTPUT VOLTGE vs TEMPETU FN68 ev. Page of February, 6
ISL88E/8E/8E/8E/8E/86E/88E Typical Performance Curves = V, T = + C; Unless Otherwise Specified (Continued) ISL886E/ISL888E 6 OUTPUT CUNT (m) - - O = LOW ISL88E thru ISL88E O = HIGH I CC (µ) HLF UPLEX, E =, = X HLF UPLEX, E = GN, = GN FULL UPLEX, E = X, = GN ISL88xE - -7-6 - - 6 8 OUTPUT VOLTGE (V) FIGU. IVE OUTPUT CUNT vs SHOT CICUIT VOLTGE 88 - - 7 8 TEMPETU ( C) FIGU. SUPPL CUNT vs TEMPETU 6 PPGTION EL (ns) 86 8 8 8 78 76 7 - - 7 8 TEMPETU ( C) t PHL t PLH FIGU. IVE FFENTIL PPGTION EL vs TEMPETU (ISL88E, ISL88E) SKEW (ns) CSS PT. OF N - CSS PT. OF N - - 7 8 TEMPETU ( C) FIGU. IVE FFENTIL SKEW vs TEMPETU (ISL88E, ISL88E) 7 PPGTION EL (ns) 9 8 7 6 t PHL t PLH SKEW (ns) 6 9 8 CSS PT. OF N - CSS PT. OF N - - 7 8 TEMPETU ( C) FIGU. IVE FFENTIL PPGTION EL vs TEMPETU (ISL88E, ISL88E, ISL88E) 7 - - 7 8 TEMPETU ( C) FIGU. IVE FFENTIL SKEW vs TEMPETU (ISL88E, ISL88E, ISL88E) FN68 ev. Page of February, 6
ISL88E/8E/8E/8E/8E/86E/88E Typical Performance Curves = V, T = + C; Unless Otherwise Specified (Continued).7 PPGTION EL (ns) 9 8 7 6 t PHL t PLH SKEW (ns).6.6. - - 7 8 TEMPETU ( C) FIGU 6. IVE FFENTIL PPGTION EL vs TEMPETU (ISL886E, ISL888E) CSS PT. OF N - CSS PT. OF N. - - 7 8 TEMPETU ( C) FIGU 7. IVE FFENTIL SKEW vs TEMPETU (ISL886E, ISL888E) CEIVE OUTPUT (V) FF =, C L = pf IVE INPUT (V) CEIVE OUTPUT (V) FF =, C L = pf IVE INPUT (V) IVE OUTPUT (V) / / TIME (ns/v) FIGU 8. IVE N CEIVE WVEFOMS, LOW TO HIGH (ISL88E, ISL88E) IVE OUTPUT (V) / / TIME (ns/v) FIGU 9. IVE N CEIVE WVEFOMS, HIGH TO LOW (ISL88E, ISL88E) CEIVE OUTPUT (V) FF =, C L = pf IVE INPUT (V) CEIVE OUTPUT (V) FF =, C L = pf IVE INPUT (V) IVE OUTPUT (V) / / TIME (ns/v) FIGU. IVE N CEIVE WVEFOMS, LOW TO HIGH (ISL88E, ISL88E, ISL88E) IVE OUTPUT (V) / / TIME (ns/v) FIGU. IVE N CEIVE WVEFOMS, HIGH TO LOW (ISL88E, ISL88E, ISL88E) FN68 ev. Page of February, 6
ISL88E/8E/8E/8E/8E/86E/88E Typical Performance Curves = V, T = + C; Unless Otherwise Specified (Continued) CEIVE OUTPUT (V) FF =, C L = pf IVE INPUT (V) CEIVE OUTPUT (V) FF =, C L = pf IVE INPUT (V) IVE OUTPUT (V) / / TIME (ns/v) FIGU. IVE N CEIVE WVEFOMS, LOW TO HIGH (ISL886E, ISL888E) IVE OUTPUT (V) / / TIME (ns/v) FIGU. IVE N CEIVE WVEFOMS, HIGH TO LOW (ISL886E, ISL888E) CEIVE OUTPUT CUNT (m) V OL, + C V OH, + C V OH, +8 C CEIVE OUTPUT VOLTGE (V) V OL, +8 C FIGU. CEIVE OUTPUT CUNT vs CEIVE OUTPUT VOLTGE ie Characteristics SUSTTE POTENTIL (POWE UP): GN TNSISTO COUNT: PCESS: Si Gate icmos FN68 ev. Page 6 of February, 6
ISL88E/8E/8E/8E/8E/86E/88E evision History The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to the web to make sure that you have the latest revision. TE VISION CHNGE February, 6 FN68. dded ev History and bout Intersil verbiage. Updated Ordering Information on page. Updated PO M8.8 to current version with following changes: Updated to new Intersil format by adding land pattern and moving dimensions from table onto drawing Corrected lead width dimension in side view from. -.6" to. -.6" Updated PO M.8 to current version with following change: Updated to new PO template. dded land pattern Updated PO M. to current version with following change: dded land pattern and moved dimensions from table onto drawing. Updated PO M8. to current version with following changes: Updated to new PO format by removing table and moving dimensions onto drawing and adding land pattern. Changed in Typical ecommended Land Pattern the following:.(.9) to.(.87).76 (.) to.6(.). to.(.) Changed Note 98 to 99 bout Intersil Intersil Corporation is a leading provider of innovative power management and precision analog solutions. The company's products address some of the largest markets within the industrial and infrastructure, mobile computing and high-end consumer markets. For the most updated datasheet, application notes, related documentation and related parts, please see the respective product information page found at www.intersil.com. ou may report errors or suggestions for improving this datasheet by visiting www.intersil.com/ask. eliability reports are also available from our website at www.intersil.com/support. Copyright Intersil mericas LLC -6. ll ights eserved. ll trademarks and registered trademarks are the property of their respective owners. For additional products, see www.intersil.com/en/products.html Intersil products are manufactured, assembled and tested utilizing ISO9 quality systems as noted in the quality certifications found at www.intersil.com/en/support/qualandreliability.html Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. ccordingly, the reader is cautioned to verify that datasheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com FN68 ev. Page 7 of February, 6
ISL88E/8E/8E/8E/8E/86E/88E Package Outline rawing M8.8 8 LE MINI SMLL OUTLINE PLSTIC PCKGE ev, 7/.±. 8 ETIL "X". MX SIE VIEW.9 -..±..9±. PIN# I.9 F.6 SC TOP VIEW GUGE PLNE. H.8± C. ±. ETIL "X" ± SETING PLNE. -.6.8 M C -. ±.. C SIE VIEW (.8) (.) (.) NOTES:. imensions are in millimeters. (.6) (.)... imensioning and tolerancing conform to JEEC MO-87- and MSE.m-99. Plastic or metal protrusions of.mm max per side are not included. Plastic interlead protrusions of.mm max per side are not included. (.). imensions are measured at atum Plane "H". TPICL COMMENE LN PTTEN 6. imensions in ( ) are for reference only. FN68 ev. Page 8 of February, 6
ISL88E/8E/8E/8E/8E/86E/88E Package Outline rawing M.8 LE MINI SMLL OUTLINE PLSTIC PCKGE ev, /.±. ETIL "X". MX SIE VIEW.9 -..±..9±. PIN# I.9 F. SC TOP VIEW GUGE PLNE. H.8± C. ±. ETIL "X" ± SETING PLNE.8 -.7.8 M C -. ±.. C SIE VIEW (.8) (.) (.) NOTES:. imensions are in millimeters. (.)... imensioning and tolerancing conform to JEEC MO-87- and MSE.m-99. Plastic or metal protrusions of.mm max per side are not included. Plastic interlead protrusions of.mm max per side are not included. (.9). imensions are measured at atum Plane "H". (.) TPICL COMMENE LN PTTEN 6. imensions in ( ) are for reference only. FN68 ev. Page 9 of February, 6
ISL88E/8E/8E/8E/8E/86E/88E Package Outline rawing M. LE NW O SMLL OUTLINE PLSTIC PCKGE ev, /9 8.6. C - X 6 8 ETIL"".±..9 6.. C X PIN NO. I MK.-..MC- 6 7. C X (.) x ± TOP VIEW. C.7 MX. MIN H.7.-.. GUGE PLNE C SETING PLNE. C SIE VIEW ETIL "" (.7) (.6) (.) (.) NOTES:. imensions are in millimeters. imensions in ( ) for eference Only.. imensioning and tolerancing conform to MSE.m-99.. atums and to be determined at atum H.. imension does not include interlead flash or protrusions. Interlead flash or protrusions shall not exceed.mm per side.. The pin # indentifier may be either a mold or mark feature. 6. oes not include dambar protrusion. llowable dambar protrusion shall be.mm total in excess of lead width at maximum condition. 7. eference to JEEC MS--. TPICL COMMENE LN PTTEN FN68 ev. Page of February, 6
ISL88E/8E/8E/8E/8E/86E/88E Package Outline rawing M8. 8 LE NW O SMLL OUTLINE PLSTIC PCKGE ev, / ETIL "".7 (.). (.6) INEX. (.7).8 (.) 6. (.).8 (.8). (.). (.) x TOP VIEW 8 SIE VIEW. (.).9 (.8). (.87) SETING PLNE 8. (.97).8 (.89).7 (.69). (.) 7.6 (.).7 (.) 6 -C-.7 (.).(.).(.).(.).(.).(.) SIE VIEW TPICL COMMENE LN PTTEN NOTES:. imensioning and tolerancing per NSI.M-99.. Package length does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed.mm (.6 inch) per side.. Package width does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed.mm (. inch) per side.. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area.. Terminal numbers are shown for reference only. 6. The lead width as measured.6mm (. inch) or greater above the seating plane, shall not exceed a maximum value of.6mm (. inch). 7. Controlling dimension: MILLIMETE. Converted inch dimensions are not necessarily exact. 8. This outline conforms to JEEC publication MS-- ISSUE C. FN68 ev. Page of February, 6