9 Th Network Theorems 9.1 NTRODUCTON This chpter will introduce the importnt fundmentl theorems of network nlysis. ncluded re the superposition, Thévenin s, Norton s, mximum power trnsfer, sustitution, Millmn s, nd reciprocity theorems. We will consider numer of res of ppliction for ech. A thorough understnding of ech theorem is importnt ecuse numer of the theorems will e pplied repetedly in the mteril to follow. 9.2 SUPRPOSTON THORM The superposition theorem, like the methods of the lst chpter, cn e used to find the solution to networks with two or more sources tht re not in series or prllel. The most ovious dvntge of this method is tht it does not require the use of mthemticl technique such s determinnts to find the required voltges or currents. nsted, ech source is treted independently, nd the lgeric sum is found to determine prticulr unknown quntity of the network. The superposition theorem sttes the following: The current through, or voltge cross, n element in liner ilterl network is equl to the lgeric sum of the currents or voltges produced independently y ech source. When one is pplying the theorem, it is possile to consider the effects of two sources t the sme time nd reduce the numer of networks tht hve to e nlyzed, ut, in generl, Numer of networks Numer of to e nlyzed independent sources (9.1) To consider the effects of ech source independently requires tht sources e removed nd replced without ffecting the finl result. To
322 NTWORK THORMS Th remove voltge source when pplying this theorem, the difference in potentil etween the terminls of the voltge source must e set to zero (short circuit); removing current source requires tht its terminls e opened (open circuit). Any internl resistnce or conductnce ssocited with the displced sources is not eliminted ut must still e considered. Figure 9.1 reviews the vrious sustitutions required when removing n idel source, nd Figure 9.2 reviews the sustitutions with prcticl sources tht hve n internl resistnce. FG. 9.1 Removing the effects of idel sources. R int R int R int R int FG. 9.2 Removing the effects of prcticl sources. 1 R 2 R T R The totl current through ny portion of the network is equl to the lgeric sum of the currents produced independently y ech source. Tht is, for two-source network, if the current produced y one source is in one direction, while tht produced y the other is in the opposite direction through the sme resistor, the resulting current is the difference of the two nd hs the direction of the lrger. f the individul currents re in the sme direction, the resulting current is the sum of two in the direction of either current. This rule holds true for the voltge cross portion of network s determined y polrities, nd it cn e extended to networks with ny numer of sources. The superposition principle is not pplicle to power effects since the power loss in resistor vries s the squre (nonliner) of the current or voltge. For instnce, the current through the resistor R of Fig. 9.3() is 1 due to one source of two-source network. The current through the sme resistor due to the other source is 2 s shown in Fig. 9.3(). Applying the superposition theorem, the totl current through the resistor due to oth sources is T,sshown in Fig. 9.3(c) with P 1 = 1 2 R () P 2 = 2 2 R () P T = T 2 R (c) FG. 9.3 Demonstrtion of the fct tht superposition is not pplicle to power effects. T 1 2 The power delivered to the resistor in Fig. 9.3() is P 1 2 1R while the power delivered to the sme resistor in Fig. 9.3() is P 2 2 2R f we ssume tht the totl power delivered in Fig. 9.3(c) cn e otined y simply dding the power delivered due to ech source, we find tht or 2 T 2 1 2 2 P T P 1 P 2 2 1R 2 2R 2 T R
Th SUPRPOSTON THORM 323 This finl reltionship etween current levels is incorrect, however, s cn e demonstrted y tking the totl current determined y the superposition theorem nd squring it s follows: 2 T ( 1 2 ) 2 2 1 2 2 2 1 2 which is certinly different from the expression otined from the ddition of power levels. n generl, therefore, the totl power delivered to resistive element must e determined using the totl current through or the totl voltge cross the element nd cnnot e determined y simple sum of the power levels estlished y ech source. XAMPL 9.1 Determine 1 for the network of Fig. 9.4. 1 Solution: Setting 0 V for the network of Fig. 9.4 results in the network of Fig. 9.5(), where short-circuit equivlent hs replced the 30-V source. 30 V 3 A 3 A 1 1 30 V FG. 9.4 xmple 9.1. () () FG. 9.5 () The contriution of to 1 ; () the contriution of to 1. As shown in Fig. 9.5(), the source current will choose the shortcircuit pth, nd 1 0 A. f we pplied the current divider rule, R sc (0 ) 1 0 A Rsc 0 Setting to zero mperes will result in the network of Fig. 9.5(), with the current source replced y n open circuit. Applying Ohm s lw, 30 V 1 5 A R1 Since 1 nd 1 hve the sme defined direction in Fig. 9.5() nd (), the current 1 is the sum of the two, nd 1 1 1 0 A 5 A 5 A Note in this cse tht the current source hs no effect on the current through the 6- resistor. The voltge cross the resistor must e fixed t 30 V ecuse they re prllel elements.
324 NTWORK THORMS Th XAMPL 9.2 Using superposition, determine the current through the 4- resistor of Fig. 9.6. Note tht this is two-source network of the type considered in Chpter 8. 2 1 54 V 12 2 48 V Solution: Considering the effects of 54-V source (Fig. 9.7): R T 212 23 27 1 54 V 2 A RT 27 FG. 9.6 xmple 9.2. 3 1 2 54 V 12 48-V ttery replced y short circuit 1 R T 54 V 2 12 3 3 = 3 FG. 9.7 The effect of 1 on the current 3. Using the current divider rule, (12 )(2 A) 24 A 3 1.5 A R2 12 16 Considering the effects of the 48-V source (Fig. 9.8): R T 2 12 8 12 2 48 V 3 4 A RT 12 2 12 3 2 48 V 2 12 3 R T 2 48 V 54-V ttery replced y short circuit 8 FG. 9.8 The effect of 2 on the current 3.
Th SUPRPOSTON THORM 325 The totl current through the 4- resistor (Fig. 9.9) is 3 3 3 4 A 1.5 A 2.5 A (direction of 3 ) XAMPL 9.3. Using superposition, find the current through the 6- resistor of the network of Fig. 9.10. ' 3 = 1.5 A " 3 = 4 A FG. 9.9 The resultnt current for 3. 36 V 12 2 9 A FG. 9.10 xmple 9.3.. Demonstrte tht superposition is not pplicle to power levels. Solutions:. Considering the effect of the 36-V source (Fig. 9.11): 36 V 2 2 A RT R1 12 Considering the effect of the 9-A source (Fig. 9.12): Applying the current divider rule, (12 )(9 A) 108 A 2 6 A R1 12 18 The totl current through the 6- resistor (Fig. 9.13) is 2 2 2 2 A 6 A 8 A 36 V 12 2 Current source replced y open circuit FG. 9.11 The contriution of to 2. 2 = 2 A 2 = 6 A 2 = 8 A 12 2 = 9 A Sme direction FG. 9.13 The resultnt current for 2.. The power to the 6- resistor is Power 2 R (8 A) 2 () 384 W The clculted power to the 6- resistor due to ech source, misusing the principle of superposition, is P 1 ( 2 ) 2 R (2 A) 2 () 24 W P 2 ( 2 ) 2 R (6 A) 2 () 216 W P 1 P 2 240 W 384 W FG. 9.12 The contriution of to 2.
326 NTWORK THORMS Th This results ecuse 2 A 6 A 8 A, ut (2 A) 2 (6 A) 2 (8 A) 2 As mentioned previously, the superposition principle is not pplicle to power effects since power is proportionl to the squre of the current or voltge ( 2 R or V 2 /R). Figure 9.14 is plot of the power delivered to the 6- resistor versus current. 400 P (W) 300 200 z 100 y Nonliner curve x{ 0 1 2 3 4 5 6 7 8 6Ω (A) FG. 9.14 Plotting the power delivered to the 6- resistor versus current through the resistor. Oviously, x y z, or 24 W 216 W 384 W, nd superposition does not hold. However, for liner reltionship, such s tht etween the voltge nd current of the fixed-type 6- resistor, superposition cn e pplied, s demonstrted y the grph of Fig. 9.15, where c, or 2 A 6 A 8 A. 6 ma 6 k 14 k 9 V R 4 2 12 k 35 k 10 9 8 7 6 5 4 3 2 1 0 (A) c Liner curve 12 24 36 48 V 6Ω (V) FG. 9.15 Plotting versus V for the 6- resistor. XAMPL 9.4 Using the principle of superposition, find the current 2 through the 12-k resistor of Fig. 9.16. FG. 9.16 xmple 9.4. Solution: 9.17): Considering the effect of the 6-mA current source (Fig.
Th SUPRPOSTON THORM 327 6 ma 6 ma 2 2 6 k 12 k 6 k 12 k 6 ma 6 ma 14 k R 4 35 k 14 k R 4 35 k FG. 9.17 The effect of the current source on the current 2. Current divider rule: (6 k)(6 ma) 2 2 ma R1 6 k12 k Considering the effect of the 9-V voltge source (Fig. 9.18): 9 V 2 0.5 ma R1 6 k12 k 9 V 2 2 6 k 12 k 6 k 9 V 12 k 9 V 14 k R 4 35 k R 4 14 k 35 k 9 V FG. 9.18 The effect of the voltge source on the current 2. Since 2 nd 2 hve the sme direction through, the desired current is the sum of the two: 1 2 2 2 2 ma 0.5 ma 2.5 ma 2 12 V 3 A 6 V 2 XAMPL 9.5 Find the current through the 2- resistor of the network of Fig. 9.19. The presence of three sources will result in three different networks to e nlyzed. 1 FG. 9.19 xmple 9.5.
328 NTWORK THORMS Th Solution: Considering the effect of the 12-V source (Fig. 9.20): 2 1 12 V 1 1 1 FG. 9.20 The effect of 1 on the current. 1 12 V 12 V 1 2 A R1 2 Considering the effect of the 6-V source (Fig. 9.21): 2 6 V 6 V 1 1 A R1 2 1 Considering the effect of the 3-A source (Fig. 9.22): Applying the current divider rule, 2 1 1 6 V 2 ()(3 A) 12 A 1 2 A R1 2 6 FG. 9.21 The effect of 2 on the current 1. 2 3 A 1 The totl current through the 2- resistor ppers in Fig. 9.23, nd 1 Sme direction s 1 in Fig. 9.19 Opposite direction to 1 in Fig. 9.19 1 " 1 " ' 1 ' 1 1A 2A 2A 1A FG. 9.22 The effect of on the current 1. 2 1 = 2 A 1 = 1 A 1 = 2 A 2 1 = 1 A FG. 9.23 The resultnt current 1. Th R Th FG. 9.24 Thévenin equivlent circuit. 9.3 TH VNN S THORM Thévenin s theorem sttes the following: Any two-terminl, liner ilterl dc network cn e replced y n equivlent circuit consisting of voltge source nd series resistor, s shown in Fig. 9.24. n Fig. 9.25(), for exmple, the network within the continer hs only two terminls ville to the outside world, leled nd. t is possile using Thévenin s theorem to replce everything in the continer with one source nd one resistor, s shown in Fig. 9.25(), nd mintin the sme terminl chrcteristics t terminls nd. Tht is, ny lod connected to terminls nd will not know whether it is hooked up to the network of Fig. 9.25() or Fig. 9.25(). The lod will receive the sme current, voltge, nd power from either configurtion of Fig. 9.25. Throughout the discussion to follow, however, lwys keep in mind tht the Thévenin equivlent circuit provides n equivlence t the terminls only the internl construction nd chrcteristics of the originl network nd the Thévenin equivlent re usully quite different.
Th THÉVNN S THORM 329 1 12 V () 4 V 2 10 8 V () FG. 9.25 The effect of pplying Thévenin s theorem. For the network of Fig. 9.25(), the Thévenin equivlent circuit cn e found quite directly y simply comining the series tteries nd resistors. Note the exct similrity of the network of Fig. 9.25() to the Thévenin configurtion of Fig. 9.24. The method descried elow will llow us to extend the procedure just pplied to more complex configurtions nd still end up with the reltively simple network of Fig. 9.24. n most cses, other elements will e connected to the right of terminls nd in Fig. 9.25. To pply the theorem, however, the network to e reduced to the Thévenin equivlent form must e isolted s shown in Fig. 9.25, nd the two holding terminls identified. Once the proper Thévenin equivlent circuit hs een determined, the voltge, current, or resistnce redings etween the two holding terminls will e the sme whether the originl or the Thévenin equivlent circuit is connected to the left of terminls nd in Fig. 9.25. Any lod connected to the right of terminls nd of Fig. 9.25 will receive the sme voltge or current with either network. This theorem chieves two importnt ojectives. First, s ws true for ll the methods previously descried, it llows us to find ny prticulr voltge or current in liner network with one, two, or ny other numer of sources. Second, we cn concentrte on specific portion of network y replcing the remining network with n equivlent circuit. n Fig. 9.26, for exmple, y finding the Thévenin equivlent circuit for the network in the shded re, we cn quickly clculte the chnge in current through or voltge cross the vrile resistor for the vrious vlues tht it my ssume. This is demonstrted in xmple 9.6. French (Meux, Pris) (18571927) Telegrph ngineer, Commndnt nd ductor École Polytechnique nd École Supérieure de Télégrphie Courtesy of the Biliothèque École Polytechnique, Pris, Frnce Although ctive in the study nd design of telegrphic systems (including underground trnsmission), cylindricl condensers (cpcitors), nd electromgnetism, he is est known for theorem first presented in the French Journl of Physics Theory nd Applictions in 1883. t ppered under the heding of Sur un nouveu théorème d électricité dynmique ( On new theorem of dynmic electricity ) nd ws originlly referred to s the equivlent genertor theorem. There is some evidence tht similr theorem ws introduced y Hermnn von Helmholtz in 1853. However, Professor Helmholtz pplied the theorem to niml physiology nd not to communiction or genertor systems, nd therefore he hs not received the credit in this field tht he might deserve. n the erly 1920s AT&T did some pioneering work using the equivlent circuit nd my hve initited the reference to the theorem s simply Thévenin s theorem. n fct, dwrd L. Norton, n engineer t AT&T t the time, introduced current source equivlent of the Thévenin equivlent currently referred to s the Norton equivlent circuit. As n side, Commndnt Thévenin ws n vid skier nd in fct ws commissioner of n interntionl ski competition in Chmonix, Frnce, in 1912. LON-CHARLS THÉVNN L R Th L Th () () FG. 9.26 Sustituting the Thévenin equivlent circuit for complex network.
330 NTWORK THORMS Th 1 3 1 9 V 3 9 V FG. 9.27 xmple 9.6. FG. 9.28 dentifying the terminls of prticulr importnce when pplying Thévenin s theorem. Before we exmine the steps involved in pplying this theorem, it is importnt tht n dditionl word e included here to ensure tht the implictions of the Thévenin equivlent circuit re cler. n Fig. 9.26, the entire network, except,istoereplced y single series resistor nd ttery s shown in Fig. 9.24. The vlues of these two elements of the Thévenin equivlent circuit must e chosen to ensure tht the resistor will rect to the network of Fig. 9.26() in the sme mnner s to the network of Fig. 9.26(). n other words, the current through or voltge cross must e the sme for either network for ny vlue of. The following sequence of steps will led to the proper vlue of R Th nd Th. Preliminry: 1. Remove tht portion of the network cross which the Thévenin equivlent circuit is to e found. n Fig. 9.26(), this requires tht the lod resistor e temporrily removed from the network. 2. Mrk the terminls of the remining two-terminl network. (The importnce of this step will ecome ovious s we progress through some complex networks.) R Th : 3. Clculte R Th y first setting ll sources to zero (voltge sources re replced y short circuits, nd current sources y open circuits) nd then finding the resultnt resistnce etween the two mrked terminls. (f the internl resistnce of the voltge nd/or current sources is included in the originl network, it must remin when the sources re set to zero.) Th : 4. Clculte Th y first returning ll sources to their originl position nd finding the open-circuit voltge etween the mrked terminls. (This step is invrily the one tht will led to the most confusion nd errors. n ll cses, keep in mind tht it is the open-circuit potentil etween the two terminls mrked in step 2.) Conclusion: 5. Drw the Thévenin equivlent circuit with the portion of the circuit previously removed replced etween the terminls of the equivlent circuit. This step is indicted y the plcement of the resistor etween the terminls of the Thévenin equivlent circuit s shown in Fig. 9.26(). XAMPL 9.6 Find the Thévenin equivlent circuit for the network in the shded re of the network of Fig. 9.27. Then find the current through for vlues of 2, 10, nd 100. Solution: Steps 1 nd 2 produce the network of Fig. 9.28. Note tht the lod resistor hs een removed nd the two holding terminls hve een defined s nd. Step 3: Replcing the voltge source 1 with short-circuit equivlent yields the network of Fig. 9.29(), where R Th (3 )() 3 2
Th THÉVNN S THORM 331 3 R Th () () FG. 9.29 Determining R Th for the network of Fig. 9.28. The importnce of the two mrked terminls now egins to surfce. They re the two terminls cross which the Thévenin resistnce is mesured. t is no longer the totl resistnce s seen y the source, s determined in the mjority of prolems of Chpter 7. f some difficulty develops when determining R Th with regrd to whether the resistive elements re in series or prllel, consider reclling tht the ohmmeter sends out trickle current into resistive comintion nd senses the level of the resulting voltge to estlish the mesured resistnce level. n Fig. 9.29(), the trickle current of the ohmmeter pproches the network through terminl, nd when it reches the junction of nd, it splits s shown. The fct tht the trickle current splits nd then recomines t the lower node revels tht the resistors re in prllel s fr s the ohmmeter reding is concerned. n essence, the pth of the sensing current of the ohmmeter hs reveled how the resistors re connected to the two terminls of interest nd how the Thévenin resistnce should e determined. Keep the ove in mind s you work through the vrious exmples of this section. Step 4: Replce the voltge source (Fig. 9.30). For this cse, the opencircuit voltge Th is the sme s the voltge drop cross the 6- resistor. Applying the voltge divider rule, 1 ()(9 V) 54 V Th 6 V R2 3 9 t is prticulrly importnt to recognize tht Th is the open-circuit potentil etween points nd. Rememer tht n open circuit cn hve ny voltge cross it, ut the current must e zero. n fct, the current through ny element in series with the open circuit must e zero lso. The use of voltmeter to mesure Th ppers in Fig. 9.31. Note tht it is plced directly cross the resistor since Th nd V R2 re in prllel. Step 5 (Fig. 9.32): Th L RTh 6 V 2 : L 1.5 A 2 2 6 V 10 : L 0.5 A 2 10 6 V 100 : L 0.059 A 2 100 1 3 9 V Th FG. 9.30 Determining Th for the network of Fig. 9.28. 1 9 V 3 Th FG. 9.31 Mesuring Th for the network of Fig. 9.28. Th = 6 V R Th = 2 L FG. 9.32 Sustituting the Thévenin equivlent circuit for the network externl to in Fig. 9.27.
332 NTWORK THORMS Th = 12 A 12 A 2 FG. 9.34 stlishing the terminls of prticulr interest for the network of Fig. 9.33. 2 2 FG. 9.33 xmple 9.7. 7 f Thévenin s theorem were unville, ech chnge in would require tht the entire network of Fig. 9.27 e reexmined to find the new vlue of. XAMPL 9.7 Find the Thévenin equivlent circuit for the network in the shded re of the network of Fig. 9.33. Solution: Steps 1 nd 2 re shown in Fig. 9.34. Step 3 is shown in Fig. 9.35. The current source hs een replced with n open-circuit equivlent, nd the resistnce determined etween terminls nd. n this cse n ohmmeter connected etween terminls nd would send out sensing current tht would flow directly through nd (t the sme level). The result is tht nd re in series nd the Thévenin resistnce is the sum of the two. R Th 2 Step 4 (Fig. 9.36): n this cse, since n open circuit exists etween the two mrked terminls, the current is zero etween these terminls nd through the 2- resistor. The voltge drop cross is, therefore, V 2 2 (0) 0 V nd Th V 1 1 (12 A)() 48 V R Th V 2 = 0 V = 2 = 0 FG. 9.35 Determining R Th for the network of Fig. 9.34. = 12 A Th FG. 9.36 Determining Th for the network of Fig. 9.34. Step 5 is shown in Fig. 9.37. R Th = Th = 48 V 7 FG. 9.37 Sustituting the Thévenin equivlent circuit in the network externl to the resistor of Fig. 9.33. XAMPL 9.8 Find the Thévenin equivlent circuit for the network in the shded re of the network of Fig. 9.38. Note in this exmple tht
Th THÉVNN S THORM 333 R 4 3 1 8 V 2 FG. 9.38 xmple 9.8. there is no need for the section of the network to e preserved to e t the end of the configurtion. Solution: Steps 1 nd 2: See Fig. 9.39. 1 8 V 2 FG. 9.39 dentifying the terminls of prticulr interest for the network of Fig. 9.38. Step 3: See Fig. 9.40. Steps 1 nd 2 re reltively esy to pply, ut now we must e creful to hold onto the terminls nd s the Thévenin resistnce nd voltge re determined. n Fig. 9.40, ll the remining elements turn out to e in prllel, nd the network cn e redrwn s shown. ()() 2 10 R Th 2. Circuit redrwn: R Th 2 R Th Short circuited R T = 0 2 = 0 FG. 9.40 Determining R Th for the network of Fig. 9.39.
334 NTWORK THORMS Th Th Th 1 8 V 2 Th 1 R Th = 2. Th = 4.8 V 8 V FG. 9.42 Network of Fig. 9.41 redrwn. R 4 2 3 FG. 9.41 Determining Th for the network of Fig. 9.39. Step 4: See Fig. 9.41. n this cse, the network cn e redrwn s shown in Fig. 9.42, nd since the voltge is the sme cross prllel elements, the voltge cross the series resistors nd is 1, or 8 V. Applying the voltge divider rule, 1 ()(8 V) 48 V Th 4.8 V R1 10 Step 5: See Fig. 9.43. The importnce of mrking the terminls should e ovious from xmple 9.8. Note tht there is no requirement tht the Thévenin voltge hve the sme polrity s the equivlent circuit originlly introduced. FG. 9.43 Sustituting the Thévenin equivlent circuit for the network externl to the resistor R 4 of Fig. 9.38. XAMPL 9.9 Find the Thévenin equivlent circuit for the network in the shded re of the ridge network of Fig. 9.44. 72 V 12 3 R 4 FG. 9.44 xmple 9.9. 72 V 3 R 4 12 Solution: Steps 1 nd 2 re shown in Fig. 9.45. Step 3: See Fig. 9.46. n this cse, the short-circuit replcement of the voltge source provides direct connection etween c nd c of Fig. 9.46(), permitting folding of the network round the horizontl line of - to produce the configurtion of Fig. 9.46(). FG. 9.45 dentifying the terminls of prticulr interest for the network of Fig. 9.44. R Th R - R 4 3 12 2 3 5
Th THÉVNN S THORM 335 c 12 R Th R 4 3 R Th 3 R 4 12 c c,c () () FG. 9.46 Solving for R Th for the network of Fig. 9.45. Step 4: The circuit is redrwn in Fig. 9.47. The sence of direct connection etween nd results in network with three prllel rnches. The voltges V 1 nd V 2 cn therefore e determined using the voltge divider rule: ()(72 V) 432 V V 1 48 V R1 3 9 (12 )(72 V) 864 V V 2 54 V R2 R 4 12 16 72 V V 1 3 KVL Th R 4 12 V 2 Th = 6 V R Th = 5 Assuming the polrity shown for Th nd pplying Kirchhoff s voltge lw to the top loop in the clockwise direction will result in V Th V 1 V 2 0 nd Th V 2 V 1 54 V 48 V 6 V Step 5 is shown in Fig. 9.48. FG. 9.47 Determining Th for the network of Fig. 9.45. FG. 9.48 Sustituting the Thévenin equivlent circuit for the network externl to the resistor of Fig. 9.44. 2 10 V 4 k Thévenin s theorem is not restricted to single pssive element, s shown in the preceding exmples, ut cn e pplied cross sources, whole rnches, portions of networks, or ny circuit configurtion, s shown in the following exmple. t is lso possile tht one of the methods previously descried, such s mesh nlysis or superposition, my hve to e used to find the Thévenin equivlent circuit. 1 0.8 k 6 V R 4 1.4 k 6 k XAMPL 9.10 (Two sources) Find the Thévenin circuit for the network within the shded re of Fig. 9.49. FG. 9.49 xmple 9.10.
336 NTWORK THORMS Th Solution: The network is redrwn nd steps 1 nd 2 re pplied s shown in Fig. 9.50. R 4 0.8 k 4 k 6 k R 4 1.4 k R Th 4 k 0.8 k R 3 1 6 V 2 10 V 6 k 1.4 k 2.4 k FG. 9.51 Determining R Th for the network of Fig. 9.50. FG. 9.50 dentifying the terminls of prticulr interest for the network of Fig. 9.49. Step 3: See Fig. 9.51. 1 0.8 k 6 V 4 k 6 k V 4 R 4 1.4 k V 3 4 = 0 Th R Th R 1.4 k0.8 k 4 k 6 k 1.4 k0.8 k 2.4 k 1.4 k0.6 k 2 k Step 4: Applying superposition, we will consider the effects of the voltge source 1 first. Note Fig. 9.52. The open circuit requires tht V 4 R (0)R 0V,nd FG. 9.52 Determining the contriution to Th from the source 1 for the network of Fig. 9.50. 4 k 0.8 k R3 6 k 2 10 V V 4 4 = 0 R 4 1.4 k V 3 Th FG. 9.53 Determining the contriution to Th from the source 2 for the network of Fig. 9.50. Th V 3 R T 4 k 6 k2.4 k Applying the voltge divider rule, V 3 R T 1 (2.4 k)(6 V) 14.4 V 4.5 V R T 2.4 k0.8 k 3.2 Th V 3 4.5 V For the source 2, the network of Fig. 9.53 will result. Agin, V 4 R (0)R 0 V, nd nd Th V 3 R T 0.8 k 6 k0.706 k R V 3 T 2 (0.706 k)(10 V) 7.06 V 1.5 V R T R2 0.706 k4 k 4.706 Th V 3 1.5 V Since Th nd Th hve opposite polrities, Th 3 V R Th 2 k Step 5: See Fig. 9.54. Th Th Th 4.5 V 1.5 V 3 V (polrity of Th ) FG. 9.54 Sustituting the Thévenin equivlent circuit for the network externl to the resistor of Fig. 9.49. xperimentl Procedures There re two populr experimentl procedures for determining the prmeters of Thévenin equivlent network. The procedure for mesuring the Thévenin voltge is the sme for ech, ut the pproch for determining the Thévenin resistnce is quite different for ech.
Th THÉVNN S THORM 337 Direct Mesurement of Th nd R Th For ny physicl network, the vlue of Th cn e determined experimentlly y mesuring the open-circuit voltge cross the lod terminls, s shown in Fig. 9.55; Th V oc V. The vlue of R Th cn then e determined y completing the network with vrile such s the potentiometer of Fig. 9.56(). cn then e vried until the voltge ppering cross the lod is one-hlf the open-circuit vlue, or V L Th /2. For the series circuit of Fig. 9.56(), when the lod voltge is reduced to one-hlf the open-circuit level, the voltge cross R Th nd must e the sme. f we red the vlue of [s shown in Fig. 9.56(c)] tht resulted in the preceding clcultions, we will lso hve the vlue of R Th, since R Th if V L equls the voltge cross R Th. V = 0 V R Th Th = 0 Th Open circuit Network V () () Th FG. 9.55 Determining Th experimentlly. R Th Th Th 2 Th = R Th 2 () Network () V Th 2 R Th (c) FG. 9.56 Determining R Th experimentlly. Mesuring V oc nd sc The Thévenin voltge is gin determined y mesuring the open-circuit voltge cross the terminls of interest;
338 NTWORK THORMS Th Th R Th sc tht is, Th V oc. To determine R Th, short-circuit condition is estlished cross the terminls of interest, s shown in Fig. 9.57, nd the current through the short circuit is mesured with n mmeter. Using Ohm s lw, we find tht the short-circuit current is determined y Americn (Rocklnd, Mine; Summit, New Jersey) (18981983) lectricl ngineer, Scientist, nventor Deprtment Hed: Bell Lortories Fellow: Acousticl Society nd nstitute of Rdio ngineers Courtesy of AT&T Archives Although interested primrily in communictions circuit theory nd the trnsmission of dt t high speeds over telephone lines, dwrd L. Norton is est rememered for development of the dul of Thévenin s equivlent circuit, currently referred to s Norton s equivlent circuit. n fct, Norton nd his ssocites t AT&T in the erly 1920s re recognized s some of the first to perform pioneering work pplying Thévenin s equivlent circuit nd who referred to this concept simply s Thévenin s theorem. n 1926 he proposed the equivlent circuit using current source nd prllel resistor to ssist in the design of recording instrumenttion tht ws primrily current driven. He egn his telephone creer in 1922 with the Western lectric Compny s ngineering Deprtment, which lter ecme Bell Lortories. His res of ctive reserch included network theory, cousticl systems, electromgnetic pprtus, nd dt trnsmission. A grdute of MT nd Columi University, he held nineteen ptents on his work. DWARD L. NORTON N FG. 9.57 Mesuring sc. R N FG. 9.58 Norton equivlent circuit. nd the Thévenin resistnce y sc R Th However, Th V oc resulting in the following eqution for R Th : R Th V oc s 9.4 NORTON S THORM Th RTh Th sc (9.2) t ws demonstrted in Section 8.3 tht every voltge source with series internl resistnce hs current source equivlent. The current source equivlent of the Thévenin network (which, you will note, stisfies the ove conditions), s shown in Fig. 9.58, cn e determined y Norton s theorem. t cn lso e found through the conversions of Section 8.3. The theorem sttes the following: Any two-terminl liner ilterl dc network cn e replced y n equivlent circuit consisting of current source nd prllel resistor, s shown in Fig. 9.58. The discussion of Thévenin s theorem with respect to the equivlent circuit cn lso e pplied to the Norton equivlent circuit. The steps leding to the proper vlues of N nd R N re now listed. Preliminry: 1. Remove tht portion of the network cross which the Norton equivlent circuit is found. 2. Mrk the terminls of the remining two-terminl network. R N : 3. Clculte R N y first setting ll sources to zero (voltge sources re replced with short circuits, nd current sources with open circuits) nd then finding the resultnt resistnce etween the two mrked terminls. (f the internl resistnce of the voltge nd/or current sources is included in the originl network, it must remin when the sources re set to zero.) Since R N R Th, the procedure nd vlue otined using the pproch descried for Thévenin s theorem will determine the proper vlue of R N. N : 4. Clculte N y first returning ll sources to their originl position nd then finding the short-circuit current etween the mrked terminls. t is the sme current tht would e mesured y n mmeter plced etween the mrked terminls. c
Th NORTON S THORM 339 Conclusion: 5. Drw the Norton equivlent circuit with the portion of the circuit previously removed replced etween the terminls of the equivlent circuit. The Norton nd Thévenin equivlent circuits cn lso e found from ech other y using the source trnsformtion discussed erlier in this chpter nd reproduced in Fig. 9.59. R Th = R N Th = N R N N Th R Th R N = R Th FG. 9.59 Converting etween Thévenin nd Norton equivlent circuits. XAMPL 9.11 Find the Norton equivlent circuit for the network in the shded re of Fig. 9.60. Solution: Steps 1 nd 2 re shown in Fig. 9.61. 3 9 V 3 9 V FG. 9.60 xmple 9.11. 3 FG. 9.61 dentifying the terminls of prticulr interest for the network of Fig. 9.60. R N Step 3 is shown in Fig. 9.62, nd (3 )() 18 R N 3 2 3 9 Step 4 is shown in Fig. 9.63, clerly indicting tht the short-circuit connection etween terminls nd is in prllel with nd elimintes its effect. N is therefore the sme s through, nd the full ttery voltge ppers cross since V 2 2 (0)0 V Therefore, 9 V N 3 A R1 3 FG. 9.62 Determining R N for the network of Fig. 9.61. 1 N N 3 9 V V 2 Short circuited 2 = 0 Short FG. 9.63 Determining N for the network of Fig. 9.61. N
340 NTWORK THORMS Th Step 5: See Fig. 9.64. This circuit is the sme s the first one considered in the development of Thévenin s theorem. A simple conversion indictes tht the Thévenin circuits re, in fct, the sme (Fig. 9.65). R Th = R N = 2 N = 3 A R N = 2 N 3 A R N = 2 Th = N R N = (3 A)(2 ) = 6 V FG. 9.64 Sustituting the Norton equivlent circuit for the network externl to the resistor of Fig. 9.60. FG. 9.65 Converting the Norton equivlent circuit of Fig. 9.64 to Thévenin equivlent circuit. 5 XAMPL 9.12 Find the Norton equivlent circuit for the network externl to the 9- resistor in Fig. 9.66. Solution: Steps 1 nd 2: See Fig. 9.67. 10 A 9 5 FG. 9.66 xmple 9.12. 10 A FG. 9.67 dentifying the terminls of prticulr interest for the network of Fig. 9.66. Step 3: See Fig. 9.68, nd 5 R N R N 5 9 Step 4: As shown in Fig. 9.69, the Norton current is the sme s the current through the 4- resistor. Applying the current divider rule, (5 )(10 A) 50 A N 5.556 A R1 5 9 FG. 9.68 Determining R N for the network of Fig. 9.67. 5 10 A R N 1 10 A 5 N FG. 9.69 Determining N for the network of Fig. 9.67.
Th NORTON S THORM 341 Step 5: See Fig. 9.70. N 5.556 A R N 9 9 FG. 9.70 Sustituting the Norton equivlent circuit for the network externl to the resistor of Fig. 9.66. XAMPL 9.13 (Two sources) Find the Norton equivlent circuit for the portion of the network to the left of - in Fig. 9.71. 8 A 9 R 4 10 1 7 V 2 12 V FG. 9.71 xmple 9.13. Solution: 8 A Steps 1 nd 2: See Fig. 9.72. 1 7 V Step 3 is shown in Fig. 9.73, nd ()() 2 10 R N 2. FG. 9.72 dentifying the terminls of prticulr interest for the network of Fig. 9.71. R N N Short circuited N N 1 7 V FG. 9.73 Determining R N for the network of Fig. 9.72. Step 4: (Using superposition) For the 7-V ttery (Fig. 9.74), FG. 9.74 Determining the contriution to N from the voltge source 1.
342 NTWORK THORMS Th 1 7 V N 1.75 A R1 Short circuited 8 A N N N FG. 9.75 Determining the contriution to N from the current source. N For the 8-A source (Fig. 9.75), we find tht oth nd hve een short circuited y the direct connection etween nd, nd N 8 A The result is N N N 8 A 1.75 A 6.25 A Step 5: See Fig. 9.76. N 6.25 A R N = 2. 2 9 12 V R 4 10 FG. 9.76 Sustituting the Norton equivlent circuit for the network to the left of terminls - in Fig. 9.71. xperimentl Procedure The Norton current is mesured in the sme wy s descried for the short-circuit current for the Thévenin network. Since the Norton nd Thévenin resistnces re the sme, the sme procedures cn e employed s descried for the Thévenin network. 9.5 MAXMUM POWR TRANSFR THORM The mximum power trnsfer theorem sttes the following: A lod will receive mximum power from liner ilterl dc network when its totl resistive vlue is exctly equl to the Thévenin resistnce of the network s seen y the lod. Th R Th For the network of Fig. 9.77, mximum power will e delivered to the lod when R Th (9.3) FG. 9.77 Defining the conditions for mximum power to lod using the Thévenin equivlent circuit. From pst discussions, we relize tht Thévenin equivlent circuit cn e found cross ny element or group of elements in liner ilterl dc network. Therefore, if we consider the cse of the Thévenin equivlent circuit with respect to the mximum power trnsfer theorem, we re, in essence, considering the totl effects of ny network cross resistor, such s in Fig. 9.77. For the Norton equivlent circuit of Fig. 9.78, mximum power will e delivered to the lod when
Th MAXMUM POWR TRANSFR THORM 343 N R N FG. 9.78 Defining the conditions for mximum power to lod using the Norton equivlent circuit. R N (9.4) This result [q. (9.4)] will e used to its fullest dvntge in the nlysis of trnsistor networks, where the most frequently pplied trnsistor circuit model employs current source rther thn voltge source. For the network of Fig. 9.77, Th RTh Th nd P L 2 R 2 L RTh so tht P L 2 Th (RTh ) 2 Let us now consider n exmple where Th 60 V nd R Th 9, s shown in Fig. 9.79. R Th P L 9 L Th 60 V V L FG. 9.79 Thévenin equivlent network to e used to vlidte the mximum power trnsfer theorem. The power to the lod is determined y P L 2 Th (RTh ) 2 Th 60 V with L RTh 9 RL (60 V) (60 V) nd V L RTh 9 RL A tultion of P L for rnge of vlues of yields Tle 9.1. A plot of P L versus using the dt of Tle 9.1 will result in the plot of Fig. 9.80 for the rnge 0.1 to 30. 3600 (9 RL ) 2
344 NTWORK THORMS Th TABL 9.1 () P L (W) L (A) V L (V) 0.1 4.35 6.59 0.66 0.2 8.51 6.52 1.30 0.5 19.94 6.32 3.16 1 36.00 6.00 6.00 2 59.50 5.46 10.91 3 75.00 5.00 15.00 4 85.21 4.62 18.46 5 91.84 ncrese 4.29 Decrese 21.43 ncrese 6 96.00 4.00 24.00 7 98.44 3.75 26.25 8 99.65 5 3.53 5 28.23 5 9 (R Th ) 100.00 (Mximum) 3.33 ( mx /2) 30.00 ( Th /2) 10 99.72 3.16 31.58 11 99.00 3.00 33.00 12 97.96 2.86 34.29 13 96.69 2.73 35.46 14 95.27 2.61 36.52 15 93.75 2.50 37.50 16 92.16 2.40 38.40 17 90.53 Decrese 2.31 Decrese 39.23 ncrese 18 88.89 2.22 40.00 19 87.24 2.14 40.71 20 85.61 2.07 41.38 25 77.86 1.77 44.12 30 71.00 1.54 46.15 40 59.98 1.22 48.98 100 30.30 0.55 55.05 500 6.95 0.12 58.94 1000 3.54 0.06 59.47 5 5 5 P L (W) 100 P L 90 80 70 60 50 = R Th = 9 40 30 20 10 0 5 9 10 15 20 25 30 () FG. 9.80 P L versus for the network of Fig. 9.79.
Th MAXMUM POWR TRANSFR THORM 345 Note, in prticulr, tht P L is, in fct, mximum when R Th 9. The power curve increses more rpidly towrd its mximum vlue thn it decreses fter the mximum point, clerly reveling tht smll chnge in lod resistnce for levels of elow R Th will hve more drmtic effect on the power delivered thn similr chnges in ove the R Th level. f we plot V L nd L versus the sme resistnce scle (Fig. 9.81), we find tht oth chnge nonlinerly, with the terminl voltge incresing with n increse in lod resistnce s the current decreses. Note gin tht the most drmtic chnges in V L nd L occur for levels of less thn R Th. As pointed out on the plot, when R Th, V L Th /2 nd L mx /2, with mx Th /R Th. V L (V) L (A) 50 8 40 7 mx = Th / = 6.67 A V L 6 L 30 5 Th /2 4 20 3 mx /2 10 2 = R Th = 9 1 0 0 5 9 10 15 20 25 30 () FG. 9.81 V L nd L versus for the network of Fig. 9.79. The dc operting efficiency of system is defined y the rtio of the power delivered to the lod to the power supplied y the source; tht is, L h% P 100% P s (9.5) For the sitution defined y Fig. 9.77, P L 2 L h% 100% 100% 2 Ps L R T
346 NTWORK THORMS Th nd h% 100% RTh For tht is smll compred to R Th,R Th k nd R Th R Th, with 1 h% 100% R 100% k 100% Th R Th Constnt The resulting percentge efficiency, therefore, will e reltively low (since k is smll) nd will increse lmost linerly s increses. For situtions where the lod resistnce is much lrger thn R Th, k R Th nd R Th. RL h% 100% 100% The efficiency therefore increses linerly nd drmticlly for smll levels of nd then egins to level off s it pproches the 100% level for very lrge vlues of, s shown in Fig. 9.82. Keep in mind, however, tht the efficiency criterion is sensitive only to the rtio of P L to P s nd not to their ctul levels. At efficiency levels pproching 100%, the power delivered to the lod my e so smll s to hve little prcticl vlue. Note the low level of power to the lod in Tle 9.1 when 1000, even though the efficiency level will e 1000 h% 100% 100% 99.11% RTh 1009 h% 100 Approches 100% 75 50 25 = R Th h% k 100% 0 10 20 40 60 80 100 () FG. 9.82 fficiency of opertion versus incresing vlues of.
Th MAXMUM POWR TRANSFR THORM 347 When R Th, h% 100% 100% 50% RTh 2RL Under mximum power trnsfer conditions, therefore, P L is mximum, ut the dc efficiency is only 50%; tht is, only hlf the power delivered y the source is getting to the lod. A reltively low efficiency of 50% cn e tolerted in situtions where power levels re reltively low, such s in wide vriety of electronic systems. However, when lrge power levels re involved, such s t generting sttions, efficiencies of 50% would not e cceptle. n fct, gret del of expense nd reserch is dedicted to rising powergenerting nd trnsmission efficiencies few percentge points. Rising n efficiency level of 10-meg-kW power plnt from 94% to 95% ( 1% increse) cn sve 0.1 meg-kw, or 100 million wtts, of power n enormous sving! Consider chnge in lod levels from 9 to 20. n Fig. 9.80, the power level hs dropped from 100 W to 85.61 W ( 14.4% drop), ut the efficiency hs incresed sustntilly to 69% ( 38% increse), s shown in Fig. 9.82. For ech ppliction, therefore, lnce point must e identified where the efficiency is sufficiently high without reducing the power to the lod to insignificnt levels. Figure 9.83 is semilog plot of P L nd the power delivered y the source P s Th L versus for Th 60 V nd R Th 9. A semilog grph employs one log scle nd one liner scle, s implied y the prefix semi, mening hlf. Log scles re discussed in detil in Chpter 23. For the moment, note the wide rnge of permitted using the log scle compred to Figs. 9.80 through 9.82. t is now quite cler tht the P L curve hs only one mximum (t R Th ), wheres P s decreses for every increse in. n prticulr, note tht for low levels of, only smll portion of the power delivered y the source mkes it to the lod. n fct, even when R Th, the source is generting twice the power sored y the lod. For vlues of greter thn R Th, the two curves pproch ech other until eventully they re essentilly the sme t high levels of. For the rnge R Th 9 to 100, P L nd P s re reltively close in mgnitude, suggesting tht this would e n pproprite rnge of opertion, since mjority of the power delivered y the source is getting to the lod nd the power levels re still significnt. The power delivered to under mximum power conditions ( R Th ) is Th RTh P L 2 Th 2RTh Th 2RTh 2 R Th Th nd P Lmx (wtts, W) (9.6) 4 R For the Norton circuit of Fig. 9.78, 2 Th 2 ThR Th 4R 2 Th P Lmx 2 NR N 4 (W) (9.7)
348 NTWORK THORMS Th 400 P (W) 350 P s = Th L 300 250 200 P s = 2P L mx (t = R Th ) 150 = R Th = 9 100 P L mx 90 80 70 60 50 40 30 20 10 P L 0.1 0.2 0.5 1 2 3 4 567810 20 30 40 100 1000 () = R Th = 9 FG. 9.83 P s nd P L versus for the network of Fig. 9.79.
Th MAXMUM POWR TRANSFR THORM 349 XAMPL 9.14 A dc genertor, ttery, nd lortory supply re connected to resistive lod in Fig. 9.84(), (), nd (c), respectively. R int 2.5 R int 0.5 R int 40 () dc genertor () Bttery (c) Lortory supply FG. 9.84 xmple 9.14.. For ech, determine the vlue of for mximum power trnsfer to.. Determine for 75% efficiency. Solutions:. For the dc genertor, R Th R int 2.5 For the ttery, R Th R int 0.5 For the lortory supply, R Th R int 40. For the dc genertor, h P o Ps (h in deciml form) h RTh h(r Th ) hr Th h (1 h) hr Th hrth nd (9.8) 1 h For the ttery, 0.75(2.5 ) 1 0.75 0.75(0.5 ) 1 0.75 7.5 1.5
350 NTWORK THORMS Th 10 ma R s 40 k FG. 9.85 xmple 9.15. For the lortory supply, 0.75(40 ) 1 0.75 120 The results of xmple 9.14 revel tht the following modified form of the mximum power trnsfer theorem is vlid: For lods connected directly to dc voltge supply, mximum power will e delivered to the lod when the lod resistnce is equl to the internl resistnce of the source; tht is, when 12 V 3 FG. 9.86 xmple 9.16. 8 R R int (9.9) XAMPL 9.15 Anlysis of trnsistor network resulted in the reduced configurtion of Fig. 9.85. Determine the necessry to trnsfer mximum power to, nd clculte the power of under these conditions. Solution: q. (9.4): 3 8 R Th q. (9.7): R s 40 k 2 NR (10 ma) 2 N (40 k) P Lmx 1 W 4 4 FG. 9.87 Determining R Th for the network externl to the resistor R of Fig. 9.86. 12 V 3 V 3 = 0 V Th 8 Th FG. 9.88 Determining Th for the network externl to the resistor R of Fig. 9.86. 3 1 68 V XAMPL 9.16 For the network of Fig. 9.86, determine the vlue of R for mximum power to R, nd clculte the power delivered under these conditions. Solution: See Fig. 9.87. nd See Fig. 9.88. R Th 8 ()(3 ) 3 R R Th 10 8 2 (3 )(12 V) 36 V Th 4 V R2 3 9 nd, y q. (9.6), 2 Th (4 V) 2 P Lmx 0.4 W 4RTh 4(10 ) 6 A 10 2 FG. 9.89 xmple 9.17. XAMPL 9.17 Find the vlue of in Fig. 9.89 for mximum power to, nd determine the mximum power. Solution: See Fig. 9.90. nd R Th 3 10 2 15 R Th 15
Th MLLMAN S THORM 351 Note Fig. 9.91, where V 1 V 3 0 V nd V 2 2 (6 A)(10 ) 60 V Applying Kirchhoff s voltge lw, V V 2 1 Th 0 nd Th V 2 1 60 V 68 V 128 V 2 Th (128 V) 2 Thus, P Lmx 273.07 W 4RTh 4(15 ) 10 3 2 FG. 9.90 Determining R Th for the network externl to the resistor of Fig. 9.89. R Th 9.6 MLLMAN S THORM V 1 = 0 V = 0 1 Through the ppliction of Millmn s theorem, ny numer of prllel voltge sources cn e reduced to one. n Fig. 9.92, for exmple, the three voltge sources cn e reduced to one. This would permit finding the current through or voltge cross without hving to pply method such s mesh nlysis, nodl nlysis, superposition, nd so on. The theorem cn est e descried y pplying it to the network of Fig. 9.92. Bsiclly, three steps re included in its ppliction. = 6 A 6 A V 2 = 3 = 10 68 V = 6 A = 0 = 2 V 3 = 0 V Th FG. 9.91 Determining Th for the network externl to the resistor of Fig. 9.89. R eq 1 2 3 eq FG. 9.92 Demonstrting the effect of pplying Millmn s theorem. Step 1: Convert ll voltge sources to current sources s outlined in Section 8.3. This is performed in Fig. 9.93 for the network of Fig. 9.92. 1 1 G 1 G 1 2 2 G 2 G 2 3 3 G 3 G 3 ( 1 ( 2 ) ( 3 ) ) FG. 9.93 Converting ll the sources of Fig. 9.92 to current sources.
352 NTWORK THORMS Th Step 2: Comine prllel current sources s descried in Section 8.4. The resulting network is shown in Fig. 9.94, where T G T FG. 9.94 Reducing ll the current sources of Fig. 9.93 to single current source. T 1 2 3 nd G T G 1 G 2 G 3 Step 3: Convert the resulting current source to voltge source, nd the desired single-source network is otined, s shown in Fig. 9.95. n generl, Millmn s theorem sttes tht for ny numer of prllel voltge sources, eq T G T 1 2 3 N G 1 G 2 G 3 G N R eq 1 G T eq T G T 1 G 1 2 G 2 3 G 3 N G N or eq (9.10) G 1 G 2 G 3 G N The plus-nd-minus signs pper in q. (9.10) to include those cses where the sources my not e supplying energy in the sme direction. (Note xmple 9.18.) The equivlent resistnce is FG. 9.95 Converting the current source of Fig. 9.94 to voltge source. 1 1 R eq (9.11) GT G 1 G 2 G 3 G N n terms of the resistnce vlues, 1 2 3 R1 R2 R3 RN eq 1 1 1 1 (9.12) R R R R 1 2 3 N N 1 nd R eq 1 1 1 1 (9.13) R R R R 1 2 3 N The reltively few direct steps required my result in the student s pplying ech step rther thn memorizing nd employing qs. (9.10) through (9.13). 5 2 1 2 10 V 3 16 V 8 V L 3 V L XAMPL 9.18 Using Millmn s theorem, find the current through nd voltge cross the resistor of Fig. 9.96. Solution: By q. (9.12), 1 R1 R2 R3 eq 1 1 1 R R R 1 2 2 3 3 FG. 9.96 xmple 9.18. The minus sign is used for 2 / ecuse tht supply hs the opposite polrity of the other two. The chosen reference direction is therefore
Th MLLMAN S THORM 353 tht of 1 nd 3. The totl conductnce is unffected y the direction, nd 1 0 5 V 1 6 V 8 V 2 2 A 4 A 4 A eq 1 1 1 0.2 S 0.25 S 0.5 S 5 2 2 A 2.105 V 0.95 S 1 1 with R eq 1.053 1 1 1 0.95 S 5 2 The resultnt source is shown in Fig. 9.97, nd 2.105 V 2.105 V L 0.519 A 1.053 3 4.053 with V L L (0.519 A)(3 ) 1.557 V R eq eq 1.053 2.105 V L 3 V L FG. 9.97 The result of pplying Millmn s theorem to the network of Fig. 9.96. XAMPL 9.19 Let us now consider the type of prolem encountered in the introduction to mesh nd nodl nlysis in Chpter 8. Mesh nlysis ws pplied to the network of Fig. 9.98 (xmple 8.12). Let us now use Millmn s theorem to find the current through the 2- resistor nd compre the results. 1 1 5 V 2 10 V 2 Solutions:. Let us first pply ech step nd, in the () solution, q. (9.12). Converting sources yields Fig. 9.99. Comining sources nd prllel conductnce rnches (Fig. 9.100) yields FG. 9.98 xmple 9.19. 5 15 5 20 T 1 2 5 A A A A A 3 3 3 3 1 6 1 7 G T G 1 G 2 1 S S S S S 6 6 6 6 1 5 A 1 2 5 2 A 3 T 20 3 A G T 7 6 S 2 FG. 9.99 Converting the sources of Fig. 9.98 to current sources. FG. 9.100 Reducing the current sources of Fig. 9.99 to single source. Converting the current source to voltge source (Fig. 9.101), we otin 2 0 A 3 T (6)(20) 40 eq V V G 7 T (3)(7) 7 S R eq 6 7 eq 40 7 V 2 FG. 9.101 Converting the current source of Fig. 9.100 to voltge source.
354 NTWORK THORMS Th 1 1 6 nd R eq GT 7 7 S so tht 4 0 4 0 V V 7 7 eq 40 V 2 2 A 6 20 7 1 4 6 Req 2 7 7 which grees with the result otined in xmple 8.18.. Let us now simply pply the proper eqution, q. (9.12): 5 3 0 6 V 1 0 V 1 V 1 0 V eq 40 1 V 7 1 1 1 nd 1 1 1 6 R eq 1 6 7 7 S 1 1 1 which re the sme vlues otined ove. The dul of Millmn s theorem (Fig. 9.92) ppers in Fig. 9.102. t cn e shown tht eq nd R eq, s in Fig. 9.102, re given y 1 2 3 eq R eq FG. 9.102 The dul effect of Millmn s theorem. 1 2 3 eq (9.14) nd R eq (9.15) The derivtion will pper s prolem t the end of the chpter. 9.7 SUBSTTUTON THORM The sustitution theorem sttes the following: f the voltge cross nd the current through ny rnch of dc ilterl network re known, this rnch cn e replced y ny
Th SUBSTTUTON THORM 355 comintion of elements tht will mintin the sme voltge cross nd current through the chosen rnch. More simply, the theorem sttes tht for rnch equivlence, the terminl voltge nd current must e the sme. Consider the circuit of Fig. 9.103, in which the voltge cross nd current through the rnch - re determined. Through the use of the sustitution theorem, numer of equivlent - rnches re shown in Fig. 9.104. 3 A 12 V 3 A 12 V 2 6 V 3 A 12 V 3 A 2 A 12 12 V 30 V FG. 9.103 Demonstrting the effect of the sustitution theorem. 3 A 12 V FG. 9.104 quivlent rnches for the rnch - of Fig. 9.103. Note tht for ech equivlent, the terminl voltge nd current re the sme. Also consider tht the response of the reminder of the circuit of Fig. 9.103 is unchnged y sustituting ny one of the equivlent rnches. As demonstrted y the single-source equivlents of Fig. 9.104, known potentil difference nd current in network cn e replced y n idel voltge source nd current source, respectively. Understnd tht this theorem cnnot e used to solve networks with two or more sources tht re not in series or prllel. For it to e pplied, potentil difference or current vlue must e known or found using one of the techniques discussed erlier. One ppliction of the theorem is shown in Fig. 9.105. Note tht in the figure the known potentil difference V ws replced y voltge source, permitting the isoltion of the portion of the network including, R 4, nd R 5. Recll tht this ws siclly the pproch employed in the nlysis of the ldder network s we worked our wy ck towrd the terminl resistnce R 5. V R 4 R 5 = V FG. 9.105 Demonstrting the effect of knowing voltge t some point in complex network. R 4 R 5 The current source equivlence of the ove is shown in Fig. 9.106, where known current is replced y n idel current source, permitting the isoltion of R 4 nd R 5.
356 NTWORK THORMS Th R 4 R 5 R 4 R 5 FG. 9.106 Demonstrting the effect of knowing current t some point in complex network. You will lso recll from the discussion of ridge networks tht V 0 nd 0 were replced y short circuit nd n open circuit, respectively. This sustitution is very specific ppliction of the sustitution theorem. 9.8 RCPROCTY THORM The reciprocity theorem is pplicle only to single-source networks. t is, therefore, not theorem employed in the nlysis of multisource networks descried thus fr. The theorem sttes the following: The current in ny rnch of network, due to single voltge source nywhere else in the network, will equl the current through the rnch in which the source ws originlly locted if the source is plced in the rnch in which the current ws originlly mesured. n other words, the loction of the voltge source nd the resulting current my e interchnged without chnge in current. The theorem requires tht the polrity of the voltge source hve the sme correspondence with the direction of the rnch current in ech position. n the representtive network of Fig. 9.107(), the current due to the voltge source ws determined. f the position of ech is interchnged s shown in Fig. 9.107(), the current will e the sme vlue s indicted. To demonstrte the vlidity of this sttement nd the theorem, consider the network of Fig. 9.108, in which vlues for the elements of Fig. 9.107() hve een ssigned. The totl resistnce is () c d () c d FG. 9.107 Demonstrting the impct of the reciprocity theorem.
Th APPLCATON 357 s 12 2 45 V R 4 FG. 9.108 Finding the current due to source. R T ( R 4 ) 12 (2 ) 12 12 3 15 45 V nd s 3 A RT 15 3 A with 1.5 A 2 For the network of Fig. 9.109, which corresponds to tht of Fig. 9.107(), we find 12 2 R T R 2 12 10 R 4 R T 45 V nd s 4.5 A RT 10 s 45 V ()(4.5 A) 4.5 A so tht 1.5 A 12 3 which grees with the ove. The uniqueness nd power of such theorem cn est e demonstrted y considering complex, single-source network such s the one shown in Fig. 9.110. FG. 9.109 nterchnging the loction of nd of Fig. 9.108 to demonstrte the vlidity of the reciprocity theorem. d c c d FG. 9.110 Demonstrting the power nd uniqueness of the reciprocity theorem. 9.9 APPLCATON Speker System One of the most common pplictions of the mximum power trnsfer theorem introduced in this chpter is to speker systems. An udio mplifier (mplifier with frequency rnge mtching the typicl rnge
358 NTWORK THORMS Th Audio mplifier R o () V s R o 8 Ω Speker R i () R i 8 Ω (c) 4" Woofer 8 Ω 5 W(rms) 10 W (mx) FG. 9.111 Components of speker system: () mplifier; () speker; (c) commercilly ville unit. R o 8 Ω 12 V Amplifier 6 V R i 8-Ω speker () R o R speker 1 8 Ω 8 Ω = 500 ma 12 V 8 Ω R speker 2 Amplifier 8 Ω 12 V () R o R speker 1 Amplifier Series spekers R speker 2 4 V 8 Ω 8 Ω (c) Prllel spekers FG. 9.112 Speker connections: () single unit; () in series; (c) in prllel. of the humn er) with n output impednce of 8 is shown in Fig. 9.111(). mpednce is term pplied to opposition in c networks for the moment think of it s resistnce level. We cn lso think of impednce s the internl resistnce of the source which is normlly shown in series with the source voltge s shown in the sme figure. very speker hs n internl resistnce tht cn e represented s shown in Fig. 9.111() for stndrd 8- speker. Figure 9.111(c) is photogrph of commercilly ville 8- woofer (for very low frequencies). The primry purpose of the following discussion is to shed some light on how the udio power cn e distriuted nd which pproch would e the most effective. Since the mximum power theorem sttes tht the lod impednce should mtch the source impednce for mximum power trnsfer, let us first consider the cse of single 8- speker s shown in Fig. 9.112() with n pplied mplifier voltge of 12 V. Since the pplied voltge will split eqully, the speker voltge is 6 V, nd the power to the speker is mximum vlue of P V 2 /R (6 V) 2 /8 4.5 W. f we hve two 8- spekers tht we would like to hook up, we hve the choice of hooking them up in series or prllel. For the series configurtion of Fig. 9.112(), the resulting current would e /R 12 V/2500 ma, nd the power to ech speker would e P 2 R (500 ma) 2 (8 ) 2W,which is drop of over 50% from the mximum output level of 4.5 W. f the spekers re hooked up in prllel s shown in Fig. 9.112(c), the totl resistnce of the prllel comintion is, nd the voltge cross ech speker s determined y the voltge divider rule will e 4 V. The power to ech speker is P V 2 /R (4 V) 2 /8 2 W which, interestingly enough, is the sme power delivered to ech speker whether in series or prllel. However, the prllel rrngement is normlly chosen for vriety of resons. First, when the spekers re connected in prllel, if wire should ecome disconnected from one of the spekers due simply to the virtion cused y the emitted sound, the other spekers will still e operting perhps not t mximum efficiency, ut they will still e operting. f in series they would ll fil to operte. A second reson reltes to the generl wiring procedure. When ll of the spekers re in prllel, from vrious prts of room ll the red wires cn e connected together nd ll the lck wires together. f the spekers re in series, nd if you
Th COMPUTR ANALYSS 359 re presented with undle of red nd lck wires in the sement, you would first hve to determine which wires go with which spekers. Spekers re lso ville with input impednces of nd 1. f you know tht the output impednce is 8, purchsing either two 4- spekers or two 16- spekers would result in mximum power to the spekers s shown in Fig. 9.113. The 16- spekers would e connected in prllel nd the 4- spekers in series to estlish totl lod impednce of 8. R o R speker 1 R o R speker 1 R speker 2 8 Ω 4 Ω V 4 Ω s R R speker 2 i = 8 Ω Series 4-Ω spekers 8 Ω V s 6 Ω 16 Ω i = 8 Ω Prllel 16-Ω spekers FG. 9.113 Applying 4- nd 16- spekers to n mplifier with n output impednce of 8. n ny cse, lwys try to mtch the totl resistnce of the speker lod to the output resistnce of the supply. Yes, 4- speker cn e plced in series with prllel comintion of 8- spekers for mximum power trnsfer from the supply since the totl resistnce will e 8. However, the power distriution will not e equl, with the 4- speker receiving 2.25 W nd the 8- spekers ech 1.125 W for totl of 4.5 W. The 4- speker is therefore receiving twice the udio power of the 8- spekers, nd this difference my cuse distortion or imlnce in the listening re. All spekers hve mximum nd minimum levels. A 50-W speker is rted for mximum output power of 50 W nd will provide tht level on demnd. However, in order to function properly, it will proly need to e operting t lest t the 1- to 5-W level. A 100-W speker typiclly needs etween 5 W nd 10 W of power to operte properly. t is lso importnt to relize tht power levels less thn the rted vlue (such s 40 W for the 50-W speker) will not result in n increse in distortion, ut simply in loss of volume. However, distortion will result if you exceed the rted power level. For exmple, if we pply 2.5 W to 2-W speker, we will definitely hve distortion. However, pplying 1.5 W will simply result in less volume. A rule of thum regrding udio levels sttes tht the humn er cn sense chnges in udio level only if you doule the pplied power [ 3-dB increse; deciels (db) will e introduced in Chpter 23]. The douling effect is lwys with respect to the initil level. For instnce, if the originl level were 2 W, you would hve to go to 4 W to notice the chnge. f strting t 10 W, you would hve to go to 20 W to pprecite the increse in volume. An exception to the ove is t very low power levels or very high power levels. For instnce, chnge from 1 W to 1.5 W my e discernile, just s chnge from 50 W to 80 W my e noticele. 9.10 COMPUTR ANALYSS Once the mechnics of pplying softwre pckge or lnguge re understood, the opportunity to e cretive nd innovtive presents itself. Through yers of exposure nd tril-nd-error experiences, professionl
360 NTWORK THORMS Th progrmmers develop ctlog of innovtive techniques tht re not only functionl ut very interesting nd truly rtistic in nture. Now tht some of the sic opertions ssocited with PSpice hve een introduced, few innovtive mneuvers will e mde in the exmples to follow. 36 V 12 2 9 A FG. 9.114 Applying PSpice to determine the current 2 using superposition. PSpice Superposition Let us now pply superposition to the network of Fig 9.114, which ppered erlier s Fig. 9.10 in xmple 9.3, to permit comprison of resulting solutions. The current through is to e determined. Using methods descried in erlier chpters for the ppliction of PSpice, the network of Fig. 9.115 will result to determine the effect of the 36-V voltge source. Note tht oth VDC nd DC (flipped verticlly) pper in the network. The current source, however, ws set to zero simply y selecting the source nd chnging its vlue to 0 A in the Disply Properties dilog ox. FG. 9.115 Using PSpice to determine the contriution of the 36-V voltge source to the current through. Following simultion, the results ppering in Fig. 9.115 will result. The current through the 6- resistor is 2 A due solely to the 36-V voltge source. Although direction is not indicted, it is firly ovious in this cse. For those cses where it is not ovious, the voltge levels cn e displyed, nd the direction would e from the point of high potentil to the point of lower potentil. For the effects of the current source, the voltge source is set to 0 V s shown in Fig. 9.116. The resulting current is then 6 A through, with the sme direction s the contriution due to the voltge source.
Th COMPUTR ANALYSS 361 FG. 9.116 Using PSpice to determine the contriution of the 9-A current source to the current through. The resulting current for the resistor is the sum of the two currents: T 2 A 6 A 8 A, s determined in xmple 9.3. Thévenin s Theorem The ppliction of Thévenin s theorem requires n interesting mneuver to determine the Thévenin resistnce. t is mneuver, however, tht hs ppliction eyond Thévenin s theorem whenever resistnce level is required. The network to e nlyzed ppers in Fig. 9.117 nd is the sme one nlyzed in xmple 9.10 (Fig. 9.49). R 4 1.4 k 1 0.8 k 6 V 2 4 k 10 V 6 k R Th Th FG. 9.117 Network to which PSpice is to e pplied to determine Th nd R Th. Since PSpice is not set up to mesure resistnce levels directly, 1-A current source cn e pplied s shown in Fig. 9.118, nd Ohm s lw
362 NTWORK THORMS Th FG. 9.118 Using PSpice to determine the Thévenin resistnce of network through the ppliction of 1-A current source. cn e used to determine the mgnitude of the Thévenin resistnce in the following mnner: s A V s n q. (9.16), since s 1 A, the mgnitude of R Th in ohms is the sme s the mgnitude of the voltge V s (in volts) cross the current source. The result is tht when the voltge cross the current source is displyed, it cn e red s ohms rther thn volts. When PSpice is pplied, the network will pper s shown in Fig. 9.118. The voltge source 1 nd the current source re flipped using right click on the source nd using the Mirror Verticlly option. Both voltge sources re set to zero through the Disply Properties dilog ox otined y doule-clicking on the source symol. The result of the Bis Point simultion is 2 kv cross the current source. The Thévenin resistnce is therefore 2 k etween the two terminls of the network to the left of the current source (to mtch the results of xmple 9.10). n totl, y setting the voltge sources to 0 V, we hve dictted tht the voltge is the sme t oth ends of the voltge source, replicting the effect of short-circuit connection etween the two points. For the open-circuit Thévenin voltge etween the terminls of interest, the network must e constructed s shown in Fig. 9.119. The resistnce of 1 T (1million M)isconsidered lrge enough to represent n open circuit to permit n nlysis of the network using PSpice. PSpice does not recognize floting nodes nd would generte n error signl if connection were not mde from the top right node to ground. Both voltge sources re now set on their prescried vlues, nd simultion will R Th V s s 1 V
Th COMPUTR ANALYSS 363 FG. 9.119 Using PSpice to determine the Thévenin voltge for network using very lrge resistnce vlue to represent the open-circuit condition etween the terminls of interest. result in 3 V cross the 1-T resistor. The open-circuit Thévenin voltge is therefore 3 V which grees with the solution of xmple 9.10. Mximum Power Trnsfer The procedure for plotting quntity versus prmeter of the network will now e introduced. n this cse it will e the output power versus vlues of lod resistnce to verify the fct tht mximum power will e delivered to the lod when its vlue equls the series Thévenin resistnce. A numer of new steps will e introduced, ut keep in mind tht the method hs rod ppliction eyond Thévenin s theorem nd is therefore well worth the lerning process. The circuit to e nlyzed ppers in Fig. 9.120. The circuit is constructed in exctly the sme mnner s descried erlier except for the vlue of the lod resistnce. Begin the process y strting New Project clled MxPower, nd uild the circuit of Fig. 9.120. For the moment hold off on setting the vlue of the lod resistnce. The first step will e to estlish the vlue of the lod resistnce s vrile since it will not e ssigned fixed vlue. Doule-click on the vlue of RL to otin the Disply Properties dilog ox. For Vlue, type in {Rvl} nd click in plce. The rckets (not prentheses) re required, ut the vrile does not hve to e clled Rvl it is the choice of the user. Next select the Plce prt key tootin the Plce Prt dilog ox. f you re not lredy in the Lirries list, choose Add Lirry nd dd SPCAL to the list. Select the SP- CAL lirry nd scroll the Prt List until PARAM ppers. Select it; then click OK to otin rectngulr ox next to the cursor on the
364 NTWORK THORMS Th FG. 9.120 Using PSpice to plot the power to for rnge of vlues for. screen. Select spot ner Rvl, nd deposit the rectngle. The result is PARAMTRS: s shown in Fig. 9.120. Next doule-click on PARAMTRS: to otin Property ditor dilog ox which should hve SCHMATC1:PAG1 in the second column from the left. Now select the New Column option from the top list of choices to otin the Add New Column dilog ox. nter the Nme:Rvl nd Vlue:1 followed y n OK to leve the dilog ox. The result is return to the Property ditor dilog ox ut with Rvl nd its vlue (elow Rvl) dded to the horizontl list. Now select Rvl/1 y clicking on Rvl to surround Rvl y dshed line nd dd lck ckground round the 1. Choose Disply to produce the Disply Properties dilog ox, nd select Nme nd Vlue followed y OK. Then exit the Property ditor dilog ox (X) to otin the screen of Fig. 9.120. Note tht now the first vlue (1 ) of Rvl is displyed. We re now redy to set up the simultion process. Select the New Simultion Profile key to otin the New Simultion dilog ox. nter DC Sweep under Nme followed y Crete. The Simultion Settings-DC Sweep dilog ox will pper. After selecting Anlysis, select DC Sweep under the Anlysis type heding. Then leve the Primry Sweep under the Options heding, nd select Glol prmeter under the Sweep vrile. The Prmeter nme should then e entered s Rvl. For the Sweep type, the Strt vlue should e 1 ; ut if we use 1, the curve to e generted will strt t 1, leving lnk from 0 to 1. The curve will look incomplete. To solve this prolem, we will select 0.001 s the Strt vlue (very close to 0 ) nd the nd vlue 30.001 with n ncrement of 1. The vlues of RL will therefore e 0.001, 1.001, 2.001, etc., lthough the plot
Th COMPUTR ANALYSS 365 FG. 9.121 Plot resulting from the dc sweep of for the network of Fig. 9.120 efore defining the prmeters to e displyed. will look s if the vlues were 0, 1, 2, etc. Click OK, nd select the Run PSpice key to otin the disply of Fig. 9.121. First note tht there re no plots on the grph nd tht the grph extends to 35 rther thn 30 s desired. t did not respond with plot of power versus RL ecuse we hve not defined the plot of interest for the computer. This is done y selecting the Add Trce key (the key in the middle of the lower toolr tht looks like red swtooth wveform) or Trce-Add Trce from the top menu r. ither choice will result in the Add Trces dilog ox. The most importnt region of this dilog ox is the Trce xpression listing t the ottom. The desired trce cn e typed in directly, or the quntities of interest cn e chosen from the list of Simultion Output Vriles nd deposited in the Trce xpression listing. Since we re interested in the power to RL for the chosen rnge of vlues for RL, W(RL) is selected in the listing; it will then pper s the Trce xpression. Click OK, nd the plot of Fig. 9.122 will pper. Originlly, the plot extended from 0 to 35.Wereduced the rnge to 0 to 30 y selecting Plot-Axis Settings-X Axis-User Defined 0 to 30-OK. Select the Toggle cursor key (which looks like red curve pssing through the origin of grph), nd then left-click the mouse. A verticl line nd horizonl line will pper, with the verticl line controlled y the position of the cursor. Moving the cursor to the pek vlue will result in A1 9.0010 s the x vlue nd 100.000 W s the y vlue s shown in the Proe Cursor ox t the right of the screen. A second cursor cn e generted y right click of the mouse, which ws set t RL 30.001 to result in power of 71.005 W. Notice lso tht the
366 NTWORK THORMS Th FG. 9.122 A plot of the power delivered to in Fig. 9.120 for rnge of vlues for extending from 0 to 30. plot generted ppers s listing t the ottom left of the screen s W(RL). Before leving the suject, we should mention tht the power to RL cn e determined in more wys thn one from the Add Trces dilog ox. For exmple, first enter minus sign ecuse of the resulting current direction through the resistor, nd then select V2(RL) followed y the multipliction of (RL). The following expression will pper in the Trce xpression ox: V2(RL)*(RL), which is n expression hving the sic power formt of P V *. Click OK, nd the sme power curve of Fig. 9.122 will pper. Other quntities, such s the voltge cross the lod nd the current through the lod, cn e plotted ginst RL y simply following the sequence Trce-Delete All Trces-Trce- Add Trce-V1(RL) or (RL). PROBLMS 1 10 V 12 5 V 2 SCTON 9.2 Superposition Theorem 1.. Using superposition, find the current through ech resistor of the network of Fig. 9.123.. Find the power delivered to for ech source. c. Find the power delivered to using the totl current through. d. Does superposition pply to power effects? xplin. FG. 9.123 Prolem 1.