State Machines ELCTEC-131
Switch Debouncer A digital circuit that is used to remove the mechanical bounce from a switch contact. When a switch is closed, the contacts bounce from open to closed to cause false transitions. A simple debouncer is a cross-coupled NAND Latch. 2/15/2010 2009 Richard Lokken 2
Switch Debouncer 2/15/2010 2009 Richard Lokken 3
Unused States Some modulus counters, such as MOD- 10, have states that are not used in the counter sequence. The MOD-10 Counter would have 6 unused states (1010, 1011.1111) based on 4-bits. 2/15/2010 2009 Richard Lokken 4
Unused States An FSM can also have unused states, such as an SM, with only 5 bubbles in the state diagram (5-states). This FSM still requires 3 bits to represent these states so there will be 3 unused states. These unused states can be treated as don t cares (X) or assigned to a specific initial state. 2/15/2010 2009 Richard Lokken 5
State Diagram 2/15/2010 2009 Richard Lokken 6
Unused States Example Slide A five-variable state diagram is shown in the previous slide, with unused states assigned to the initial state = Start. The normal state sequence is Start Wait1 Wait2 Pulse1 Pulse2 and then back to Start. Any other states cause a transition back to Start. 2/15/2010 2009 Richard Lokken 7
Unused States Example Slide The Input (in1) Sequence of 101 causes the machine to advance from Start Wait1 Wait2. Then it does two unconditional transitions to Pulse1 and Pulse2. The Pulse1 and Pulse2 States generate two pulses on the Outputs (out1 and out2). 2/15/2010 2009 Richard Lokken 8
Unused States Example Slide Any unused states are given the value of Start (000) for its next state. For the FSM 3-Bit Register (FF), this generates the equations shown on the next slide. 2/15/2010 2009 Richard Lokken 9
Boolean Equations for SM D D D 2 1 0 out1 out2 = Q = Q = = = Q Q Q 2 2 2 2 2 Q Q 1 Q Q Q 1 0 Q Q 1 Q Q 1 0 0 0 0 + Q 2 in1 + Q 2 Q Q 1 1 0 Q in1 in1 2/15/2010 2009 Richard Lokken 10
Traffic Light FSM The FSM controls are for a North-South Road and an East-West road (see Figure 10.38 in textbook). This generates 3 Outputs for each road (nsr, nsy, nsg, and ewr, ewy, ewg) for the Red, Yellow, and Green Lights (Low = ON). 2/15/2010 2009 Richard Lokken 11
Requirements The cycle is controlled by an input called TIMER which controls the length of the two greenlight cycles (s0 represents the EW green; s2 represents the NS green.) When TIMER = 1, a transition from s0 to s1 or from s2 to s3 is possible. This accompanies a change from green to yellow on the active road. The light on the other road stays red. An unconditional transition follows, changing the yellow light to red on one road and the red light to green on the other. 2/15/2010 2009 Richard Lokken 12
Requirements The cycle can be set to any length by changing the signal on the TIMER input. (The yellow light will always be on for one clock pulse.) For ease of observation, we will use a cycle of ten clock pulses for any one road: 4 clocks GREEN, 1 clock YELLOW, 5 clocks RED. This can be generated by a mod-5 counter. 2/15/2010 2009 Richard Lokken 13
Logic Diagram for a Traffic Light Controller 2/15/2010 2009 Richard Lokken 14
Requirements The clock divider brings the on-board oscillator frequency down to the range of visible observation for our CPLD board. A 22-bit counter is suitable for the Altera DE-1. The clock divider is found on Blackboard or the CD in the text book. 2/15/2010 2009 Richard Lokken 15
State Diagram 2/15/2010 2009 Richard Lokken 16
Traffic Light FSM An Input called TIMER controls the length of a light cycle (TIMER = 1 causes a S0 to S1 or a S2 to S3 transition). When one light is green (S0(EW) or S2(NS)), the other is red. 2/15/2010 2009 Richard Lokken 17
Traffic Light FSM There is an unconditional timed transfer from yellow to red or red to green. A normal cycle is 4 clocks GREEN, 1 clock YELLOW, 5 clocks RED. 2/15/2010 2009 Richard Lokken 18
Traffic Controller with Walk Signal The machine resets to North-South red and East-West green (s0) and remains in this state until the TIMER input goes HIGH. Both walk signals are off. The machine transitions to s1 when TIMER = 1. East-West goes yellow 2/15/2010 2009 Richard Lokken 19
Requirements If the machine is in s1 and the North- South walk switch has not been pressed, the machine goes to s2. North-South is green for four clocks, until Timer = 1. East-West is red and both walk signals are off. The machine goes to s3 when TIMER = 1. Outputs are NS yellow and EW red. Walk signals are off. 2/15/2010 2009 Richard Lokken 20
Requirements If the machine is in s1 and the North-South walk switch has been pressed, the machine goes to a new state, s4, which behaves exactly the same as s2, except that the NS walk signal is now on. As long as TIMER = 0, the machine remains in s4, with North-South light green and East-West light red. When TIMER = 1, s4 makes a transition to s3. In this transition, the walk signal turns off and the latch reset output (NS_WALK_RESET) goes LOW for one clock pulse. Outputs are NS yellow and EW red. 2/15/2010 2009 Richard Lokken 21
Requirements If the machine is in s3 and the EW walk switch has not been pressed, the machine makes a transition to s0. Outputs are NS red and EW green. Walk signals are off. 2/15/2010 2009 Richard Lokken 22
Requirements If the machine is in s3 and the EW walk switch has been pressed, this is stored as the HIGH state of a latch output. This is sensed at input EW_WALK_SW on the state machine and there is a transition to s5. This behaves the same as s0, except that the EW walk signal is on. As long as TIMER = 0, the machine stays in s5, with outputs North-South red and East-West green. When TIMER = 1, the machine makes a transition to s1. The walk signal turns off and a LOW pulse on EW_WALK_RESET resets the EW latch. The outputs are now NS red and EW yellow. 2/15/2010 2009 Richard Lokken 23
Requirements Draw the modified state diagram for the controller. 2/15/2010 2009 Richard Lokken 24
Implementation Implement the modified design entirely in VHDL. For the D flip-flops, use the DFF component in Quartus II primitives library. In order to use the DFF primitives, the file requires the following two lines at the beginning: LIBRARY altera; USE altera.maxplus2.all; A VHDL component declaration for the latch can be found in the Quartus II Help menu under Primitives. 2/15/2010 2009 Richard Lokken 25
Logic Diagram for a Traffic Light Controller with a Walk Signal 2/15/2010 2009 Richard Lokken 26
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