LTC Precision Triple Supply Monitor for PCI Applications FEATRES Simultaneously Monitors V,.V and Adjustable Inputs Guaranteed Threshold Accuracy: ±.% Low Supply Current: µa Internal Reset Time Delay: ms Manual Pushbutton Reset Input Active Low and Active High Reset Outputs Active Low Soft Reset Output Power Supply Glitch Immunity Guaranteed Reset for Either V CC V or V CC V Meets PCI t FAIL Timing Specifications Rev. -Pin SO and MSOP Packages APPLICATIO S PCI-Based Systems Desktop Computers Notebook Computers Intelligent Instruments Portable Battery-Powered Equipment Network Servers DESCRIPTIO The LTC is designed for PCI local bus applications with multiple supply voltages that require low power, small size, high speed and high accuracy supply monitoring. For.V and V supplies that are >mv below spec or for the condition when the V supply falls below the.v supply, the LTC has a very fast response time capable of meeting the PCI t FAIL timing specification. Tight.% threshold accuracy and glitch immunity ensure reliable reset operation without false triggering. The output is guaranteed to be in the correct state for V CC or V CC down to V. The µa typical supply current makes the LTC ideal for power-conscious systems. A manual pushbutton reset input provides the ability to generate a very narrow soft reset pulse (µs typ) or a ms reset pulse equivalent to a power-on reset. Both S and outputs are open-drain and can be OR-tied with other reset sources., LTC and LT are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. TYPICAL APPLICATIO Motherboard PCI Generation Power Fail Waveform V Dropping Below.V by mv.v ±.V V ±% PWR GOOD.µF.µF V CC V CC V CCA GND LTC S PSHBTTON R P SELECTED TO MEET RISE TIME SLEW RATE REQIREMENTS (k MIN) R P PCI LOCAL BS TA VOLTAGE (V/DIV) V CC V CC = V TO V STEP V CC = V CCA =.V.k PLL-P FROM TO V CC TIME (ns/div) TA fa
LTC ABSOLTE AXI RATI GS W W W Terminal Voltage V CC, V CC, V CCA....V to V, S....V to V....V to V CC.V... V to V (Notes, ) Operating Temperature Range LTCC... C to C LTCI... C to C Storage Temperature Range... C to C Lead Temperature (Soldering, sec)... C PACKAGE/ORDER I FOR W ATIO V CC V CC V CCA GND TOP VIEW S MS PACKAGE -LEAD PLASTIC MSOP T JMAX = C, θ JA = C/W TOP VIEW V CC V CC V CCA GND S S PACKAGE -LEAD PLASTIC SO T JMAX = C, θ JA = C/W ORDER PART NMBER LTCCMS MS PART MARKING LTBV Order Options Tape and Reel: Add #TR Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF Lead Free Part Marking: http://www.linear.com/leadfree/ Consult LTC Marketing for parts specified with wider operating temperature ranges. ORDER PART NMBER LTCCS LTCIS S PART MARKING I ELECTRICAL CHARACTERISTICS The denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T A = C. V CC =.V, V CC = V, V CCA = V CC unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX NITS V RT Reset Threshold V CC C T A C.9.9. V C T A C.9.9. V V RT Reset Threshold V CC C T A C... V C T A C... V V RTA Reset Threshold V CCA C T A C.99.. V C T A C.9.. V V CC V CC or V CC Operating Voltage in Correct Logic State V I VCC V CC Supply Current = V CC µa I VCC V CC Input Current V CC = V µa I VCCA V CCA Input Current V CCA = V na t Reset Pulse Width Low with kω Pull-p to V CC C to C ms C to C ms t S Soft Reset Pulse Width S Low with kω Pull-p to V CC µs t V V CC ndervoltage Detect to V CC, V CC or V CCA Less Than Reset µs Threshold V RT by % fa
LTC ELECTRICAL CHARACTERISTICS The denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T A = C. V CC =.V, V CC = V, V CCA = V CC unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX NITS I Pull-p Current = V, C T A C µa = V, C T A C µa V IL, Input Low Voltage. V V IH, Input High Voltage V t PW Min Pulse Width ns t DB Debounce Deassertion of Input to S ms Output ( Pulse Width = µs) t PB Assertion Time for Transition Held Less Than V IL, C to C... s from Soft to Hard Reset Mode Held Less Than V IL, C to C... s V OL Output Voltage Low I SINK = ma.. V I SINK = µa V CC = V, V CC = V.. V C T A C V CC = V, V CC = V.. V V CC = V, V CC = V.. V I SINK = µa V CC =.V, V CC = V.. V C T A C V CC = V, V CC =.V.. V V CC =.V, V CC =.V.. V S Output Voltage Low I SINK =.ma.. V Output Voltage Low I SINK =.ma.. V V OH Output Voltage High (Note ) I SORCE = µa V CC V S Output Voltage High (Note ) I SORCE = µa V CC V Output Voltage High I SORCE = µa V CC V t PHL Propagation Delay to C = pf ns High Input to Low Output t PLH Propagation Delay to C = pf ns Low Input to High Output t FAIL V CC or V CC.V ndervoltage V CC Drops Below.V or V CC Drops ns to (Note ) Below.V (Note ) t PF V CC < (V CC mv) (Note ) V CC Drops Below V CC By mv 9 ns (Note ) Note : Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note : All voltage values are with respect to GND. Note : The output pins S and have weak internal pull-ups to V CC of µa. However, external pull-up resistors may be used when faster rise times are required. Note : Conforms to PCI Local Bus Specification Rev., Sect... for t FAIL. Note : V CC or V CC falling at.v/µs, time measured from V RTX mv to at.v. Note : V CC falling from V to V in ns, time measured from V CC = (V CC mv) to at.v. fa
LTC TYPICAL PERFORMANCE CHARACTERISTICS W I VCC (µa) I VCC IVCC (µa)........ I VCC INPT CRRENT (na) V CCA Input Current vs Input Voltage T A = C TEMPERATRE ( C) TEMPERATRE ( C)...9.9..... INPT VOLTAGE (V) G G G V CC THRESHOLD VOLTAGE, V RT (V).......... V CC Threshold Voltage. TEMPERATRE ( C) G V CC THRESHOLD VOLTAGE, V RT (V) V CC Threshold Voltage....99.99.9.9.9.9.9.9 TEMPERATRE ( C) G VCCA THRESHOLD VOLTAGE, VRTA (V) V CCA Threshold Voltage.......999.99.99.99.99 TEMPERATRE ( C) G Reset Pulse Width Soft Reset Pulse Width Assertion Time to Reset PLSE WIDTH, t (ms) 9 9 TEMPERATRE ( C) SOFT PLSE WIDTH, t S (µs)...... 9. 9. TEMPERATRE ( C) ASSERTION TIME TO, t PB (SEC).......9.9 TEMPERATRE ( C) G G G9 fa
LTC TYPICAL PERFORMANCE CHARACTERISTICS TYPICAL TRANSIENT DRATION (µs) W V CC Typical Transient Duration vs Reset Comparator Overdrive. OCCRS ABOVE CRVE.. V CC COMPARATOR OVERDRIVE, V RT V CC (V) G TYPICAL TRANSIENT DRATION (µs) V CC Typical Transient Duration vs Reset Comparator Overdrive OCCRS ABOVE CRVE... V CC COMPARATOR OVERDRIVE, V RT V CC (V) G TYPICAL TRANSIENT DRATION (µs) V CCA Typical Transient Duration vs Reset Comparator Overdrive OCCRS ABOVE CRVE... V CCA COMPARATOR OVERDRIVE, V RTA V CCA (V) G OTPT VOLTAGE (V)......... Output Voltage vs Supply Voltage V CC = V CC = V CCA.k PLL-P FROM TO V CC T A = C OTPT VOLTAGE (V)......... Output Voltage vs Supply Voltage V CC = V CC = V CCA PIN LOADED WITH MΩ TO GND T A = C............ SPPLY VOLTAGE, V CC (V).......... SPPLY VOLTAGE, V CC (V) G G ndervoltage Response Time Power-Fail Response Time VOLTAGE (mv/div) DEVICE THRESHOLD PCI SPEC t FAIL SPEC MARGIN V CC VOLTAGE (V/DIV) V CC V CC FALLING FROM.V TO.V AT (.V/µs) TIME (µs/div) TIME (ns/div) G G fa
LTC PIN FNCTIONS V CC (Pin ):.V Sense Input and Power Supply Pin for the IC. Bypass to ground with.µf ceramic capacitor. V CC (Pin ): V Sense Input. sed as gate drive for output FET when the voltage on V CC is greater than the voltage on V CC. V CCA (Pin ): V Sense, High Impedance Input. Can be used as a logic input with a V threshold. If unused it can be tied to either V CC or V CC. GND (Pin ): Ground. (Pin ): Reset Logic Output. Active high CMOS logic output, drives high to V CC, buffered compliment of. An external pull-down on the pin will drive this pin high. (Pin ): Reset Logic Output. Active low, open-drain logic output with weak pull-up to V CC. Can be pulled up greater than V CC when interfacing to V logic. Asserted when one or more of the supplies are below trip thresholds and held for ms after all supplies become valid. Also asserted after is held low for more than two seconds and for an additional ms after is released. S (Pin ): Soft Reset. Active low, open-drain logic output with weak pull-up to V CC. Can be pulled up greater than V CC when interfacing to V logic. Asserted for µs after is held low for less than two seconds and released. (Pin ): Pushbutton Reset. Active low logic input with weak pull-up to V CC. Can be pulled up greater than V CC when interfacing to V logic. When asserted for less than two seconds, outputs a soft reset µs pulse on the S pin. When is asserted for greater than two seconds, the output is forced low and remains low until ms after is released. BLOCK DIAGRAM W V CC V CC µa µa SOFT S TIMER TO POWER DETECT AND V CC INTERNAL V CC FAST SLOW V CC V CC µa FAST ms GENERATOR POWER DETECT/ GATE DRIVE V CC V CC V CC FAST TO POWER DETECT SLOW V CCA SLOW GND REF BD fa
LTC W W TI I G DIAGRA S V CC Monitor Timing Pushbutton Reset Function Timing V CCX V RTX t t < t PB t PB t t DB t S TD S TD t FAIL Fast ndervoltage Detect Power-Fail Detect V CC OR V CC V RTX SLEW RATE.V/µs mv V CC.V FALL TIME ns, V CC =.V mv t FAIL t PF TD TD APPLICATIONS INFORMATION Operation W The LTC is a low power, high accuracy triple supply monitoring circuit. This reset generator has two basic functions: generation of a reset when power supplies are out of range, and generation of a reset or soft reset when the reset button is pushed. The LTC has the added feature that when the reset supplies are grossly undervoltage there is a very short delay from undervoltage detect to assertion of. Supply Monitoring All three V CC inputs must be above predetermined thresholds for ms before the reset output is released. The LTC will assert reset during power-up, power-down and brownout conditions on any one or more of the V CC inputs. On power-up, either the V CC or V CC pin can power the drive circuits for the pin. This ensures that will be low when either V CC or V CC reaches V. As long as any one of the V CC inputs is below its predetermined threshold, will stay a logic low. Once all of the V CC inputs rise above their thresholds, an internal timer is started and is released after ms. outputs the inverted state of what is seen on. is reasserted whenever any one of the V CC inputs drops below its predetermined threshold and remains asserted until ms after all of the V CC inputs are above their thresholds. On power-down, once any of the V CC inputs drops below its threshold, is held at a logic low. A logic low of.v is guaranteed until V CC and V CC drops below V. Pushbutton Reset The LTC provides a pushbutton reset input pin. The input has an internal pull-up current source to V CC. If the pin is not used it can be left floating. fa
LTC APPLICATIONS INFORMATION W When the is pulled low for less than t PB ( sec), a narrow (µs typ) soft reset pulse is generated on the S output pin after the button is released. The pushbutton circuitry contains an internal debounce counter which delays the output of the soft reset pulse by typically ms. This pin can be OR-tied to the pin and issue what is called a soft reset. The S thereby resets the microprocessor without interrupting the DRAM refresh cycle. In this manner DRAM information remains undisturbed. Alternatively, S may be monitored by the processor to initiate a software-controlled reset. When the pin is held low for longer than t PB ( sec), a standard reset is generated. Once the -second period has elapsed, a reset signal is produced by the pushbutton logic, thereby clearing the reset counter. Once the pin is released, the reset counter begins counting the reset period (ms nominal). Consequently, the reset outputs remain asserted for approximately ms after the button is released. Fast ndervoltage for PCI Applications The LTC is designed for PCI Local Bus applications that require reset to be asserted quickly in response to one or both of the power supply rails (V and.v) going out of spec. The spec for t FAIL and t PF are met with enough margin to give the designer the ability to add follow-on logic as needed by system requirements. The V CCA pin can be used to monitor the power good signal and keep reset applied until both supplies are in spec and the power good signal is high. Glitch Immunity and Fast ndervoltage Detection The LTC achieves its high speed characteristics while maintaining glitch immunity by using two sets of comparators. The V CC and V CC sense inputs each have two comparators set at different thresholds. A slow, very accurate comparator monitors the supply for precision undervoltage detection. In parallel, but with a threshold mv lower than the precision threshold, is a very fast comparator that detects when the supply is quickly going out of specification. Because the fast comparator threshold is set mv above the PCI specification, typical values for t FAIL can be negative. V or V Power Detect/Gate Drive The LTC for the most part is powered internally from the V CC pin. The exception is at the gate drive of the output FET on the pin. On the gate to this FET is power detect circuitry used to detect and drive the gate from either the.v pin or the V pin, whichever pin has the highest potential. This ensures the part pulls the pin low as soon as either input pin is V. Extended ESD Tolerance of the Input Pin The pin is susceptible to ESD since it can be brought out to a front panel in normal applications. The ESD tolerance of this pin can be increased by adding a resistor in series with the pin. A k resistor can increase the ESD tolerance of the pin to approximately kv. The s internal pull-up current of µa typical means there is only mv (mv max) dropped across the resistor. TYPICAL APPLICATIONS N PCI LOCAL BS PCI Expansion Board Generation.V SPPLY.µF V SPPLY.µF LTC V CC V CC V CCA GND S ONBOARD DEVICE TA Dual Supply Monitor (.V and V, V CCA Input Monitoring Power Good ).V V PWR GOOD V CC V CC V CCA GND LTC S SYSTEM TA fa
LTC TYPICAL APPLICATIONS N Triple Supply Monitor (.V, V and Adjustable) Valid for V CC Down to V in a Dual Supply Application ADJSTABLE SPPLY OR DC/DC FEEDBACK DIVIDER R.V V R LTC V CC V CC S V CCA GND k* PSHBTTON SYSTEM.V V LTC V CC V CC S V CCA GND k SYSTEM *OPTIONAL RESISTOR EXTENDS ESD TOLERANCE OF INPT kv TO kv TA TA9 S Tied to and OR-Tying Other Sources to to Generate Reset and Reset sing V CCA Tied to DC/DC Feedback Divider LTC µa µa V CC S PSHBTTON.V.k OTHER OPEN DRAIN SORCES OR-TIED TO LTC V OSENSE ADJSTABLE TRIP THRESHOLD.V.9V.k %.k %.k %.V V LTC V CC V CC S V CCA GND SYSTEM TA TA fa 9
LTC PACKAGE DESCRIPTION MS Package -Lead Plastic MSOP (Reference LTC DWG # --).9 ±. (. ±.). (.) MIN.. (..). ±. (. ±.) TYP. (.) BSC. ±. (. ±.) (NOTE ). (.) REF RECOMMENDED SOLDER PAD LAYOT GAGE PLANE. (.). (.) DETAIL A NOTE:. DIMENSIONS IN MILLIMETER/(INCH). DRAWING NOT TO SCALE TYP. ±. (. ±.) DETAIL A SEATING PLANE.9 ±. (.9 ±.). (.) MAX.. (.9.) TYP. (.) BSC. DIMENSION DOES NOT INCLDE MOLD FLASH, PROTRSIONS OR GATE BRRS. MOLD FLASH, PROTRSIONS OR GATE BRRS SHALL NOT EXCEED.mm (.") PER SIDE. DIMENSION DOES NOT INCLDE INTERLEAD FLASH OR PROTRSIONS. INTERLEAD FLASH OR PROTRSIONS SHALL NOT EXCEED.mm (.") PER SIDE. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE.mm (.") MAX. ±. (. ±.) (NOTE ). (.) REF. ±. (. ±.) MSOP (MS) fa
LTC PACKAGE DESCRIPTION S Package -Lead Plastic Small Outline (Narrow. Inch) (Reference LTC DWG # --). BSC. ±..9.9 (..) NOTE. MIN. ±... (.9.9).. (..9) NOTE. ±. TYP RECOMMENDED SOLDER PAD LAYOT.. (..).. (..) TYP..9 (..).. (..).. (..) NOTE: INCHES. DIMENSIONS IN (MILLIMETERS)..9 (..) TYP. DRAWING NOT TO SCALE. THESE DIMENSIONS DO NOT INCLDE MOLD FLASH OR PROTRSIONS. MOLD FLASH OR PROTRSIONS SHALL NOT EXCEED." (.mm). (.) BSC SO Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. fa
LTC TYPICAL APPLICATIONS N Quad Supply Monitor: V: ndervoltage, Overvoltage V: ndervoltage, Overvoltage.V: ndervoltage, Overvoltage V: ndervoltage.v ±.V V ±% V ±%.M % 9.M %.M %.M %.M M LTC A B C V.µF.M % k % PWR GOOD V OPTIONAL LTC V CC V CC S V CCA GND k SYSTEM D V ±%.M %.M % HYST REF.V 9 TA RELATED PARTS PART NMBER DESCRIPTION COMMENTS LTC9 V Supply Monitor, Watchdog Timer and Battery Backup.V Threshold LTC9-..V Supply Monitor, Watchdog Timer and Battery Backup.9V Threshold LTC99 V Supply Monitor and Watchdog Timer.V Threshold LTC V Supply Monitor, Watchdog Timer and Pushbutton Reset.V/.V Threshold LTC Micropower Precision Triple Supply Monitor.V,.V, V Thresholds (±.%) LTC-. Micropower Precision Triple Supply Monitor.V,.V, V Thresholds (±.%) Linear Technology Corporation McCarthy Blvd., Milpitas, CA 9- () -9 FAX: () - www.linear.com fa LT REV A PRINTED IN THE SA LINEAR TECHNOLOGY CORPORATION 99