Logic design? CS/COE0447: Computer Organization and Assembly Language Logic Design Review Digital hardware is implemented by way of logic design Digital circuits process and produce two discrete values: 0 and Example: -bit full adder (FA) Sangyeun Cho Dept. of Computer Science 2 Layered design approach Transistor as a switch Logic design is done using logic gates Often we design desired function using high-level languages and somewhat higher level than logic gates Two approaches in design Top down Bottom up G N -type TR X X G= G=0 X Microarchitecture X X X Function blocks Logic gates G G=0 G= Transistors P -type TR 3 4
An inverter When A = P -type TR P -type TR OFF A A= =0 N -type TR N -type TR ON 0 0 5 6 When A = 0 Abstraction P -type TR ON P -type TR A=0 = A A N -type TR OFF N -type TR 0 0 7 8
Logic gates Describing a function 2-input AND A B =A & B Output A = F(Input 0, Input,, Input N ) Output B = F (Input 0, Input,, Input N ) Output C = F (Input 0, Input,, Input N ) 2-input OR A B =A B Methods 2-input NAND A B =~(A & B) Truth table Sum of products Product of sums 2-input NOR A B =~(A B) 9 0 Truth table Sum of products Input Output A B C in S C out 0 0 0 0 0 0 0 0 0 0 0 0 0 Input Output A B C in S C out 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 S = A B C ABC in + A BC in + AB C in + ABC in C out = A BC in + AB C in + ABC in + ABC in 2
Combinational vs. sequential logic Combinational logic Combinational logic = function A function whose outputs are dependent only on the current inputs As soon as inputs are known, outputs can be determined Sequential logic = combinational logic + memory Some memory elements (i.e., state ) Outputs t are dependent d on the current state t and the current inputs Next state is dependent on the current state and the current inputs inputs outputs 3 4 Sequential logic Combinational logic Any combinational logic can be implemented using sum of products or product of sums inputs outputs Input-output relationship can be defined in the truth table format From the truth table, each output function can be derived current state next state Boolean expressions can be further manipulated (e.g., to reduce cost) using various Boolean algebraic rules clock 5 6
Boolean algebra Boolean algebra Boole, George (85~864): mathematician and philosopher; inventor of Boolean Algebra, the basis of all computer arithmetic Binary values: {0,} Two binary operations: AND ( / ), OR (+) One unary operation: NOT (~) Binary operations: AND ( / ), OR (+) Idempotent a a = a+a= a Commutative a b = b a a+b = b+a Associative a (b c) = (a b) c a+(b+c) = (a+b)+c Distributive a (b+c) = a b + a c a+(b c) = (a+b) (a+c) 7 8 Boolean algebra Expressive power De Morgan s laws ~(a+b) = ~a ~b ~(a b) = ~a+~b More a+(a b) = a a (a+b) = a ~~a = a a+~a = a (~a) = 0 With AND/OR/NOT, we can express any function in Boolean algebra Sum (+) of products ( ) What if we have NAND/NOR/NOT? What if we have NAND only? What if we have NOR only? 9 20
Multiplexor (aka MUX) A 32-bit MUX A 0 B S = (S)? B:A; 2 22 Simplifying expressions Karnaugh map Input Output A B C in S C out 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BC in A 0 00 0 0 0 0 AC in BC in C out = A BC ABC in + AB C in + ABC in + ABC in C out = BC in + AC in + AB 0 0 AB C out = BC in +AB+AC in 23 24
Building a -bit ALU Building a 32-bit ALU ALU = arithmetic logic unit = arithmetic unit + logic unit 25 26 Implementing sub Implementing NAND and NOR 27 28
Implementing SLT (set-less-than) than) Implementing SLT (set-less-than) than) -bit ALU for bits 0~30 -bit ALU for bit 3 29 30 Supporting BEQ and BNE Abstracting ALU zero detector Note that ALU is a combinational logic 3 32
RS latch RS latch 0 0 0 Beware of the feedback! When R=0, S= 33 34 RS latch RS latch 0 0 0 0 0 0 0 When R=, S=0 When R=0, S=0, and Q was 0 35 36
RS latch RS latch 0 0 0 0 When R=0, S=0, and Q was What happens if R=S= 37 38 D latch D latch R S Note that we have an RS latch in the back-end of this design Note that R, S inputs always get opposite values when C= When C=0, S=R=0 RS latch remembers the previous value 39 40
D latch D latch D Q latched mode D Latch R C D Q(t) C Q 0 0 Q(t-) 0 Q(t-) 0 0 S transparent mode 4 42 D flip-flop flop (D-FF) D flip-flop flop D Q D-FF C Q Two cascaded D latches; C input of the second is inverted This is a negative edge triggered D-FF 43 44
Finite state machine (FSM) Traffic light control example Two states NSlite: green light on North-South road EWlite: green light on East-West road Current state goes for 30 seconds, then Switch to the other state if there is a car waiting Current state goes for another 30 seconds if not We use /30 Hz clock 45 46 Traffic light control example Traffic light control example 47 48
Traffic light control example How do I implement a logic design? Let s assign g 0 to NSlite and to EWlite initiallyy Various ways y to implement p yyour design g NextState = CurrentState EWcar + CurrentState NScar NSli = CurrentState NSlite C S EWlite = CurrentState Use 74* chips (you may need many of those for even a very simple design) Use PLA (Programming g g Logic g Array) y Use FPGA (Field Programmable Gate Array) ASIC (A (Application li ti S Specific ifi IIntegrated t t d Ci Circuits) it ) Most capable approach (in terms of design size and performance); however, there is a large fixed development cost. This Thi approach h is i justified j tifi d only l ffor volume l products d t 49 Using 74* 74 chips 50 Using 74* 74 chips Breadboard +74* chips 5 52
Using a PLA PLA design of ALU control logic It s a programmable device ou can implement your own (complex) combinational logic (=function) using a single PLA A PLA device is much more capable than individual 74* chips Much denser (that means you can implement many functions) products Internally, PLA implements a function of the sum-ofproduct format AND plane for product terms OR plane for summing products sums 53 54 FPGA To wrap up FPGA is even more capable (millions of gates) Combinational logic Sequential logic Memory arrays Even some embedded d microprocessor cores I/O support such as Ethernet MAC (media access control) block Best of all, it s field programmable and affordable In digital logic, transistors are used as simple switches Logic gates are an abstraction of a transistor network A combinational i logic block has inputs and outputs whose values are immediately determined as inputs become known A sequential logic block is composed of a combinational logic block and memory elements 55 56
To wrap up To wrap up Boolean algebra provides a theoretical foundation for digital logic Starting from two transistors (N-type and P-type), we ve built logic gates and more complex structures (bottom up) Flip-flops p (FFs) were used as a memory element A finite state machine (FSM) can be implemented using FFs and some combinational logic An ALU for the MIPS architecture has been built! 57 58