Biasing the CE Amplifier Graphical approach: plot I C as a function of the DC base-emitter voltage (note: normally plot vs. base current, so we must return to Ebers-Moll): I C I S e V BE V th I S e V th = = ( forward active) Load line for R C = 0 kω; range of variation for is only 600 mv - 660 mv I C (ma).0 0.66 (V) 0.5 4 0.64 3 0.62 0 2 3 4 2 5 0.6 V CE = V OUT (V) V OUT 5 V 2 High- Gain Region 3 4 0.62 V
Transfer Curve The load line was plotted, assuming that V CC = 5 V and that the collector resistor R C = 0 kω, with the equation: I C = ------ ( VCC V R OUT ) C The transfer curve is defined by intersections between the load line I C (V OUT ) and the family of collector current characteristics I C (, V OUT ) Where to operate? Maximize potential swing in v OUT by placing V OUT halfway between cutoff and saturation... (5 V 0.2 V)/2 = 2.5 V (approx.) Solve for the input bias voltage: I S = 0-5 A V CC V OUT V CC I C = ------------------------------- ---------- = 0.25 R C 2R C ma V th ln I C 250 µa = ----- = ( 26 mv) ln ------------------- I S 0 5 = A 682 mv The operating point is defined by: Q(V BE = 0.682 V, V CE = 2.5 V, I C = 250 µa)
Small-Signal Model of CE Amplifier The small-signal model is evaluated at Q; we assume that the current gain is β o = 00 and the Early voltage is V An = 25 V: g m = I C / V th = 0 ms (at room temperature) r π = β o / g m = 0 kω r o = V An / I C = 00 kω Substitute small-signal model for BJT; V CC and are short-circuited for small-signals v π r π g m v π r o R v C out _ R S v s v π r π g m v π r o R C R L
Two-Port Model: CE Amplifier Use transconductance amplifier form for model (not mandatory) R in = r π, R out = r o R C, G m = g m by inspection v in R G m v in v in = r π R out = r o R C out _ R S v s v in R v in = r π G m v in R out = r o R C out _ R L Loaded ratio of to v in R out G m ------------------------ = R out R L r o R C g m ----------------------------- r o R C R L Increasing R C seems desirable for increasing / v in... but note that the DC collector current decreases for a fixed V CC --> g m decreases
Common-Source Amplifier Configuration is similar to common-emitter V DD V DD R D R D i OUT = I OUT v s R S v OUT = V OUT R L V OUT _ Bias: remove source and load resistances
Graphical Load-Line Analysis Load line is given by: I D = ( V DD V OUT ) R D I D (ma).0 0.9 4 (V) 0.5 4 3 0.25 3 2.5 0.0 0 2 2 V Tn = V 2 3 4 5 V DS = V OUT (V) V OUT 5 V 2 High- Gain Region 3 4 2.5 V
Small-Signal Model of CS Amplifier Substitute parameters at operating point selected so that V OUT V DD 2 v gs g m v gs r o R D R S v s v gs g m v gs r o R D R L Transconductance is proportional to I D /2 unlike bipolar transistor
Two-Port Model of Common-Source Amplifier Use transconductance amplifier form for model (most natural choice) R in = infinty, R out = r o R D, G m = g m by inspection v in G m v in R out = r o R D R S v s v in G m v in R out = r o R D RL Infinite input resistance is ideal for a voltage input Output resistance increases with R D increasing, but DC drain current I D will decrease and g m will decrease with I D /2
Current-Source Supplies A current source to supply current, rather than a resistor, allows a high DC current for the device with a large incremental (small-signal) resistance i SUP v SUP i SUP v SUP I SUP r oc i SUP I SUP r oc r oc v SUP (c)
Common-Source with Current Source Supply R D is replaced with idealized current source with internal resistance V DD V DD i SUP ISUP i OUT = I OUT R S v s v OUT = V OUT R L V OUT For DC bias analysis, the small-signal source (with R S ) and the load resistor R L are eliminated, along with the internal resistance r oc of the current source
Graphical Analysis of CS Amplifier with Current-Source Supply I D (ma).0 0.9 4 V 0.5 3 V 0.25 4 3 2 2.5 V 0.0 0 2 3 4 5 2 V V Tn = V V DS = V OUT (V) V DD 2 High- Gain Region 3 0 0 2.5 V 4 The region of input bias voltage for which the current source and the MOSFET are in their constant-current regions is extremely small...
Common-Source/Current-Source Supply Models The small-signal model is identical to the resistor supply, except that the current source s internal resistance r oc replaces R D v gs g m v gs r o r oc Two-port model in both transconductance and voltage amplifier forms (the latter by direct conversion from the former... by applying procedure for finding A v ) R out v in G m v in R out v in A v v in = G m R out v in
p-channel Common-Source Amplifier Source of p-channel is tied to positive supply; current supply sinks I SUP to ground or to lower supply V DD V DD R S v s i OUT = I OUT i SUP v OUT = V OUT _ R L I SUP V OUT _ Small-signal model: substitute p-channel model directly
p-channel CS Small-Signal Model Source is at top, but circuit can be inverted to show correspondence with n- channel common-source amplifier s v sg g m v sg r o r oc g d g d v sg g m v sg r o r oc s g d v gs g m v gs r o r oc s (c)
Common Base / Common Gate Amplifiers Input signal is applied to the emitter, output is taken from the collector Summary: current gain is about unity, input resistance is low, output resistance is high a CB stage is a good current buffer... it takes a current at the input that may have a relatively small Norton resistance and replicates it at the output port, which is a good current source due to the high output resistance. V V i SUP I SUP i OUT I OUT R L i s R S I BIAS I BIAS V V Biasing is very easy... I BIAS = - I SUP, with a small correction factor due to the fact that β F isn t infinity
Common-Base Current Gain A i Small-signal circuit, with output shorted (according to the procedure) i b v π r π g m v π = β o i b r o v e r oc i t Analysis: = i c β o i b and i c = i e i b = i t i b = i t -------- β o Solving for the short-circuit current gain: A i = -------- i t β o = -------------- β o