74VHC138 3-to-8 Decoder/Demultiplexer

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74HC138 3-to-8 Decoder/Demultiplexer General Description The HC138 is an advanced high speed CMOS 3-to-8 decoder/demultiplexer fabricated with silicon gate CMOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. When the device is enabled, 3 binary select inputs (A 0, A 1 and A 2 ) determine which one of the outputs (O 0 O 7 ) will go LOW. When enable input E 3 is held LOW or either E 1 or E 2 is held HIGH, decoding function is inhibited and all outputs go HIGH. E 3, E 1 and E 2 inputs are provided to ease cascade connection and for use as an address decoder for memory systems. An input protection circuit eures that November 1992 Revised April 1999 0 to 7 can be applied to the input pi without regard to the supply voltage. This device can be used to interface 5 to 3 systems and two supply systems such as battery back up. This circuit prevents device destruction due to mismatched supply and input voltages. Features High Speed: t PD = 5.7 (typ) at T A = 25 C Low power dissipation: I CC = 4 µa (max.) at T A = 25 C High noise immunity: NIH = NIL = 28% CC (min.) Power down protection provided on all inputs Pin and function compatible with 74HC138 74HC138 3-to-8 Decoder/Demultiplexer Ordering Code: Order Number Package Number Package Description 74HC138M M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow 74HC138SJ M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74HC138MTC MTC16 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 74HC138N N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter X to the ordering code. Logic Symbols Connection Diagram IEEE/IEC Pin Descriptio Pin Names A 0 A 2 E 1 E 2 E 3 O 0 O 7 Description Address Inputs Enable Inputs Enable Input Outputs 1999 Fairchild Semiconductor Corporation DS011537.prf www.fairchildsemi.com

74HC138 Truth Table Inputs Outputs E 1 E 2 E 3 A 0 A 1 A 2 O 0 O 1 O 2 O 3 O 4 O 5 O 6 O 7 H X X X X X H H H H H H H H X H X X X X H H H H H H H H X X L X X X H H H H H H H H L L H L L L L H H H H H H H L L H H L L H L H H H H H H L L H L H L H H L H H H H H L L H H H L H H H L H H H H H = HIGH oltage Level L = LOW oltage Level X = Immaterial L L H L L H H H H H L H H H L L H H L H H H H H H L H H L L H L H H H H H H H H L H L L H H H H H H H H H H H L www.fairchildsemi.com 2

Absolute Maximum Ratings(Note 1) Supply oltage ( CC ) 0.5 to +7.0 DC Input oltage ( IN ) 0.5 to +7.0 DC Output oltage ( OUT ) 0.5 to CC + 0.5 Input Diode Current (I IK ) 20 ma Output Diode Current (I OK ) ±20 ma DC Output Current (I OUT ) ±25 ma DC CC /GND Current (I CC ) ±75 ma Storage Temperature (T STG ) 65 C to +150 C Lead Temperature (T L ) (Soldering, 10 seconds) 260 C DC Electrical Characteristics Recommended Operating Conditio (Note 2) Supply oltage ( CC ) 2.0 to +5.5 Input oltage ( IN ) 0 to +5.5 Output oltage ( OUT ) 0 to CC Operating Temperature (T OPR ) 40 C to +85 C Input Rise and Fall Time (t r, t f ) CC = 3.3 ± 0.3 0 100 / CC = 5.0 ± 0.5 0 20 / Note 1: Absolute Maximum Ratings are values beyond which the device may be damaged or have its useful life impaired. The databook specificatio should be met, without exception, to eure that the system design is reliable over its power supply, temperature, and output/input loading variables. Fairchild does not recommend operation outside databook specificatio. Note 2: Unused inputs must be held HIGH or LOW. They may not float. 74HC138 T Symbol Parameter CC A = 25 C T A = 40 C to +85 C () Min Typ Max Min Max IH HIGH Level Input oltage 2.0 1.50 1.50 Units Conditio 3.0 5.5 0.7 CC 0.7 CC IL LOW Level Input oltage 2.0 0.50 0.50 3.0 5.5 0.3 CC 0.3 CC OH HIGH Level Output oltage 2.0 1.9 2.0 1.9 IN = IH I OH = 50 µa 3.0 2.9 3.0 2.9 or IL 4.5 4.4 4.5 4.4 3.0 2.58 2.48 I OH = 4 ma 4.5 3.94 3.80 I OH = 8 ma OL LOW Level Output oltage 2.0 0.0 0.1 0.1 IN = IH I OL = 50 µa 3.0 0.0 0.1 0.1 or IL 4.5 0.0 0.1 0.1 3.0 0.36 0.44 I OL = 4 ma 4.5 0.36 0.44 I OL = 8 ma I IN Input Leakage Current 0 5.5 ±0.1 ±1.0 µa IN = 5.5 or GND I CC Quiescent Supply Current 5.5 4.0 40.0 µa IN = CC or GND 3 www.fairchildsemi.com

74HC138 AC Electrical Characteristics Symbol Parameter T CC A = 25 C T A = 40 C to +85 C () Min Typ Max Min Max Units Conditio t PLH Propagation Delay 3.3 ± 0.3 8.2 11.4 1.0 13.5 t PHL A n to O n 10.0 15.8 1.0 18.0 C L = 50 pf 5.0 ± 0.5 5.7 8.1 1.0 9.5 7.2 10.1 1.0 11.5 C L = 50 pf t PLH Propagation Delay 3.3 ± 0.3 8.1 12.8 1.0 15.0 t PHL E 3 to O n 10.6 16.3 1.0 18.5 C L = 50 pf 5.0 ± 0.5 5.6 8.1 1.0 9.5 7.1 10.1 1.0 11.5 C L = 50 pf t PLH Propagation Delay 3.3 ± 0.3 8.2 11.4 1.0 13.5 t PHL E 1 or E 2 to O n 10.7 14.9 1.0 17.0 C L = 50 pf 5.0 ± 0.5 5.8 8.1 1.0 9.5 7.3 10.1 1.0 11.5 C L = 50 pf C IN Input Capacitance 4 10 10 pf CC = Open C PD Power Dissipation 34 pf (Note 3) Capacitance Note 3: C PD is defined as the value of the internal equivalent capacitance which is calculated from the operating current coumption without load. Average operating current can be obtained by the equation: I CC (opr.) = C PD * CC * f IN + I CC. www.fairchildsemi.com 4

Physical Dimeio inches (millimeters) unless otherwise noted 74HC138 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow Package Number M16A 16-Lead Small Outline Package (SOP) EIAJ TYPE II, 5.3mm Wide Package Number M16D 5 www.fairchildsemi.com

74HC138 Physical Dimeio inches (millimeters) unless otherwise noted (Continued) 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC16 www.fairchildsemi.com 6

Physical Dimeio inches (millimeters) unless otherwise noted (Continued) 74HC138 3-to-8 Decoder/Demultiplexer 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Package Number N16E LIFE SUPPORT POLICY FAIRCHILD S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with itructio for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com Fairchild does not assume any respoibility for use of any circuitry described, no circuit patent licees are implied and Fairchild reserves the right at any time without notice to change said circuitry and specificatio.