16th IEEE International Conference on Advanced Thermal Processing of Semiconductors - RTP28 Low Temperature Microwave Annealing of S/D Bo Lojek Atmel Corporation 115 E. Cheyenne Mtn. Blvd. Colorado Springs, CO 896 blojek@atmel.com Microwave annealing of ion-implanted layers in semiconductors is an emerging application of thermal processing of semiconductors, with low processing temperature eliminating unwanted diffusion as the main potential advantage. In this work, requirements and limitations of the microwave processing chamber are discussed first, and secondly, for the first time, results from a processed manufacturing lot using microwave annealing are discussed. The achieved results show that is feasible to achieve the same level of activation of implanted layers as in conventional high temperature RTP processing using the microwave at temperatures below 4 o C, and equivalent processing time. Introduction The S/D extension junction depth of current generation of MOS devices is approaching 1 Å. To activate such shallow implanted layers, annealing time and temperatures must be precisely controlled in order to minimize the diffusion movement. To solve this problem, industry turned to thermal processes, such are laser annealing or flash annealing. Such processes still rely on very high temperature exposure; only the time of the exposure is reduced. There are numerous problems with such technologies: poor reproducibility, dependence on the wafer reflectivity and absorption, extremely high cost of processing, etc. For these reasons there is a significant desire to find a less expensive, more controllable, and low temperature version of processing. Recently, microwave annealing was introduced as possible alternative to high temperature processing. As we push the technological envelope, however, real physical phenomena often cause breakdowns in our assumptions. Basic physical properties, such are conductivity and dielectric constant, became the complex quantities and there is 978-1-4244-1951-7/8/$25. 978-14244-195-/8/$25. 28 IEEE none or limited knowledge of such parameters. Although the microwave investigation of lightly doped material goes back to the nineteen fifties, when W. Shockley did the first observations of carrier conductivity under influence of microwave field, there was almost no progress made for several decades. In this work, for the first time, microwave annealing was applied to the real product, where the standard annealing step of S/D extension is performed in conventional RTP system. Half of the production lot was processed in RTP system, the second half was processed in the experimental multimode microwave chamber operating at 5.8 GHz. Scope of the Work Annealing of the semiconductor using microwaves was reported by several groups: Thompson and Booske group [ 1 ] reported dopant activation using electromagnetic induction heating, and high power microwave heating (3 MHz 1 GHz). Similar work was reported by Bykov group [ 2 ]. Both groups basically emulated rapid thermal processing when a
wafer is heated to high temperature (~ 1 o C) for a short period of time. The presented data are not conclusive: in work [ 3 ] is argued without any experimental evidence that presence of microwave field leads to nonthermal effects with anomalous reduction of activation energy for diffusion. Such effect is exactly what we want to avoid in this work. Here, we are interested only in low temperature annealing (below 4 o C) of ion-implanted silicon substrates. It is the goal of this work, to eliminate the thermal component of the annealing, which is causing so-called epitaxial re-crystallization in the range of medium temperatures (< 6 o C), and diffusion at higher temperatures. Because the evaluation of the annealed implanted layer in un-patterned wafers cannot be performed by electrical methods, in this work we report data for.25 μm N-MOS transistor with BF 2 Source/Drain extension. This approach allows direct comparison of results with identical samples processed in AST 28 systems. Another advantage of this approach, is that we can collect reasonable, statistical numbers from measurement on wafers in lot. does not result in any significant change of resistivity. For this reason, it is appropriate to redefine the microwave annealing as shown in Fig. 1 (μw 28). We can distinguish between two different methods: (i) exposure to high power for time shorter than 1 sec when wafer reach temperatures in range 9-11 o C; (ii) exposure to low power for period of time in range of second to minutes with wafer temperatures below 4 o C. Processing Chamber Published literature describing microwave processing of materials reveal very little details about the construction of the processing chamber. The main strength of flat wall (rectangular, hexagonal, etc.) chamber is the possibility of high order of mode degeneration. For example, up to twelve modes can be made to resonate at the frequency of operation in a cubical chamber. However, cavities with high order modes exhibit a great fluctuation of the field distribution, resulting in non-uniformity of processed samples. Frequency variation and/or the field distribution using metallic blades have been suggested to overcome this problem. The frequency variation at the power levels needed for processing of 2 or 3 mm is not easy, and metallic blades are causing high voltage arcs, with unpredictable results. Fig. 1. Definition of microwave annealing in comparison with other techniques [ 4 ]. In [4] author presented definition of microwave processing of semiconductor (μw27 in Fig. 1). After gaining more experiences with microwave processing, it was found that exposure to microwave field for time longer than approximately 3 sec, Fig. 2. Experimental microwave annealing chamber. In this work, we examine the possibility of producing uniform fields, using cylindrical cavities with special excitation launcher, which create a more homogenous field distribution. The excitation power is guided by launcher in direction perpendicular to the wafer backside plane. The processed wafer is stirred in two different directions. The chamber
Fig. 3. Example of electric field distribution for mode 152 in multimode processing chamber Fig. 4. Example of electric field distribution for mode 125 in multimode processing chamber dimensions is designed for processing of 15 mm wafers only, because our microwave source is not capable of delivering power levels needed for bigger wafer diameters. The polished (or the product side) of the wafer is facing a top chamber plate witch chromate, iconel composite, or other appropriate treatment. The experimental set up, with removed top chamber wall is shown in Fig. 2. The properly designed chamber should support in a given frequency range a large number of resonant modes. For an empty chamber, each of these modes is characterized by a sharp resonance response, at a given frequency, as shown in Fig. 3 and Fig. 4. It is important to arrange for as many of these modes as possible to lie near the operating frequency of the magnetron source, which excite the microwave
energy to the chamber. When the chamber is filled with an absorbent workload, the Q-factor of each mode is reduced as shown in Fig. 5. When the spectral density is high enough, the resonance curves of the modes will overlap in frequency to give a continuous coupling of energy to the processed wafer. As the dielectric constant of the wafer is greater than 1, the spectral density will also be increased from the empty state, which gives additional overlap to the modes. dielectric loss (lossy materials) does not couple to electromagnetic field well, and a significant portion of the energy is converted to thermal energy within the material. ε = ε ε ε [F/cm] (, i,, ) Lossy materials are often characterized by the loss tangent:,, ε tan δ =, ε The power dissipated in the form of heat into a finitesized element dv of material can be described by the relationship:,, 2 dp ωε ε E dv d = [W] Fig. 5. Frequency shift and damping of the mode patterns due to the loading effect. However, no matter how much individual modes overlap, the field distribution is given by the sum of all modes excited at a given frequency, each mode giving a basic sinusoidal power variation in space along the principal coordinate axis and satisfying the field equations. There is, therefore, fundamentally a spatial non-uniformity distribution of heating within a multi-mode chamber. To improve this undesirable effect the wafer is moving in two directions. Theory In order to establish interaction between microwave field and semiconductor, some of the energy carried in the electromagnetic field must be transferred to the semiconductor. Two fundamental properties of a material govern this interaction are real part of dielectric constant (permittivity) ε, and imaginary part of dielectric constant (dielectric loss factor) ε. The complex permittivity describes the influence of conduction band charge carriers on the propagation of electromagnetic waves, and therefore is a function of carrier concentration. Material with a high The electric field components exert a force on the charged particles on an atomic scale within the material. This force is resisted within the material by the atomic and molecular bonds of the molecules. The resulting intermolecular friction dissipates some of the electric field energy within the material as heat. In lossy materials, there are four primary modes of energy dissipation; each dominating different frequencies of excitation that may, or may not, lie in the microwave frequency range: 1) Space charge polarization this mode occurs at low excitation frequencies and requires some free electrons. The electric field causes the free electrons to move through the material, until some boundary is reached where electrons accumulate and create a localized, electrically polarized region. 2) Dipole polarization this mode occurs at millimeter and centimeter frequencies, and it is a fundamental mode of energy transfer in microwave heating. The charged particles are displaced from their equilibrium positions by electromagnetic field, and form induced dipoles, which respond to applied field.
3) Atomic polarization this mode occurs in materials excited at IR frequencies, with energy transfer between separated positive and negative ions. 4) Electronic polarization this mode is similar to dipole alignment, and occurs at very high frequencies (near UV). The heavy atomic core is too heavy to respond to the rapidly changing electromagnetic field, but surrounding electrons with negative charge will vibrate around the nucleus. For microwave processing of semiconductors the dipole and electronic polarization are dominant modes of energy dissipation. The only question is: which entity can form the dipole? Impurity states in semiconductors are typically treated as isolated entities. At a finite concentration N, however, the impurities have an average nearest neighbor separation of approximately N -1/3. At sufficiently high N ~ 1 18 cm -3 for Si, neighboring impurities are sufficiently close, that their wave functions overlap enough to produce a significant perturbation of the energy levels. The energy levels broaden out into a band, called an impurity band. The assumption of periodicity of the impurity sites is, of course, not valid for real ion-implanted semiconductors, where the crystal lattice is disordered. The energies of impurity states are not confined by edges, but are spread out over an extended range, characterized by a density-of-states function. Furthermore, it is well known, that disorder leads to localized states. Impurities, or other deep level defects, introduced by ion-implantation form a disordered system, in which both localized, and delocalized states appear. The rate of hopping of an electron between two traps, at distance R apart, is proportional to the wave function overlap factor exp( 2 α R), where α is an inverse effective Bohr radius. In addition, there is a temperature dependent factor, arising from activation energy. In the presence of a distribution of deep defect states in the gap, an electron occupying a localized dangling bond may be in close proximity of an un-occupied localized defect. Upon application of an electric field, and with almost no expenditure of thermal energy, the electron may tunnel from the first state to the second state (hopping). As the temperature rises, there is sufficient thermal energy ε' AND ε'' for some electron to be excited into the conduction band tail, leaving holes in the valence band tail. Electrons in a band tail are localized near a weak bond. Under application of an electric field, the electrons (and holes), may tunnel from one localized state to another. At temperatures above 3 o C, there is sufficient thermal energy in the system for electrons and holes to be excited beyond the band tails into the conduction and valence bands. In these states, the carriers are not constrained by local defects or weak bonds, but are in an extended state, and free to move through the periodic potential of the crystal lattice. However, as there is no long-range order in the amorphous network, the carriers undergo frequent scattering events, and the mobility is low. When a time-varying electric field is applied to the semiconductor, the conduction current must be defined in the terms of complex permittivity, which was introduced to allow for dielectric losses due to the friction accompanying polarization. For this reason, it is important to discuss the complex dielectric constant. The dielectric constant enters as a critical parameter into any numerical model; poor estimation of the dielectric constant could potentially diminish the model accuracy. For frequencies f > 1 11 Hz the dielectric constant can be determined using the Drude model. Kinasewitz [ 5 ] and others suggested that the Drude model can be used, even in the range of microwave frequencies. 1e+6 1e+5 1e+4 1e+3 1e+2 1e+1 1e+ 1e-1 1e-2.1.1.1 1 1 1 RESISTIVITY [Ω-cm] e' - P Type e''- P Type e' - N Type e'' - N Type Fig. 6. Complex permittivity of N-type and P-Type silicon at frequency 5.8GHz vs. resistivity at room temperature
The dielectric function of free electrons,,, ε = ε iε according to the Drude model can be expressed as: 2, Nq ε = ε m εω c c, Nq ε = m εω 1 1 + ( ωτ) 2 2 ( ωτ ) 1 + ( ωτ) 2 1 2 2 The expectation bracket indicates averages over the,,, energy distribution. Calculated values of ε and ε as a function of resistivity are shown in Fig. 6. From Fig. 6 it is seen that both components of the dielectric constant are in good agreement with experimental results for silicon, in the resistivity range 5-1 Ωcm. For materials with resistivity less than 5 Ωcm it is difficult to measure permittivity experimentally because the wave absorption in the sample becomes too large. 1. doping on both wafer sides, behaves as a metal, and all radiation is reflected. By plotting the trajectories of n and k derived from the dielectric constant we found that some trajectories, ε pass through a line of n = k where magnitude of changed from positive to negative. This change is evidence of the transition metal-insulator. After passing this point, τ became negative, therefore, the Drude model is entirely invalid. Instead to relying on the Drude model, we choose a more pragmatic approach in order to estimate the dielectric permittivity. k 2 15 1 5 R=.1 R=.2 R=.3 R=.4 R=.5 R=.6 R=.7 R=.8 R=.9.9 REFLECTANCE.8.7.6.5 2 4 6 8 1 n Fig. 8. Reflectivity as a function of n and k.4.3.2.1.1.1 1 1 1 RESISTIVITY [Ω-cm] Fig. 7. Calculated reflectance of silicon at 5.8 GHz as a function of resistivity at room temperature The calculated reflectivity using data of dielectric constant from Fig. 6 is shown in Fig. 7. The very high reflectivity for highly doped material is one of the challenges of microwave annealing. The highly doped product wafer side reflects most of the incident microwave radiation. The back side of the wafer, with a lightly doped bulk substrate, mediates the coupling of the microwave field with the semiconductor. The double polished wafer, with high From optical constants, we plot the reflectivity in the n and k plane. From such a plot, and for expected range of reflectivity, we can determine the range of possible magnitudes of n and k. The dielectric constant is calculated from known parameters n and k. Experiment Standard.25 μm CMOS nonvolatile process technology with double polysilicon layers was selected as the test vehicle. The substrate material is P-type epitaxial <1> material. Thickness of the wafer is 675+/- 15 μm, with resistivity.15 Ωcm, thickness of the epi-layer is 14 μm and resistivity 3 Ωcm. The microwave annealing recipe was optimized for the annealing of the low voltage S/D extension
(PLDD) with BF 2 implanted layer (4E13@25keV) and (NLDD) with Phosphorus (4.6E13@25keV). The standard production recipe is anneal at 955 o C. Both and microwave annealing steps were performed in Nitrogen ambient. The microwave recipe was performed with a constant power and average electric field of 2-5 V/cm. The maximum temperature of the microwave annealed wafers under any circumstances did not exceed 38 o C. 36 34 32 Ultra-shallow P/N junctions using Boron 11or BF 2 are more difficult to form compared to N/P junctions due to channeling and enhanced diffusion of Boron during subsequent annealing. For this reason the annealing recipe was optimized for annealing of the P+ S/D extension. Fig. 9 is a comparison of layer resistance for microwave and anneal. The resistance of Phosphorus S/D extension was slightly higher for microwave annealed wafers (Fig. 1). The reduced diffusion of microwave annealed wafers was confirmed by longer effective channel length L eff as shown in Fig. 11. Rs PLDD 3 28 26 24 22 2 Fig. 9. Resistance of P S/D extension. LV N-MOS Channel Leakage. -.2 -.4 -.6 -.8-1. -1.2-1.4 165-1.6 16 155 Fig. 12. Leakage current of N-MOS device. R s NLDD 15 145.2.18 14.16 135 13 Fig. 1. Resistance of N S/D extension. LV P-MOS Channel Leakage.14.12.1.8.6.6.58.56 L drawn =.56 μm.4.2. L eff [μm] P-MOS.54.52.5.48.46 Fig. 11.Effective channel length for P-MOS device. Fig. 13. Leakage current of P-MOS device. The comparisons of leakage current for both N and P- MOS devices are shown in Fig. 12 and Fig. 13. Surprisingly, we found that contact resistance to both N and P layer decreased in microwave annealed samples (Fig. 14 and 15). In addition the breakdown voltages of all junctions increased by approximately one volt. At this moment it is not clear what
mechanism is responsible for these changes and manual probing of test structures is under way. R P+ Contact String 15 14 13 12 Resistivity - WIDE UNSALICIDED POLY 12 118 116 114 112 11 18 11 1 Fig. 16. Resistance of wide un-salicided polysilicon lines. 25 R N+ Contact String 2 18 16 14 12 Fig. 13. Contact resistance of P+ layer. Resistivity - NARROW SALICIDED POLY 2 15 1 5 1 Fig. 17. Resistance of narrow salicided polysilicon lines. 8 8 7 Resistivity - NARROW UNSALICIDED POLY 17 168 166 164 162 16 158 156 154 Fig. 14. Contact resistance of N+ layer. Fig. 15. Resistance of narrow un-salicided polysilicon lines. Resistivity - WIDE SALICIDED POLY 6 5 4 3 2 1 Fig. 18. Resistance of wide salicided polysilicon lines. There was, however, an unexpected and negative result. Resistance of both, narrow and wide unsalicided polysilicon layers were about 1% higher for wafers processed in the microwave chamber. After salicide formation, the resistance of both
polysilicon further increased, while wafers processed in system exhibit expected resistance. Increase in resistance after salicide formation occurs only on polysilicon lines. The salicided common source layer in memory array exhibits normal behavior and actually microwave processed wafers have resistance about 3 Ω/sq lower as shown in Fig. 19. N+ SALICIDE 44 42 4 38 36 34 of α-silicon and polysilicon under microwave field. The knowledge of the dielectric constant is paramount importance for the optimal chamber design. The experiments also suggest that microwave field is interacting with semiconductor damaged by ionimplantation differently than the thermal field. The temperature in some of experiments was lower than 27 o C and conventional recrystalization models do not apply. Many misunderstandings in judging annealing experiments can be avoided if published literature describes fully the experimental conditions. For example, the level of amorphization of ion implanted layers is not only a function of dose but also beam current. From the microwave annealing point of view, there is also a significant difference between FZ and CZ substrates (we were not able to achieve any interaction of the FZ material with the microwave field). Fig. 19. Resistance of silicon salicided N layers. Clearly this problem is related to crystallization of polysilicon layers. The layer is deposited as α-silicon with thickness 1.8 kå, and the only thermal treatment is gate oxidation following the gate etch and microwave or anneal. Conclusion A new method for annealing semiconductors using microwave field at low temperatures (< 4 o C) is presented. For the first time feasibility of low temperature annealing of ion-implanted layers in real manufactured parts is demonstrated. Although we found that the microwave processing chamber used in this experiment was poorly designed, mainly because the incorrect estimates of some physical parameters of silicon at GHz frequency range, we were able to demonstrate reduced diffusion of S/D extensions. As a consequence the leakage current of both N and P- MOS devices was reduced. An unexpected problem, however, is processing of polysilicon lines. Because we were not able to form good contact to polysilicon, we were not able to perform full device characterization. The future work should focus on the: (i) characterization of complex dielectric constant of implanted layers and (ii) characterization References [ 1 ] K. Thompson, J. H. Booske, Y. B. Gianchandani, R. F. Cooper, Electromagnetic Annealing for the 1 nm Technology Node, IEEE Electron Device Letters, Vol. 23 (22), p. 127-129 [ 2 ] Y. Bykov, E. Eremeev, V. Holoptsev, I. Plotnikov, N. Zharova, Spike Annealing of Silicon Wafers using Millimeter wave Power, 9 th IEEE Int. Conf. on Advanced Thermal Processing of Semiconductors -RTP 1, Anchorage, 21, p. 232-239 [ 3 ] J. H. Booske, R. F. Cooper, I. Dobson, Mechanism for nonthermal effects on ionic mobility during microwave processing of crystalline solids, J. Mater. Res. Vol. 7 (1992) p. 495-51 [ 4 ] J. M. Kowalski, J. E. Kowalski, B. Lojek, Microwave Annealing for low Temperature Activation of As in Si, 15 th IEEE Int. Conf. on Adv. Thermal Processing of Semiconductors RTP27, Catania, Italy, p. 51-56 [ 5 ] R. T. Kinasewitz, B. Senitzky, Investigation of the complex permittivity of n-silicon at millimeter Wavelengths, J. Appl. Phys. Vol. 54 (1983), p. 3394-3398