IN the undergraduate Electrical Engineering curriculum

IEEE TRANSACTIONS ON EDUCATION, VOL. 40, NO. 4, NOVEMBER 1997 273 New Macromodels of a Switch for SPICE Applications Rajiv K. Swami and Raj Senani Abstract This paper is concerned with the macromodeling of a switch which is important from the point of view of SPICE simulation of dc dc converters, switching mode power supplies, and power electronic circuits. In this paper, some new macromodels of switches are introduced which are simpler and allow faster simulation times than a previously known model. The underlying principle and the mechanism of the proposed models has been explained in a manner suitable for educational purposes. Index Terms Macromodeling, switch modeling, switch simulation. I. INTRODUCTION IN the undergraduate Electrical Engineering curriculum there has been a growing use of SPICE for simulation of electronic circuits and it is being recognized that the integrated use of SPICE in evaluating circuit design helps students learn electronics in an environment similar to that of practicing electronic designers (see [1] [7] and the references cited therein). Of late there has been a continuous flow of new books on SPICE as well as integration of the use of SPICE in a large number of books, related to electronic devices and circuits, currently available from leading international publishers. Macromodeling forms an important part of learning and applying SPICE for the analysis and simulation of large electronic circuits and a considerable amount of literature exists on developing macromodels of various integrated circuits and devices; for example, see [8] and the references cited therein. The present paper is concerned with the macromodeling of a switch in terms of SPICE-acceptable elements, which is important from the point of view of SPICE simulation of dc dc converters, switching mode power supplies and power electronic circuits, etc., [9], [10]. Although PSPICE contains built-in macromodels of the so-called voltage-controlled and current-controlled switches, from the available source books on PSPICE (such as [11] [14]) it is not clear how PSPICE implements such switches 1 since the internal structure of the Manuscript received September 30, 1994; revised June 20, 1997. This work was performed at the Linear Integrated Circuits Laboratory of the Delhi Institute of Technology. R. K. Swami is with LG Electronics India Pvt. Ltd, A-41, Mohan Cooperative Industrial Area, New Delhi 110 044, India. R. Senani is with Linear Integrated Circuits Laboratory, Division of Electronics and Communication Engineering, Delhi Institute of Technology, Old I.G. Block, Kashmere Gate, Delhi 100 006, India. Publisher Item Identifier S 0018-9359(97)07893-X. 1 Another analog simulation tool, namely, the SABER from Analogy Inc., USA, relies upon the use of discrete-time mathematical formulations (for simulating circuits containing periodically operated switches) rather than macromodeling the switch in terms of primitive circuit elements. switch model has not been described in the literature cited above [11] [14]. Some time back, Xu and Yu [9] proposed an equivalent circuit model for the switch employing SPICE-acceptable elements. In this paper, we present, three new macromodels of switches which are more efficient than the Xu Yu model while employing relatively lesser number of elements. Apart from introducing the new macromodels, this paper also explains clearly the underlying principle and the mechanism of the proposed models in a manner suitable for educational purposes. II. THE NEW MACROMODELS In order to understand the formulation of the new macromodels, let us first briefly review the Xu Yu formulation [9], reproduced here in Fig. 1(a). In this model is a voltage-controlled voltage source (VCVS) having its magnitude controlled by the voltage across the resistor, with a gain of unity. is a VCVS characterized by the equation where is the control voltage whose waveform is shown in Fig. 1(b). Note that the constant of proportionality on the right-hand side of the above equation (having dimension of 1/volt) has been taken to be unity and 1 (inside the square brackets) implies 1 V. (Analogous considerations are assumed implicitly, unless otherwise specified, in all other characterizing equations which shall follow). The operation of this switch model is explained as follows. When is high, becomes zero and, in turn, equals (the voltage across ) and, consequently, voltage between terminals 1 and 2 (which is the sum of and ) becomes zero since as per the polarities shown,. As a result, the circuit behaves as a closed switch. Note that the ON resistance of the closed switch is zero. Similarly, when is low (i.e., equal to zero), becomes equal to and, consequently, the current in the resistor becomes zero and the circuit offers an open circuit between 1 and 2 and thus behaves like an open switch with off resistance. In order to create a macromodel for the switch, what is needed is that one devise an arrangement employing independent sources, controlled sources, and resistor(s) capable of offering zero voltage between terminals 1 and 2 (thereby implementing the closed position of a switch) or zero current flowing through the terminals 1 and 2 (thereby implementing (1) 0018 9359/97$10.00 1997 IEEE

274 IEEE TRANSACTIONS ON EDUCATION, VOL. 40, NO. 4, NOVEMBER 1997 (a) (a) (b) (b) Fig. 1. (a) The equivalent circuit model of a switch proposed by Xu and Yu. (b) Waveform of the control voltage VC (t). the open position of a switch) dependent upon the two possible states of the control voltage (see Fig. 1(b)). Having recognized this basic principle, we now proceed to demonstrate that there are alternative ways of doing this. It may be pointed out, however, that although many different formulations, of varying complexity, are possible using various types of controlled sources, we have included here only those models which are simpler and more efficient than the Xu Yu model. Let us now consider the new macromodels shown in Fig. 2. The first proposal of Fig. 2(a) can be considered to be a new arrangement of the model of Fig. 1(a) obtained by noting that the two VCVS, namely and (where the latter is a polynomial VCVS), can be merged into a single polynomial VCVS characterized by the following equation: where is the voltage across the resistor. The operation of this configuration is as follows. From the above equation, note that when is, becomes, voltage between terminals 1 and 2 (i.e., ) becomes zero and, consequently, the circuit functions as a closed switch. On the other hand, when is zero, becomes equal to, current through the resistor becomes zero, and the circuit functions as an open switch. Similar to the Xu Yu switch, here also is zero and is infinite. The other two new macromodels of switches shown in Fig. 2(b) and (c) employ a single polynomial VCVS and a single polynomial current-controlled current source (CCCS), respectively, and achieve the same function. Consider first the characterizing equation for the VCCS in the model of Fig. 2(b) where is a free parameter which governs the value of (see Appendix I). The following two cases are of interest: Case I : With, injects a current of magnitude at node 1. With this equals the (2) (3) Fig. 2. (c) The proposed new macromodels of a switch. current, taken by resistor. Consequently, the net current flowing from terminal 1 to terminal 2 becomes zero. Thus the circuit functions as an open switch with. On the other hand, with, becomes zero thereby the current source connected between 1 and 2 becomes open circuit and the circuit behaves as a closed switch with a nonzero. Case II : With the operation is exactly the same as in Case I. With equal to along with, it can be shown (see Appendix I) that the equivalent resistance between 1 and 2 becomes and, consequently, the circuit acts as a closed switch with. Thus with, can be made very small (e.g., with, will be equal to 0.01 ). Finally, consider the macromodel of Fig. 2(c) where and are dummy voltage sources of zero magnitude with and being the currents through them, respectively. The CCCS is characterized by Note that since this model employs a CCCS, the control signal has been taken as a current signal whose waveform, however, is assumed to be analogous to that of Fig. 1(b). In view of the explanation given with respect to the model of Fig. 2(b), it can be easily deduced that the operation of this circuit with and would be similar to that of Fig. 2(b) (see Appendix I). III. VERIFICATION THROUGH SPICE SIMULATIONS An important criterion [15] of the suitability of a macromodel is that it must provide a balance between reasonable (4)

SWAMI AND SENANI: NEW MACROMODELS OF A SWITCH FOR SPICE APPLICATIONS 275 TABLE I RELATIVE COMPARISON OF RUN TIMES FOR DIFFERENT MACROMODELS Fig. 3. A general circuit arrangement for verifying the operation of different switch models of Figs. 1 and 2. Fig. 4. SPICE-generated output waveform (v 2 ) for the schematic of Fig. 3 obtained with the macromodel of the switch of Fig. 2(b). fidelity to the real part and a realistic simulation time. To check the new macromodels of Fig. 2 along with that of Fig. 1 from this viewpoint, these have been verified by SPICE simulations in the arrangement of Fig. 3, where is a sinusoidal signal (2 V (p-p); 1 khz) and the control signal is the pulse voltage source of magnitude 1 V with SPICE format [9] PW s, PER s for Fig. 2(a), (b) and a pulse current source of magnitude 1 A for Fig. 2(c); other parameters remaining the same. The load resistance taken was 1k although the model has been found to work exactly in the same manner for any values of between 1 to 1 M. In all cases, the time step for transient analysis was 1 s. In Figs. 1 and 2, ; and are dummy voltage sources of zero magnitude. A sample source file for the verification of the macromodel of Fig. 2(b) in the arrangement of Fig. 3 is shown in Appendix II and the waveform of the output voltage (obtained from simulating this circuit) is shown in Fig. 4. Identical results have been obtained with all other switches of Fig. 2 (and Fig. 1), thus confirming that performance-wise all the four macromodels are alike. However, when comparison of simulation times for various models is made they do behave differently. In this context, we recall that SPICE employs modified nodal analysis for solving network equations. The simulation time is directly proportional to the number of unknowns (node voltages, branch currents through voltage sources, etc.). A simple means to estimate the efficiency of a macromodel is to keep track of the number of internal nodes and voltage sources (independent voltage source and controlled voltage source) within a macromodel. Based on this simple rule, a total of five unknowns (excluding the external connections) are introduced for the Xu Yu switch model (Fig. 1(a)) and three unknowns in the case of the models of Fig. 2(a) and (c). However, the macromodel of Fig. 2(b) has only one unknown introduced and, hence, should be the most efficient implementation. A comparison of the simulation times (on an 80 386-based IBM PC AT) taken by the new macromodels of Fig. 2 and the model of Fig. 1 is shown in Table I. As expected, it is found that all the new macromodels (viz. those in Fig. 2(a) (c)), require less simulation time than the Xu Yu model of Fig. 1 and that the model of Fig. 2(b) is indeed the most efficient (it takes 15.6% less time than the Xu Yu model). IV. CONCLUDING REMARKS Three new macromodels of a switch, which employ a lesser number of elements and allow faster simulation times than a previously published macromodel proposed by Xu and Yu, are introduced and explained. Out of the three proposed macromodels, that of Fig. 2(b) is the most economical in terms of simulation time. These models are expected to be useful for the user of SPICE in a number of applications. It is believed that the explanation of the underlying principle and the mechanism of the various macromodels would also serve as a tutorial material on this topic. APPENDIX I DERIVATION OF THE EQUIVALENT RESISTANCES FOR SWITCH MODELS OF FIG. 2(b) AND (c) Analysis of the Model of Fig. 2(b) The general form of the (3) can be written as (5)

276 IEEE TRANSACTIONS ON EDUCATION, VOL. 40, NO. 4, NOVEMBER 1997 where and are the constants of proportionality having dimensions ampere volt and volts, respectively. The current flowing from terminal 1 toward terminal 2 can be determined from the node equation (6) When, the equivalent resistance derived from the above equation is, therefore, found to be with 1 A/V, 1V, 1, becomes infinite and the circuit functions as an off switch with. Similarly, when 1 V, the equivalent resistance is found to be with 1 A/V, 1V, 1, becomes and circuit functions as an on switch with ohms. Analysis of the Model of Fig. 2(c) For the model of Fig. 2(c), the general form of (4) can be written as (9) where and are constants having dimensions 1/ampere and ampere, respectively. The current flowing from terminal 1 toward terminal 2 can be determined from the node equation (10a) where (7) (8) (10b) When, is also zero, and the equivalent resistance derived from the above equations is found to be (11) with (1/ampere), (ampere), becomes infinite, and the circuit functions as an off switch with. Similarly, when 1 A (i.e., 1 A), the equivalent resistance is found to be (12) with (1/ampere), 1 A, and 1, becomes, and the circuit functions as an on switch with. APPENDIX II *Source file for the verification of the macromodel of *Fig. 2(b) in the arrangement of Fig. 3. VIN 1 0 SIN(0 1V 1kHz).TRAN 1US 1MS X1 1 2 3 SW2b.SUBCKT SW2b123 R1 1 2 1 RF 3 0 1 G1 2 1 POLY(2) (1, 2) (3, 0) 0 1 0 0 1.ENDS RL201K VC 3 0 PULSE(0 1V 0 0 0 50US 100US).OPTIONS ITL5 = 0 ACCT.PROBE.END ACKNOWLEDGMENT The second author (RS) wishes to thank MicroSim Corporation (USA) for supplying evaluation versions of PSPICE which were used in the simulations pertaining to this work. REFERENCES [1] Special issue on Computation and Computers in Electrical Engineering Education, IEEE Trans. Educ., vol. 36, no. 1, Feb. 1993 (please see all the papers concerning SPICE included therein). [2] S. Natrajan, An effective approach to obtain Model parameters for BJT s and FET s from data books, IEEE Trans. Educ., vol. 35, pp. 164 169, May 1992. [3] S. Prigozy, Novel applications of SPICE in engineering education, IEEE Trans. Educ., vol. 32, pp. 35 38, Feb. 1989. [4] L. V. Hmurcik, M. Hettinger, K. S. Gottschalck, and F. C. Fitchen, SPICE application to an undergraduate electronics program, IEEE Trans. Educ., vol. 33, pp. 183 189, May 1990. [5] N. R. Malik, Determining SPICE parameter values for BJT s, IEEE Trans. Educ., vol. 33, pp. 366 368, Aug. 1990. [6] N. R. Desai, K. V. Hoang, and G. J. Sonek, Applications of PSPICE simulation software to the study of photoelectronic integrated circuits and devices, IEEE Trans. Educ., vol. 36, pp. 357 362, Nov. 1993. [7] H. Nielinger, Digital (IIR) filter biquad section simulated with SPICE, IEEE Trans. Educ., vol. 36, pp. 383 385, Nov. 1993. [8] J. A. Connelly and P. Choi, Macromodeling with SPICE. Englewood Cliffs, NJ: Prentice-Hall, 1992. [9] J. Xu and Y. Yu, Equivalent circuit models of switches for SPICE simulation, Electron. Lett., vol. 24, no. 7, pp. 437 438, 1988. (The present authors did not succeed in accessing references 1 and 2 and a footnoted reference cited therein.) [10] Y. C. Liang and V. J. Gosbell, A versatile switch model for power electronics SPICE2 simulations, IEEE Trans. Ind. Electron., vol. 36, pp. 86 88, 1989. [11] M. H. Rashid, SPICE for Circuits and Electronics Using PSPICE. Englewood Cliffs, NJ: Prentice-Hall, 1988, ch. 5, pp. 57 61. [12] P. W. Tuinenga, A Guide to Circuit Simulation and Analysis Using PSPICE Englewood Cliffs, NJ: Prentice Hall, 1992, Appendix C, pp. 236, 239. [13] W. Banzhaf, Computer Aided Circuit Analysis Using PSPICE. Englewood Cliffs, NJ: Regents/Prentice Hall, 1992, ch. 2, pp. 27 29. [14] J. Keown, PSPICE and Circuit Analysis New York: Macmillan, 1991, ch. 11, pp. 288 292. [15] W. Jung, Questions and the answers on the SPICE macromodel library, Linear Technol. Applic. Note, no. 41, Apr. 1990. Rajiv K. Swami was born in Gwalior, India, on January 8, 1966. He received the B.E. degree in electrical engineering from M.N.R. Engineering College, University of Allahabad, Allahabad, India. He was associated with Delhi Institute of Technology, Delhi, India (from 1991 to 1994) and taught various courses of electronics and communication engineering curriculum to undergraduate students. Apart from the above he was also doing research under the guidance of Dr. R. Senani and was involved in simulation and modeling of devices, circuits, and systems. In 1994 he joined Sony India Pvt. Ltd., a subsidiary of Sony Corporation, Japan, and was involved in imparting training in consumer electronics to service engineers for the repairs of the audio, video, and telecommunication products of the organization. He has recently joined LG Electronics India Pvt. Ltd., a subsidiary of LG Electronics Inc., Korea. His research interests are in areas of SPICE simulation and modeling of electronic devices, linear integrated circuits, as well as bipolar and MOS integrated circuits. His earlier publication had been in the same areas of SPICE simulation and modeling.

SWAMI AND SENANI: NEW MACROMODELS OF A SWITCH FOR SPICE APPLICATIONS 277 Raj Senani was born in Budaun, India, on March 14, 1950. He received the B.Sc. degree from Lucknow University, the B.Sc.Engg. degree from Harcourt Butler Technological Institute, Kanpur, and the M.E. (Honors) and Ph.D. degrees, both in electrical engineering, from Motilal Nehru Regional Engineering College, Allahabad, University of Allahabad, India. He held the position of Lecturer (1975 1986) and Reader (1987 1988) at the Electrical Engineering Department of M.N.R. Engineering College, Allahabad. He joined the Division of Electronics and Communication Engineering of the Delhi Institute of Technology in 1988 as an Assistant Professor and became a Professor in 1990. He served as Head of the Division of Electronics and Communication Engineering (1990 1993), Head of Applied Sciences Department (1993 1996), Dean of Postgraduate Studies and Research (1993 1996), and Director of the Delhi Institute of Technology during 1996 1997. He is currently serving as Head of the Division of Electronics and Communication Engineering, Head of the Division of Manufacturing Process and Automation Engineering, and Dean (Academic). His research interests are in the areas of bipolar and MOS analog integrated circuits and systems, network synthesis and filter design, current-mode signal processing and SPICE simulation and modeling. He has over 70 research papers published in international journals. He has been on the Editorial Board of the Journal of the Institution of Electronics and Telecommunication Engineers (IETE), India, since 1986 and that of the Student Journal of the IETE since 1992. He was the Honorary Editor of the Journal of the IETE in the area of Circuits and Systems during 1992 1996, and has been serving as Editorial Reviewer for a number of IEEE (USA), IEE (UK), and other international publications.