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Understanding Digital Design The Digital Electronics 2014 Digital Design - Demo This presentation will Review the oard Game Counter block diagram. Review the circuit design of the sequential logic section of the oard Game Counter. Review the circuit design of the combinational logic section of the oard Game Counter. 2 lock Diagram 0 0 0 1 1 1 L1 L2 nalog Sequential 0 1 1 0 0 1 C 1 0 1 0 1 0 Combinational L3 L4 L5 L6 L7 1 2 3 4 5 6 The nalog produces a dampened square wave that rolls the count and slowly stops. On every pulse of the clock, the Sequential increments a binary count from 1 to 6, then repeats. The Combinational encodes the binary count into the die s seven dots. 3 Copyright 2009 1

lock Diagram nalog Sequential C Combinational L1 L2 L3 L4 L5 L6 L7 The nalog produces a dampened square wave that rolls the count and slowly stops. On every pulse of the clock, the Sequential increments a binary count from 1 to 6, then repeats. The Combinational encodes the binary count into the die s seven dots. 4 Sequential Schematic Diagram 3-it Counter Default Count Range (0 10 = 000 2 to 7 10 = 111 2 ) C Sequential Set / Reset Changes Count Range (1 10 = 001 2 to 6 10 = 110 2 ) 5 Sequential Functional Test (1 of 6) Count of 1 (=0; =0; C=1) 6 Copyright 2009 2

Sequential Functional Test (2 of 6) Count of 2 (=0; =1; C=0) 7 Sequential Functional Test (3 of 6) Count of 3 (=0; =1; C=1) 8 Sequential Functional Test (4 of 6) Count of 4 (=1; =0; C=0) 9 Copyright 2009 3

Sequential Functional Test (5 of 6) Count of 5 (=1; =0; C=1) 10 Sequential Functional Test (6 of 6) Count of 6 (=1; =1; C=0) 11 lock Diagram nalog Sequential C Combinational L1 L2 L3 L4 L5 L6 L7 The nalog produces a dampened square wave that rolls the count and slowly stops. On every pulse of the clock, the Sequential increments a binary count from 1 to 6, then repeats. The Combinational encodes the binary count into the die s seven dots. 12 Copyright 2009 4

Schematic Diagram C Note: ecause L1 / L5, L2 / L6, & L3 / L7 are always on together, only one combinational logic circuit was required for each pair. 13 C L1 L2 L3 L4 L5 L6 L7 Truth Table 0 0 0 - - - - - - - 0 0 1 0 0 0 1 0 0 0 1 0 1 0 0 0 1 0 0 0 1 2 0 1 1 1 0 0 1 1 0 0 3 1 0 0 1 0 1 0 1 0 1 4 1 0 1 1 0 1 1 1 0 1 5 1 1 0 1 1 1 0 1 1 1 6 1 1 1 - - - - - - - 14 C L1 L2 L3 L4 L5 L6 L7 0 0 0 - - - - - - - 0 0 1 0 0 0 1 0 0 0 0 1 0 0 0 1 0 0 0 1 0 1 1 1 0 0 1 1 0 0 Truth Table gain, note that L1 / L5, L2 / L6, & L3 / L7 have the same entries in the truth table; therefore, they are equal functions. 1 0 0 1 0 1 0 1 0 1 1 0 1 1 0 1 1 1 0 1 1 1 0 1 1 1 0 1 1 1 1 1 1 - - - - - - - 15 Copyright 2009 5

Functional Test (1 of 6) Count of 1 (=0; =0; C=1) = 0 = 0 C = 1 16 Functional Test (2 of 6) Count of 2 (=0; =1; C=0) = 0 = 1 C = 0 17 Functional Test (3 of 6) Count of 3 (=0; =1; C=1) = 0 = 1 C = 1 18 Copyright 2009 6

Functional Test (4 of 6) Count of 4 (=1; =0; C=0) = 1 = 0 C = 0 19 Functional Test (5 of 6) Count of 5 (=1; =0; C=1) = 1 = 0 C = 1 20 Functional Test (6 of 6) Count of 6 (=1; =1; C=0) = 1 = 1 C = 0 21 Copyright 2009 7

Using LEDs LED Light Emitting Diode = 1 = 0 C = 0 Shown with a count of 4 (=1; =0; C=0) 22 Digital nalog Sequential Combinational Discussed in the previous lesson 23 Copyright 2009 8