Aspects of radiation hardness for silicon microstrip detectors

Aspects of radiation hardness for silicon microstrip detectors Richard Wheadon, INFN Pisa, Via Livornese 1291, S. Piero a Grado, Pisa, Italy Abstract The ways in which radiation damage affects the properties of silicon microstrip detectors are reviewed and discussed in the context of inner tracking or vertexing requirements for the LHC experiments. 1. Introduction As high energy physics experiments continue to move in the direction of ever higher luminosity searching for increasingly rare events the issue of radiation damage for all detector elements becomes more and more important. Since silicon detectors, in the form of microstrips or pixels devices, can provide high resolution with high granularity they are often required to operate closest to the collision point and therefore in the region of highest particle flux. For the main LHC experiments, ATLAS [1] and CMS [2], the primary particle flux from the interaction region - dominated by pions and protons - is expected to be the main damage source for the inner detectors. It should, however, also be noted that the high rate of interactions within the calorimeters will also lead to a non-negligible isotropic albedo of fast neutrons filling the entire tracking cavity. 2. Radiation damage mechanisms for silicon detectors The damage generated in silicon detectors by radiation can be divided into two categories, surface damage and bulk damage. a) Surface damage Surface damage phenomena are already well known from studies on CMOS microelectronics structures [3] and are caused by the interaction of ionising radiation with the oxide and the oxide/silicon interface leading to increases in the oxide charge density and of the density of surface trapping states at the interface. In the case of oxide charge build-up, the level and distribution of this build-up is seen to be strongly dependent on any electric field present [4,5]. Additional trapping interfaces, for example between oxide and nitride layers can also be important [5]. The increase of surface states can affect the surface charge state under bias, and also lead to an increase of surface-generated leakage current in the device. All charged particles and photons energetic enough to liberate electron-hole pairs in the oxide can cause surface damage. For studying surface damage in isolation it is common practice to use Cobalt-60 gamma sources, but electron accelerators in the few MeV range have also been used with similar results. b) Bulk damage Bulk damage results from particle-induced lattice displacements throughout the silicon bulk. Energetic electrons and photons can lead to single displacements and therefore cause bulk damage, but it is the heavier particles such as pions, protons,

and fast neutrons which are the dominant source of bulk damage since they transfer much more energy to the displaced atoms. The microscopic details will be discussed elsewhere in these proceedings [6], the macroscopic effects caused by bulk damage are a strong increase in the reverse current of the device and also changes in the effective resistivity of the substrate [7, 8, 9]. Where there is no field to deplete the silicon the effective resistivity of the initially n-type substrate becomes close to intrinsic (slightly p-type [10]) as the dose increases. For depleted regions the detector behaves as if the substrate is becoming less n-type as the dose increases, reaching a point defined as "type-inversion" where the substrate is essentially intrinsic, and continuing beyond this point the detector behaves as if the bulk is becoming increasingly p-type. Although type-inversion does have implications on the detector performance it is not a catastrophic point of failure; in most respects the device behaves as if the junction has moved to the n + contact side. However, eve ntually the effective p-type doping level becomes so high that the detector can no longer sustain a bias voltage high enough to achieve adequate detection efficiency, and it is this which defines the lifetime limit of the detector. Studying bulk damage in isolation from surface effects requires a fast neutron source ( ~1MeV) with low ionising particle contamination, plus care to avoid further ionising contributions due to activation of device supports and packaging. For studying the combined effect of surface and bulk damage either proton or pion beams, or neutron followed by gamma irradiations have been used. c) Annealing The thermal energy within the lattice of the crystal leads to a natural self-healing effect known as annealing. For surface damage, annealing is observed as changes in the amount of trapped oxide charge and decreases in surface-generated current with time after irradiation [11]. For annealing of bulk damage, the leakage current reduces with time but, for the effective doping concentration, the so-called "reverse annealing" or "anti-annealing" effect also occurs whereby the substrate actually becomes more p-type with time [8]. By its very nature, annealing can usually be enhanced or retarded by increasing or decreasing the temperature (particularly significant for controlling reverse annealing effects [5,9]). 3. Detector technology The technology of silicon microstrip detectors is already well established, with single-sided and double-sided devices being routinely used in high precision tracking environments for both fixed-target and collider experiments. The early microstrip devices were simple single-sided DC-coupled devices, but as the technology for both the detectors and the readout electronics developed, the demand for compact low-mass systems has lead to double-sided detectors, integrated accoupling combined with integrated biasing structures either using punchthrough/foxfet biasing or additional polysilicon bias resistors, and second metal layers for signal routing. Many of these additional features are attractive for high radiation level environments and therefore have been studied for these applications (as a good starting point for information the reader is referred to [12, 13]). However, this paper will concentrate on the issues related to the basic properties common to all silicon microstrip detectors.

4. Effect of irradiation on detector properties a) Strip isolation The isolation resistance between individual strips must be maintained at a sufficiently high level in order to avoid additional contributions to the readout noise. Under some circumstances, low interstrip resistance values could also lead to unwanted smearing of the signal across a number of strips by resistive charge division. i) p-side strips (junction side) For p-strips the isolation of unirradiated devices is assured by the naturally positive fixed oxide charge. Since ionisation increases the net positive charge in the oxide the p-side strip isolation is not degraded [5]. Bulk damage could be expected to represent more of a problem as the bulk becomes effectively p-type. Figure 1 shows measurements of the interstrip isolation as a function of bias voltage for p-strip devices at different neutron fluences. Before type inversion the strip isolation resistance is high even at very low bias voltages, as would be expected since the bulk is n-type and there is no surface conduction path. After type inversion, the behaviour is more typical of unirradiated n-strip devices where good isolation is only achieved once full depletion has been reached. The isolation resistance below full depletion is still relatively high, as can be understood from the fact that the undepleted silicon is expected to be behaving as p-type with close to intrinsic resistivity. Beyond full depletion the isolation resistance is certainly strongly degraded with respect to the unirradiated performance, but still remains adequate - as should be expected since the oxide charge remains positive. ii) n-side strips (ohmic side) For n-strips on the ohmic side the same positive oxide charge now becomes a problem since the surface layer of electrons which works to isolate the p-strips on the junction side causes the n-strips on the ohmic side to be shorted together. Two isolation techniques have been used successfully for unirradiated devices, p-stops [14] and field plates [15]. Under irradiation both techniques have been shown to be viable [16, 17] but the problems of micro-discharge phenomena [18, 19] and timedependent dielectric breakdown (TDDB, [20]) mean that the robustness of field plates devices is doubtful for LHC applications and so they will not be discussed further here. For p-stop devices, the main requirement for ensuring good isolation is to use a p-doping high enough to counteract the effect of the oxide charge even after high radiation doses. P-stop dopings of 5 10 13 cm -2 [16]and 1 10 14 cm -2 [17] have been demonstrated to be comfortably satisfactory for ionising doses up to at least 7Mrad. Lower values have also been used successfully [21], but in these cases detailed process and device simulation were made and some care is needed to take into account field-enhanced charge build-up and possible dose rate effects. b) Strip capacitance The capacitance load is usually the limiting factor in the noise performance of any system, and this is particularly emphasised for systems with fast low power readout such as the LHC experiments. The capacitance can be separated into geometrical and surface contributions. The geometrical contributions are due only to the spatial

configuration of conductors and dielectrics, and can be calculated using various mathematical techniques [22, 23]. The surface contributions, observed only between immediate neighbour strips, come from the charge layers at the detector surface between the strips and are therefore dependent on the electric field at the surface and thus the bias voltage. Clearly these surface contributions can also be enhanced by the effects of radiation-induced charge-up in the oxide. i) p-side strips For unirradiated p-side strips it is not unusual to be able to approach the geometrical limit values of the capacitance without biasing the detector much beyond full depletion. After irradiation this is no longer the case, as can be seen in figure 2 which shows the bias dependence of the immediate neighbour capacitance measured at 100kHz before and after gamma irradiation. For high levels of oxide charge significant overdepletion can be required to maintain minimum capacitance values. Figure 3 shows the dose dependence of the capacitance increases measured at 1MHz and 100V for devices with depletion voltage around 50V. It can be seen that the increases are essentially saturated by 1MHz, and this is a general trend observed with all oxide-charge-sensitive measurements on detectors from several different manufacturers up to doses ~10Mrad [5,24]. Closer inspection also shows that, for these devices, the increases at 1MHz are lower than at 100kHz, with typical increases quoted at 100V bias of 20% at 1MHz and 40% at 100kHz, which should improve the performance of faster readout electronics. However, it should be pointed that it is not yet clear whether this frequency dependence occurs with all detectors from all manufacturers. An important extra consideration arises with p-side strips beyond type-inversion, since now the n-side is the "junction side" and therefore the surface field will be low at the surface between the p-side strips. Reference [24], figure 6, shows this very clearly where the post-inversion interstrip capacitances measured at 1MHz are around 40-50% higher than the pre-inversion values. It remains to be demonstrated whether the frequency dependence observed in figure 3 will help to reduce the impact of this with the fast shaping of LHC but this is certainly a potential problem not to be ignored when considering the relative performance of p-side and n-side readout. ii) n-side strips For n-side strips, the unirradiated devices have low surface fields and so it is not unusual for the capacitance to be significantly above the expected geometrical values even with substantial over-depletion. The general trend of increases with oxide charge-up is similar to the p-side results, with the 1MHz values being lower than at 100kHz and saturation after ~1Mrad. However the issue of type-inversion now works in the favour of the n-side strips, since, after type-inversion, the n-side is now the high field side - the p-stops float at substantially increased potentials, see next section - and so the capacitance can actually be reduced with respect to preirradiation values ([24], figure 7). Figure 4 shows this effect by comparing the dose dependence of capacitance for n-side strips before and after type-inversion, in this case the unirradiated devices were unusually close to their limiting geometrical values and therefore no reduction in capacitance was observed after the initial neutron irradiation.

c) p-stop geometry The specific geometry of the p-stops can play an important part in the behaviour of p-stop isolated n-side devices. Three main classes of structure can be defined, which are shown in schematic form in figure 5. Individual p-stop devices, figure 5(a), use independent p-stop implants between each strip and therefore allow a conduction path between the n-strips and the guard ring via the electron accumulation layer. This conduction path can be used as a means of biasing the strips [14] or designed to have a large enough resistance such that it can be ignored [16]. Common p-stop devices, figure 5(b), are the simplest and most compact way of avoiding any surface conduction paths between the n-strips and the guard since the p-stop lines between the strips are joined together at the ends. However, joining the p-stops in this way has the inevitable side-effect of introducing an extra coupling between the strips through the conductivity of the p-stop itself. The p-spray technique, as used in [21] where the entire surface between the n-strips is implanted, can be considered a limiting case of this approach. P-box devices (also called p-atolls or p-frames), figure 5(c), avoid both the added inter-coupling of the common p-stops and the introduction of any surface conduction paths by surrounding each n-strip with its own individual p-stop "box". The main disadvantage of this approach is that it can be difficult to implement at narrow strip pitches due to process dimension tolerances. i) p-stop voltage Usually, although not exclusively, the p-stops are left to float at their natural potential as defined by the reach-through effect from the p-side. This results in a typical characteristic as seen in figure 6, where the voltage offset between the p-stops and the n-strips starts to rise above zero once the detector reaches full depletion and then continues to increase with bias voltage in a linear fashion. Beyond typeinversion the bias characteristic changes, with the p-stop voltage increasing immediately from zero in a manner consistent with the hypothesis that the depletion region is now extending from the n-strips. At this point it is no longer clear whether the reach-through mechanism is still involved in determining the p-stop voltage. However, what is clear is that significant voltage drops are being developed across the very narrow gaps between the n-strips and p-stops, and thus the risk of breakdown problems is increasing. The p-stop voltage is dependent on many parameters, but typically it is found that, for otherwise identical geometries, wider p-stops float at higher voltages (ie the gradient of the bias characteristic as seen in figure 6 is larger). This observation holds true even after type-inversion [16]. ii) effect on capacitance Figure 7 shows the capacitance between neighbouring strips plotted against p-stop voltage for three unirradiated p-stop strip test structures identical in all respects except p-stop width. Two points are noted, firstly the width of the p-stops is not a strong influence on the geometrical limiting values of the capacitance. Secondly, the capacitance values scale closely with the p-stop voltage. Thus the increase in p-stop voltage caused by the bulk damage works to counteract the effect of the increase in oxide charge, and this explains the behaviour seen in figure 4 and [24]. Similarly, wider p-stops float at higher voltages and therefore, before the limiting values are approached, will tend to lead to lower capacitances for any given bias voltage.

As already noted, the choice of p-stop geometry can have further implications for the device capacitance. With the common p-stop approach the conductivity of the p- stops increases the capacitive interaction of a strip with other strips beyond its immediate neighbours. The p-box style was proposed as a way of avoiding this problem [16, 25], and figure 8 shows the comparison of otherwise identical common p-stop and p-box test devices (unirradiated). For each structure there are five n-strips at 100µm pitch, each group of five being separated by a guard ring, the gap between n-strip and p-stop is 15µm in all cases, and for the p-box style the gap between the two p-boxes is 10µm. These devices had a depletion voltage around 20V but were still not close to their limiting values at 100V. In figure 8(a) it is immediately clear that the frequency dependent excess capacitance seen with the common p-stop devices is no longer a problem with the p-boxes. In fact, it is also seen that the capacitance values are noticeably reduced for the p-box devices, partly because there is still an extra contribution from the p-stop conductivity even at 1MHz, and partly because, by effectively splitting the p-stop in two, an extra series capacitance has been introduced. At the same time, figure 8(b) shows that the p-stop voltages are much reduced in comparison with the common p-stop devices. d) Overdepletion requirements due to large strip gaps Large gaps above 40-50µm between p-side strips for unirradiated devices lead to the need for some degree of overdepletion relative to the nominal bias voltage in order to achieve full efficiency from the detector (for example [22]). For unirradiated n-strips the depletion region extends from the p-side of the detector and therefore the n-side geometry has no influence. After type inversion, however, this effect is reversed and a similar gap dependence is observed for n-side strips [16]. This means that large gaps must also be avoided for n-side strips which will be subjected to high bulk damage levels in order to minimise the amount of overdepletion required. 5. Signal response For the LHC in particular, where shaping times have to be fast enough to resolve events from single bunch crossings occurring at 25ns intervals the speed of charge collection begins to be important. Studies of the charge collection speed both by simulation and by experimental measurement [26, 27] show that the n-side signal is comfortably fast enough and that the p-side signal is adequately fast so long as a suitably high bias voltage is applied. In addition, since the predicted levels of radiation damage are already very high, it is important to know how quickly efficiency will be lost if the radiation levels are higher than expected and the depletion voltage of some detectors increases so much that they can no longer be fully-depleted. Continuing studies [28] show that, before irradiation, the p-side achieves good efficiency even below full depletion while the n-side gives no signal until full depletion is achieved and the n-strips become isolated. When irradiated well beyond type-inversion the opposite is true, with the p-side efficiency decreasing quickly below full depletion while the n-side remains usefully efficient at a bias voltage of half that required for full depletion. There is also some evidence to suggest, as might be expected, that finer pitch p-side structures will lose efficiency more rapidly below full depletion than coarser ones.

Conclusions Silicon microstrip detectors will be a part of all the major LHC experiments. Extensive studies by many groups have shown that, with proper design, these devices will remain efficient for the full lifetime of the experiments despite the high radiation levels. Acknowledgements Many of the results described here come from the work of the RD20 collaboration, to which the author expresses his gratitude. In addition the Hiroshima series of conferences is acknowledged for having provided a very effective forum for all the issues discussed in this paper.

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Figures 1. Bias dependence of the isolation resistance of 50µm pitch p-side strips, normalised to 6cm strip length, for different neutron fluences (note that the annealing histories for the devices are very different and therefore only the general behaviour should be considered) 2. Bias dependence of the interstrip capacitance of 50µm pitch p-side strips, measured at 100kHz, before and after 2MeV electron irradiation 3. Cobalt 60 photon dose dependence of the interstrip capacitance of 50µm pitch p- side strips, measured at 1MHz and 100V. 4. Comparison of the Cobalt 60 photon dose dependence of the interstrip capacitance of 50µm pitch n-side p-stop strips, measured at 1MHz and 100V, before and after type-inversion. 5. Schematic diagram of the different p-stop isolation schemes 6. Bias dependence of the p-stop floating potential for different neutron fluences 7. Dependence of the nearest neighbour capacitance on p-stop floating potential for 50µm pitch n-side p-stop strips 8. (a) total strip capacitance, and (b) p-stop floating potential for 100µm pitch common p-stop and p-box style strips

1000 Interstrip resistance (MΩ) 100 10 1 0.1 Unirradiated 7 10 13 n.cm -2 6 10 12 n.cm -2 1 10 14 n.cm -2 2 3 4 5 6 7 8 9 100 2 Bias voltage (Volts) Figure 1 Interstrip capacitance (pf/cm) 2.5 2.0 1.5 1.0 0.5 0.0 0 20 100kHz After 2Mrad Unirradiated 40 60 80 Bias voltage (V) 100 Figure 2

Interstrip capacitance at 100V (pf/cm) 2.5 2.0 1.5 1.0 0.5 0.0 0.0 0.5 1MHz 5µm AC 5µm DC 10µm AC 10µm DC 15µm AC 15µm DC 1.0 Dose (Mrad) 1.5 2.0 Figure 3 Interstrip capacitance at 100V (pf/cm) 3.0 2.5 2.0 1.5 1.0 0.5 0.0 0 1 2 3 1MHz n + / p + (µm) γ only n+γ 5 / 5 5 / 12 5 / 20 4 Photon dose (Mrad) 5 6 7 Figure 4

Guard Guard Guard n+ p+ a) Individual p-stops b) Common p-stops c) "P-boxes" Figure 5-25 -20 50µm pitch, n-strips 5µm / p-stops 12µm P-stop doping 5 10 13 cm -2 P-stop voltage (V) -15-10 -5 After 5 10 13 n/cm 2 After 2 10 12 n/cm 2 0 0-20 -40-60 -80 Unirradiated -100 P-side bias voltage (V) Figure 6

Nearest neighbour capacitance (pf/cm) 3.0 2.5 2.0 1.5 1.0 0.5 0-2 -4-6 P-stop voltage (V) 50µm pitch, n width 5µm p width (µm) 100kHz 1MHz 5 12 20-8 -10 Figure 7 Total strip capacitance at 100V (pf/cm) 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 10 Common p-stop P-box 20 30 100kHz 1MHz 40 50 P-stop voltage at 100V bias (V) 40 30 20 10 0 10 20 30 Common p-stop P-box 40 50 n-strip width (µm) n-strip width (µm) Figure 8(a) Figure 8(b)