Gates and Flip-Flops Chris Kervick (11355511) With Evan Sheridan and Tom Power December 2012 On a scale of 1 to 10, how likely is it that this question is using binary?...4? What s a 4? Abstract The operation of various logic gate circuits were investigated using combinations of simple logic gates. In particular, the truth tables for AND, NAND, OR, NOR, XOR and XNOR gates were recorded, and agreed with the theoretical prediction. The operation of a JK Master- Slave flip-flop was examined. Counters of 16 and 10 were successfully produced. Aims To record the truth tables for the basic logic gates using, where reasonable, only NAND gates. To examine the operation of flip-flops, and their use as counters. Introduction and Theory Logic gates A logic gate is device which takes one or more inputs, performs an operation on them, and outputs a signal. In transistor-transistor logic (TTL), these signals are all voltages of 5 Volts. When such a signal is present, we refer to it as being at logical 1; with no signal present, we refer to it as being at logical 0. 1
Boolean Algebra Figure 1: Some basic logic gate symbols The operation of gates can be described mathematically using Boolean Algebra. Boolean Algebra consists of three basic operations, A.B (AND), A + B (OR) and A (NOT). One well known result in Boolean Algebra is de Morgan s Law: A.B = A + B This can be proved simply by listing all the logical possibilities. Experimental Method NAND and AND gates Using the 7410N circuit, we checked the NAND logic. We then added an inverter to the output in order to check the AND logic. OR and NOR Circuits We constructed an OR gate using only NAND gates, and checked its logic. We then added an inverter to its output to check the NOR logic. XOR and XNOR Circuits We set up separately the three circuits in fig. 2, each of which is overall a XOR circuit, and then checked the XOR logic. By adding an inverter to the first and third circuits, and by removing the final inverter from the second circuit, we checked the XNOR logic. 2
Flip-Flops Figure 2: Three XOR circuits Using a flip-flop from a 7476N I.C. we checked the action of the flip-flop for various values of J and K. We also recorded the action of the Clear and Preset inputs. Counters (Scalers) Using the combination of flip-flops shown in fig. 3, we constructed counters with scales of 16 and 10. We then constructed the circuit in fig. 4 to create a synchronous scale of 16. Figure 3: An asynchronous scale of 16 (with an adjustment for 10) 3
Results and Analysis NAND and AND gates Figure 4: A synchronous scale of 16 For a NAND gate with three inputs, the following data was obtained: Input A Input B Input C Output 1 1 1 0 1 1 0 1 1 0 1 1 0 1 1 1 0 0 1 1 1 0 0 1 0 1 0 1 0 0 0 1 For a NAND gate with three possible inputs, but with one removed, the following data was obtained: 1 1 0 1 0 1 0 1 1 0 0 1 4
This is equivalent to the truth table of a NAND gate with only two inputs. We then placed an inverter on the output of the three-input NAND gate and obtained the following results: Input A Input B Input C Output 1 1 1 0 1 1 0 0 1 0 1 0 0 1 1 0 1 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 This is equivalent to the truth table for an AND gate, demonstrating that NOT NAND = AND We then inverted one of the inputs to the 3-input AND gate above, and obtained the following data: Input A Input B Input C (Inverted) Output 1 1 1 0 1 1 0 1 1 0 1 0 0 1 1 0 1 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 OR and NOR Circuits We constructed the circuit shown in fig. 1 and obtained the following results: 1 1 1 1 0 1 0 1 1 0 0 0 5
This is equivalent to the truth table for an OR gate, showing that one can construct an OR gate out of NANDs and NOTs (technically, a NOT gate can in turn be constructed using only NAND gates, but we did not do this). We then added an inverter to the output of the above circuit, obtaining a NOR gate: 1 1 0 1 0 0 0 1 0 0 0 1 XOR and XNOR gates We constructed separately the three circuits in figure 2, for each of them obtaining the same set of data: 1 1 0 1 0 1 0 1 1 0 0 0 This is the truth table for an XOR gate. Then by adding an inverter to the output of the 1st and 3rd configurations, and by removing the final inverter of the 2nd configuration, we created three separate XNOR gates, for each of them obtaining the following data: 1 1 1 1 0 0 0 1 0 0 0 1 Flip-Flops We observed the following for various versions of J and K. When J = K = 0, there was no change in the outputs. 6
When J = 0, K = 1, Q was reset to its default value, 0. When J = 1, K = 0, Q was set to 1. When J = K = 1, Q and Q would toggle upon each pulse of the clock. We found that the clear function would return the flip-flop to the state of Q = 1, Q = 0, regardless of the state of J or K. Similarly, the preset function set Q = 0, Q = 1. Counters Below is a table of results for both the asynchronous and synchronous scales of 16: Pulse no. 2 0 2 1 2 2 2 3 0 0 0 0 0 1 1 0 0 0 2 0 1 0 0 3 1 1 0 0 4 0 0 1 0 5 1 0 1 0 6 0 1 1 0 7 1 1 1 0 8 0 0 0 1 9 1 0 0 1 10 0 1 0 1 11 1 1 0 1 12 0 0 1 1 13 1 0 1 1 14 0 1 1 1 15 1 1 1 1 16 0 0 0 0 7
Below is a table of results for the asynchronous scale of 10: Pulse no. 2 0 2 1 2 2 2 3 0 0 0 0 0 1 1 0 0 0 2 0 1 0 0 3 1 1 0 0 4 0 0 1 0 5 1 0 1 0 6 0 1 1 0 7 1 1 1 0 8 0 0 0 1 9 1 0 0 1 10 0 0 0 0 Discussion and Conclusions We found that all of the truth tables we recorded coincided with the expected results. It was also found that any logic gate could be created only from NANDs (we did not do this, for simplicity s sake; instead we used premade inverters which could technically themselves be made exclusively from NANDs) We also examined the operation of flip-flops, and showed that they can be used to create counters of various scales. This is a clear example of one of the many applications of flip-flops. 8