MJF688 (), () Complementary Power Darlingtons For Isolated Package Applications Designed for generalpurpose amplifiers and switching applications, where the mounting surface of the device is required to be electrically isolated from the heatsink or chassis. Features Isolated Overmold Package Electrically Similar to the Popular N688, N6668, TIP0, and TIP07 No Isolating Washers Required, Reduced System Cost High DC Current Gain High Isolation Voltage UL Recognized at 500 VRMS: File #E6969 These Devices are PbFree and are RoHS Compliant* MAXIMUM RATINGS Rating Symbol Value Unit CollectorEmitter Voltage V CEO 00 Vdc CollectorBase Voltage V CB 00 Vdc EmitterBase Voltage V EB 5.0 Vdc RMS Isolation Voltage (Note ) V ISOL V (t = 0. sec, R.H. 0%, T A = 5 C) Per Figure 4 4500 Collector Current Continuous I C 0 Adc Collector Current Peak (Note ) I CM 5 Adc Base Current Continuous I B.0 Adc Total Power Dissipation (Note ) @ T C = 5 C Derate above 5 C Total Power Dissipation @ T A = 5 C Derate above 5 C P D 40 0. P D.0 0.06 W W/ C W W/ C Operating and Storage Temperature Range T J, T stg 65 to +50 C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.. Proper strike and creepage distance must be provided.. Pulse Test: Pulse Width = 5.0 ms, Duty Cycle 0%.. Measurement made with thermocouple contacting the bottom insulated surface (in a location beneath the die), the devices mounted on a heatsink with thermal grease and a mounting torque of 6 in. lbs. ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ THERMAL CHARACTERISTICS ÎÎÎÎÎÎÎÎÎÎÎÎÎ Characteristic SymbolÎÎÎ Max ÎÎÎ Unit ÎÎÎÎÎÎÎÎÎÎÎÎÎ Thermal Resistance, JunctiontoCase (Note 4) ÎÎÎ R JCÎÎÎ 4.0ÎÎÎ C/W ÎÎÎÎÎÎÎÎÎÎÎÎÎ Thermal Resistance, JunctiontoAmbient ÎÎÎ R JA ÎÎÎ 6.5 ÎÎÎ C/W Lead Temperature for Soldering Purposes T L 60 C 4. Measurement made with thermocouple contacting the bottom insulated surface (in a location beneath the die), the devices mounted on a heatsink with thermal grease and a mounting torque of 6 in. lbs. COMPLEMENTARY SILICON POWER DARLINGTONS 0 AMPERES 00 VOLTS, 40 WATTS COLLECTOR BASE TO0 FULLPACK CASE D STYLE UL RECOGNIZED ORDERING INFORMATION Device Package Shipping MJF688G G EMITTER MJF688 () MJF6xy8G AYWW MARKING DIAGRAM MJF6xy8 G A Y WW TO0 FULLPACK (PbFree) TO0 FULLPACK (PbFree) COLLECTOR BASE EMITTER () = Specific Device Code x = or 6 y = 6 or 8 = PbFree Package = Assembly Location = Year = Work Week 50 Units/Rail 50 Units/Rail *For additional information on our PbFree strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. Semiconductor Components Industries, LLC, 0 September, 0 Rev. Publication Order Number: MJF688/D
MJF688 (), () ELECTRICAL CHARACTERISTICS (T C = 5 C unless otherwise noted) Characteristic Symbol Min Max Unit OFF CHARACTERISTICS CollectorEmitter Sustaining Voltage (Note 5) (I C = 0 madc, I B = 0) Collector Cutoff Current (V CE = 80 Vdc, I B = 0) Collector Cutoff Current (V CE = 00 Vdc, V EB(off) =.5 Vdc) (V CE = 00 Vdc, V EB(off) =.5 Vdc, T C = 5 C) Collector Cutoff Current (V CB = 00 Vdc, I E = 0) Emitter Cutoff Current (V BE = 5.0 Vdc, I C = 0) ON CHARACTERISTICS (Note 5) DC Current Gain (I C =.0 Adc, V CE = 4.0 Vdc) (I C = 5.0 Adc, V CE =.0 Vdc) (I C = 8.0 Adc, V CE = 4.0 Vdc) (I C = 0 Adc, V CE =.0 Vdc) CollectorEmitter Saturation Voltage (I C =.0 Adc, I B = 6.0 madc) (I C = 5.0 Adc, I B = 0.0 Adc) (I C = 8.0 Adc, I B = 80 madc) (I C = 0 Adc, I B = 0. Adc) BaseEmitter Saturation Voltage (I C = 5.0 Adc, I B = 0.0 Adc) (I C = 0 Adc, I B = 0. Adc) BaseEmitter On Voltage (I C = 8.0 Adc, V CE = 4.0 Vdc) V CEO(sus) 00 I CEO 0 I CEX 0.0 I CBO 0 I EBO.0 h FE 000 000 00 V CE(sat) V BE(sat) 5000.0.0.5.0.8 4.5 V BE(on).5 Vdc Adc Adc madc Adc madc Vdc Vdc Vdc DYNAMIC CHARACTERISTICS SmallSignal Current Gain (I C =.0 Adc, V CE = 5.0 Vdc, f test =.0 MHz) h fe 0 Output Capacitance (V CB = 0 Vdc, I E = 0, f =.0 MHz) MJF688 Insulation Capacitance (CollectortoExternal Heatsink) SmallSignal Current Gain (I C =.0 Adc, V CE = 5.0 Vdc, f =.0 khz) 5. Pulse Test: Pulse Width 00 s, Duty Cycle.0%. MJF688 COLLECTOR C ob 00 C chs.0 Typ h fe 000 COLLECTOR pf pf BASE BASE 8 k 0 8 k 0 EMITTER EMITTER Figure. Darlington Schematic
MJF688 (), () R B & R C VARIED TO OBTAIN DESIRED CURRENT LEVELS D, MUST BE FAST RECOVERY TYPES, e.g., MUR0 USED ABOVE I B 00 ma MSD600 USED BELOW I B 00 ma V APPROX. + V R B 5 D 8 k 0 V CC + 0 V R C TUT SCOPE V APPROX. - 8 V 5 s -4 V t r, t f 0 ns DUTY CYCLE = % FOR t d AND t r, D IS DISCONNECTED AND V = 0 FOR TEST CIRCUIT REVERSE ALL POLARITIES. Figure. Switching Times Test Circuit t, TIME ( s) μ 7 5 0.7 MJF688 t s t f 0. 0. V CC = 0 V I C /I B = 50 I B = I B t d 0.07 0. 5 0 I C, COLLECTOR CURRENT (AMPS) t r t, TIME ( s) μ 0 7 5 0.7 0. t r t f V CC = 0 V I C /I B = 50 I B = I B 0. 0. 0. 0.7 5 7 0 I C, COLLECTOR CURRENT (AMPS) t s t d Figure. Typical Switching Times IC, COLLECTOR CURRENT (AMPS) 0 0 5 0. 0. 0.05 0.0 0.0 T J = 50 C dc 5 ms CURRENT LIMIT SECONDARY BREAKDOWN LIMIT THERMAL LIMIT @ T C = 5 C (SINGLE PULSE) 00 s ms 5 0 0 0 50 00 V CE, COLLECTOR-EMITTER VOLTAGE (VOLTS) Figure 4. Maximum Forward Bias Safe Operating Area
MJF688 (), () r(t), TRANSIENT THERMAL RESISTANCE (NORMALIZED) 0. 0. 0.05 0.0 0.0 D = 0. 0.05 SINGLE PULSE R JC (t) = r(t) R JC R JC = C/W MAX D CURVES APPLY FOR POWER PULSE TRAIN SHOWN READ TIME AT t T J(pk) - T C = P (pk) R JC(t) P (pk) t t DUTY CYCLE, D = t /t 0.0 0.0 0.0 0.05 0. 0. 5 0 0 0 50 00 00 500 K K K 5K 0K 0K0K 50K 00K t, TIME (ms) Figure 5. Thermal Response POWER DERATING FACTOR 0.8 0.6 0.4 0 0 THERMAL DERATING SECOND BREAKDOWN DERATING 40 60 80 00 0 40 60 MJF688 T C, CASE TEMPERATURE ( C) Figure 6. Maximum Power Derating There are two limitations on the power handling ability of a transistor: average junction temperature and second breakdown. Safe operating area curves indicate I C V CE limits of the transistor that must be observed for reliable operation; i.e., the transistor must not be subjected to greater dissipation than the curves indicate. The data of Figure 4 is based on T J(pk) = l50 C; T C is variable depending on conditions. Secondary breakdown pulse limits are valid for duty cycles to 0% provided T J(pk) < 50 C. T J(pk) may be calculated from the data in Figure 5. At high case temperatures, thermal limitations will reduce the power that can be handled to values less than the limitations imposed by secondary breakdown. hfe, SMALL-SIGNAL CURRENT GAIN 0,000 5000 000 0 000 500 00 00 50 0 0 T C = 5 C V CE = 4 Vdc I C = Adc 0 5 0 0 50 00 500 000 f, FREQUENCY (khz) hfe, SMALL-SIGNAL CURRENT GAIN 0,000 5000 0 000 500 00 Figure 7. Typical SmallSignal Current Gain 50 0 T C = 5 C V CE = 4 VOLTS I C = AMPS 0 5 7 0 0 0 50 70 00 00 500 000 f, FREQUENCY (khz) 4
MJF688 (), () MJF688 00 00 C, CAPACITANCE (pf) 00 70 C ib C ob C, CAPACITANCE (pf) 00 70 C ib Cob 50 50 0 0. 5 0 0 50 00 V R, REVERSE VOLTAGE (VOLTS) 0 0. 5 0 0 50 00 V R, REVERSE VOLTAGE (VOLTS) Figure 8. Typical Capacitance hfe, DC CURRENT GAIN 0,000 0,000 5000 000 0 000 500 T J = 50 C 5 C - 55 C V CE = 4 V hfe, DC CURRENT GAIN 0,000 0,000 7000 5000 000 0 000 700 500 T J = 50 C 5 C - 55 C V CE = 4 V 00 0. 00 0. 0.7 5 7 0 0. 0. 0.7 5 7 0 Figure 9. Typical DC Current Gain VCE, COLLECTOR-EMITTER VOLTAGE (VOLTS).6..8.4 I C = A 4 A 6 A 0. 0.7 5 7 0 0 0 VCE, COLLECTOR-EMITTER VOLTAGE (VOLTS).6..8.4 I C = A 4 A 6 A 0. 0.7 5 7 0 0 0 I B, BASE CURRENT (ma) I B, BASE CURRENT (ma) Figure 0. Typical Collector Saturation Region 5
MJF688 (), ().5 MJF688.5 V, VOLTAGE (VOLTS).5 0. V BE(sat) @ I C /I B = 50 V BE @ V CE = 4 V V CE(sat) @ I C /I B = 50 V, VOLTAGE (VOLTS).5 V BE @ V CE = 4 V V BE(sat) @ I C /I B = 50 V CE(sat) @ I C /I B = 50 0. 0.7 5 7 0 0. 0. 0.7 5 7 0 Figure. Typical On Voltages V, TEMPERATURE COEFFICIENT (mv/ C) θ + 5 + 4 + + + 0 - - - - 4-5 0. *I C /I B h FE/ * VC for V CE(sat) VB for V BE 5 C to 50 C - 55 C to 5 C 5 C to 50 C - 55 C to 5 C V, TEMPERATURE COEFFICIENT (mv/ C) θ + 5 + 4 + + + 0 - - - - 4 *I C /I B h FE/ * VC for V CE(sat) VB for V BE 5 C to 50 C - 55 C to 5 C 5 C to 50 C - 55 C to 5 C - 5 0. 0.7 5 7 0 0. 0. 0.7 5 7 0 Figure. Typical Temperature Coefficients 0 5 0 5, COLLECTOR CURRENT ( A) μ I C 0 4 0 0 0 0 0 REVERSE V CE = 0 V T J = 50 C 00 C FORWARD, COLLECTOR CURRENT ( A) μ IC 0 4 0 0 0 0 0 REVERSE V CE = 0 V T J = 50 C 00 C FORWARD 0-5 C - 0.6-0.4-0 + + 0.4 + 0.6 + 0.8 + +. +.4 V BE, BASE-EMITTER VOLTAGE (VOLTS) 5 C 0 - + 0.6 + 0.4 + 0 - - 0.4-0.6-0.8 - -. -.4 V BE, BASE-EMITTER VOLTAGE (VOLTS) Figure. Typical Collector CutOff Region 6
MJF688 (), () TEST CONDITION FOR ISOLATION TEST* FULLY ISOLATED PACKAGE LEADS HEATSINK 0.0 MIN Figure 4. Mounting Position *Measurement made between leads and heatsink with all leads shorted together. MOUNTING INFORMATION 4-40 SCREW CLIP PLAIN WASHER HEATSINK COMPRESSION WASHER NUT HEATSINK Figure 5. Typical Mounting Techniques* Laboratory tests on a limited number of samples indicate, when using the screw and compression washer mounting technique, a screw torque of 6 to 8 in. lbs is sufficient to provide maximum power dissipation capability. The compression washer helps to maintain a constant pressure on the package over time and during large temperature excursions. Destructive laboratory tests show that using a hex head 440 screw, without washers, and applying a torque in excess of 0 in. lbs will cause the plastic to crack around the mounting hole, resulting in a loss of isolation capability. Additional tests on slotted 440 screws indicate that the screw slot fails between 5 to 0 in. lbs without adversely affecting the package. However, in order to positively ensure the package integrity of the fully isolated device, ON Semiconductor does not recommend exceeding 0 in. lbs of mounting torque under any mounting conditions. ** For more information about mounting power semiconductors see Application Note AN040. 7
MJF688 (), () PACKAGE DIMENSIONS TO0 FULLPAK CASE D0 ISSUE K A K F Q H B G N L D PL Y U 5 (0.00) M B M Y C T SEATING PLANE S J R NOTES:. DIMENSIONING AND TOLERANCING PER ANSI Y4.5M, 98.. CONTROLLING DIMENSION: INCH. D-0 THRU D-0 OBSOLETE, NEW STANDARD D-0. INCHES MILLIMETERS DIM MIN MAX MIN MAX A 0.67 0.65 5.67 6. B 0.9 0.49 9.96 0.6 C 0.77 0.9 4.50 4.90 D 0.04 0.09 0.60.00 F 0.6 9.95.8 G 0.00 BSC.54 BSC H 0.8.00.4 J 0.08 0.05 0.45 0.6 K 0 4.78.7 L 0.048 0.058..47 N 0. BSC 5.08 BSC Q 0.8.0.50 R 0.099 0.7.5.96 S 0.09 0..4.87 U 9 7 6.06 6.88 STYLE : PIN. BASE. COLLECTOR. EMITTER ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC s product/patent coverage may be accessed at www.onsemi.com/site/pdf/patentmarking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 56, Denver, Colorado 807 USA Phone: 067575 or 80044860 Toll Free USA/Canada Fax: 067576 or 80044867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 80089855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 4 790 90 Japan Customer Focus Center Phone: 8587050 8 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative MJF688/D