M = =,9 C Controlling ~ full-controlled Part number Backside: isolated 3 Features / dvantages: pplications: Package: SO-7B (minibloc) for line frequency Planar passivated chip Long-term stability Line rectifying 5/ Hz Softstart C motor control DC Motor control Power converter C power control Lighting and temperature control solation oltage: 3 ~ ndustry standard outline ohs compliant Epoxy meets UL 9- Base plate: Copper internally DCB isolated dvanced power cycling erms Conditions of usage: he data contained in this product data sheet is exclusively intended for technically trained staff. he user will have to evaluate the suitability of the product for the intended application and the completeness of the product data with respect to his application. he specifications of our components may not be considered as an assurance of component characteristics. he information in the valid application- and assembly notes must be considered. Should you require product information in excess of the data given in this product data sheet or which concerns the specific application of your product, please contact the sales office, which is responsible for you. Due to technical requirements our product may contain dangerous substances. For information on the types in question please contact the sales office, which is responsible for you. Should you intend to use the product in aviation, in health or live endangering or life support applications, please notify. For any such application we urgently recommend - to perform joint risk and quality assessments; - the conclusion of quality agreements; - to establish joint measures of an ongoing product survey, and that we may make delivery dependent on the realization of any such measures. 5 XYS all rights reserved Data according to EC 77and per semiconductor unless otherwise specified 587b
Symbol Definition Conditions = 5 C J = 5 C atings typ. max. 3 forward voltage drop = = 5 C,9 SM/DSM M/DM MS = = = C= 95 C = 5 C J = 5 C J threshold voltage J = 5 C,87 for power loss calculation only r slope resistance,5 mω thermal resistance junction to case,7 K/ thjc P tot total power dissipation = 5 C P GM P G J J = 5 C SM max. forward surge current t = ms; (5 Hz), sine J = 5 C = C J junction capacitance = f = MHz = 5 C max. gate power dissipation t P= 3 µs C = 5 C average gate power dissipation t = ms; (5 Hz), sine J C min. 6,6,9,7 t = 3 µs 5 P J = 5 C ²t value for fusing t = ms; (5 Hz), sine = 5 C (di/dt) cr average forward current MS forward current per phase critical rate of rise of current sine t = ms; (5 Hz), sine J = 5 C = = = 5 C J J = 88,5 Unit µ m k²s k²s k²s k²s J pf J = 5 C; f = 5 Hz t P= µs; di G /dt =,3 /µs; G =,3; = ⅔ repetitive, = (dv/dt) critical rate of rise of voltage = ⅔ DM J = 5 C cr max. non-repetitive reverse/forward blocking voltage max. repetitive reverse/forward blocking voltage reverse current, drain current thch thermal resistance case to heatsink, GK = ; method (linear voltage rise) G gate trigger voltage = 6 = 5 C D DM J J = - C 65 5 55,,76,3,6 5 /µs /µs /µs,5 G gate trigger current D = 6 J = 5 C m J = - C,6 5 m GD gate non-trigger voltage = ⅔ J = C, D DM 5 GD gate non-trigger current 5 m L latching current t µs p = J = 5 C 5 m G =,3; di G /dt =,3 /µs H holding current D = 6 GK = J = 5 C m t gd gate controlled delay time = ½ J = 5 C µs D DM G =,3 ; di G /dt =,3 /µs non-repet., = t q turn-off time = ; = ; = ⅔ DM J = 5 C 5 µs di/dt = /µs dv/dt = 5 /µs t p = µs K/ 5 XYS all rights reserved Data according to EC 77and per semiconductor unless otherwise specified 587b
Package atings Symbol Definition Conditions min. typ. max. Unit MS MS current per terminal 5 J virtual junction temperature - 5 C op operation temperature - 5 C eight M D M dspp/pp dspb/pb SO-7B (minibloc) stg storage temperature - 5 C SOL mounting torque, terminal torque, creepage distance on surface striking distance through air isolation voltage t = second t = minute terminal to terminal terminal to backside 5/ Hz, MS; SOL m,5 3, 8,6 6,8 3 5 3,5,5 g Nm Nm mm mm Logo Product Marking Part No. XXXXX Zyyww abcd ssembly Line DateCode ssembly Code Ordering Standard Ordering Number Marking on Product Delivery Mode Quantity Code No. ube 593 Equivalent Circuits for Simulation * on die level = 5 C J max threshold voltage,87 max slope resistance * 9,7 mω 5 XYS all rights reserved Data according to EC 77and per semiconductor unless otherwise specified 587b
Outlines SO-7B (minibloc) 3 5 XYS all rights reserved Data according to EC 77and per semiconductor unless otherwise specified 587b
5 5 Hz, % M = [] 5 C 5 C J = 5 C,,8,,6, [] 5 SM 35 [] 3 5 J = 5 C J = 5 C,, t [s] t [ s] J = 5 C J = 5 C 3 5 6 7 8 9 t [ms] Fig. Forward characteristics Fig. Surge overload current Fig. 3 t versus time (- ms) G [] : G, J = 5 C : G, J = 5 C 3: G, J = - C 3 5 6 t gd [µs] typ. Limit J = 5 C ()M [] dc =.5..33.7.8 GD, J = 5 C, G [m] : P G =.5 5: P GM = 5 6: P GM = Fig. Gate trigger characteristics G [m] Fig. 5 Gate controlled delay time 5 5 75 5 5 C [ C] Fig. 6 Max. forward current at case temperature P () [] dc =.5..33.7.8 3 5 () [] 5 5 amb [ C] thh..6.8...,8,6 Z thjc, [K/] thi [K/] t i [s],.59.6.8.7.357.,.76.5 3 t [ms] Fig. 7a Power dissipation versus direct output current Fig. 7b and ambient temperature Fig. 8 ransient thermal impedance junction to case 5 XYS all rights reserved Data according to EC 77and per semiconductor unless otherwise specified 587b