Strain and Temperature Dependence of Defect Formation at AlGaN/GaN High Electron Mobility Transistors on a Nanometer Scale Chung-Han Lin Department of Electrical & Computer Engineering, The Ohio State University Tyler A. Merz and Daniel R. Doutt Department of Physics, The Ohio State University Jungwoo Joh and Jesus del Alamo Microsystems Technology Laboratory, Massachusetts Institute of Technology Umesh K. Mishra Electrical & Computer Engineering, University of California, Santa Barbara Leonard J. Brillson Departments of Electrical & Computer Engineering and Physics Symposium G: Reliability and Materials Issues of III-V and II-VI Semiconductor Optical and Electron Devices and Materials II
Outline Background : AlGaN/GaN HEMT physical degradation mechanisms Historical efforts Techniques: DRCLS, KPFM, I D &I GOFF vs. V DS Device Conditions: ON-state vs. OFF-state stress Electric field vs. Thermal stress : Surface potential, leakage current, defect generation Failure prediction Conclusions: (1) Dominant impact of V DS vs. I DS on device reliability (2) Primary defects located inside AlGaN
Motivation AlGaN/GaN HEMT: high power, RF, and high speed applications Reliability challenge: Hard to predict failure High current, piezoelectric material, & high field due to high bias Defect generation Micro-CL, AFM, and KPFM: Follow evolution of potential, defects, and failure
Background: All-Optical Methods [1] M. Kuball et al. IEEE Electron Device Lett. 23, 7 (2002) [2] A. Sarau et al. IEEE Trans. Electron Devices, 53, 2438 (2006) Raman/IR Technique Shigekawa et al. J. Appl. Phys. 92, 531 (2002) PL Technique
Background: Scanned Probe Methods T versus Gate-Drain Location E G versus T Lin et al. Appl. Phys. Lett., 95, 033510 (2009) Aubry et al. IEEE Transactions on Electron Device, 54, 385 (2007) SThM Technique A. P. Young et al., Appl. Phys. Lett, 77, 699 (2000) DRCLS Technique
Intentisty (a.u.) Depth and Laterally-Resolved CLS T, σ, defects, atomic composition source Gate Drain AlGaN 2DEG GaN JEOL JAMP 7800F : SEM, Micro-CL 0.0035 0.0030 Grading AlGaN AlGaN AlN GaN 5 kv, 10 nm beam Buffer layer Substrate 0.0025 0.0020 0.0015 0.0010 0.0005 1 kev 2 kev 3 kev 4 kev 5 kev 0.0000 0 20 40 60 80 100 120 140 160 180 200 (25%) (10%) 10 nm 50 nm Depth (nm)
Background: Temperature Maps W.D. Hu et al. J. Appl. Phys. 100, 074501 (2006) I. Ahmad et al. Appl. Phys. Lett. 86, 173503 (2005) Hottest spot at drain-side gate edge Hot spots also inside GaN buffer September 19-24 2010 Tampa, Florida, USA C.-H. Lin et al, IEEE Trans. Electron Devices
Electroluminescence Results: Gap States Meneghesso et al. IEEE Tran. Device Mater. Rel., 8, 332 (2008) Nakao et al. Jpn. J. Appl. Phys., 41, 1990 (2002) 80 C 10 C Bouya et al. Microelectron. Reliab., 48, 1366 (2008) Electroluminescence detects gap states forming inside HEMT during operation
Electrochemically-Produced Defects Park et al. Microelectron. Reliab., 49, 478 (2009) High C, O, and Si concentrations at gate foot lattice disruption area Gate leakage current promotes electrochemical reaction Smith et al. ECS Transactions, 19, 113 (2009)
Impact of Structural Defects Chowdhury et al. IEEE Electron Device Lett. 29, 1098 (2008) Park et al. Microelectron. Reliab. 49, 478 (2009) High field at drain - side gate can form structural defects that affect I G-OFF & I D September 19-24 2010 Tampa, Florida, USA Joh et al. IEEE Electron Dev. Lett. 29, 287 (2008)
Inverse Piezoelectric Effect and Defects Joh et al. Microelectron. Reliab., 50, 767 (2010) Very high local strain fields del Alamo et al. Microelectron. Reliab., 49, 1200 (2009) V DS + V inv piezo strain energy exceed elastic energy of crystal form defects at gate foot Sarua et al. Appl, Phys. Lett., 88, 103502 (2006)
Measurement Strategy Thermal Mapping: DRCLS NBE laterally (<10 nm) & in depth (nm s to µm s) Obtain T vs. I DS ; locate hot spots Stress Mapping: DRCLS NBE near gate foot vs. V DS with I DS OFF (no heating) Potential Mapping: Kelvin work function vs. V DS with I DS OFF (no heating) Device testing: Step-wise ON & OFF-state I DMAX and I GOFF vs. V DS Defect Generation: CLS defect peak intensities vs. thermal and electrical stress Defect Localization: DRCLS intensities vs. depth
Upper Gate Source Stress Conditions Reference: No stress ON-state stress: high I D, low V DS (I D = 0.75 A/mm, V DS = 6 V, V G = 0 V) Lower Drain AFM & KPFM scanning area OFF-state stress : low I D, high V DS (I D = 5*10-6 A/mm, V DS = 10 ~ 30 V V G = -6 V) I GOFF taken at V DS = 0.5 V, V GS = -6 V Aim: Test electric field-induced strain vs. currentinduced (e.g., heating) mechanism
Strain Measurements: Drain-side Gate Foot Band Gap vs. V DG Strain vs. V DG ON-state Applied voltage blue-shifts band gap, increases mechanical strain at drain-side gate foot 26 mev CL shift = 1 GPa ; V DG = 32 V 0.27 GPa C.H. Lin et al. Appl. Phys. Lett. 97, 223502 (2010)
I DMAX, I G-OFF vs. Time & Applied Voltage OFF-state ON-state OFF-state I G-Off rises sharply at threshold V DG ON-state I G-OFF decreases vs. time device degradation with external stress
Surface Potential Evolution (OFF-state) G S D Low potential regions appear and expand with increasing applied stress V DG C.H. Lin et al. Appl. Phys. Lett. 97, 223502 (2010)
Surface Potential Evolution (ON-state) G S D Current stress seems to degrade device in a different way
Device Failure under OFF-state Stress Before failure After failure Gate Source Gate Source Failure area Drain Drain Device failure occurs as V DG increases further Large, cratered failure area appears; morphology of drain metal exhibits huge change
Correlation between AFM, KFPM & SEM AFM KPFM SEM Source 15 μm Gate Drain Before failure After failure AFM, KPFM and SEM results reveal that device fails at the lowest surface potential area, where defect density is highest
Defect Spectroscopy of Low Potential Region Within low potential region and at depth of 2DEG, DRCLS reveals formation of deep level defects C.H. Lin et al. Appl. Phys. Lett. 97, 223502 (2010)
Defect Generation vs. Location Areas of highest defect intensities and highest stress correlate Lower defect creation for On-state stress Largest defect increase at lowest potential region C.-H. Lin et al, IEEE Trans. Electron Devices
Defect Generation vs. Potential Increasing defects densities correlate with decreasing potential
Normalized Averaged Surface Potential Normalized Averaged Surface Potential Surface Potential vs. Electrical Stress OFF-state 1.5 1.0 0.5 0.0-0.5-1.0-1.5-2.0-2.5-3.0 0 5 10 15 20 25 30 35 40 V DG (Volt) 0.8 0.6 0.4 0.2 0.0 A3 A4 A5 A6 C.H. Lin et al. Appl. Phys. Lett. 97, 223502 (2010) Defect density 1 (10 12 /cm 2 ) 10 8 nm 7 nm 9 nm 1.0 A1 A2 Φ E T ΔV σ - = σ 0 /[1+exp[(E F E a )/kt]] qδv = q 2 σ a d/ε E C E F E V E F moves lower in gap as acceptor-like defects increase Drain-side surface potential decreases (Φ increases) with increasing V DG Above V DG threshold, faster decreases at low Φ patches -0.2 0 5 10 15 20 25 30 35 40 V DG (Volt) Higher Φ patches decrease slower
CLS Energy Comparison with Trap Spectroscopy DLOS: 3 traps observed: E C -0.55 (dominant), 1.1, &1.7-1.9 ev High DLOS 10 12 cm -2 Trap Density: A. R. Arehart, A. C. Malonis, C. Poblenz, Y. Pei, J. S. Speck, U. K Mishra, S. A. Ringel, Phys. Stat. Sol. C 1-3 (2011) DOI 10.1002/pssc.201000955 DRCLS: 2.8 ev BB and 2.3 ev YB emissions: Traps that grow under DC stress high 10 12 cm -2 densities GaN 3.4 ev 0.55 ev 2.8 ev 1.1 ev E C 2.3 ev AlGaN 4.1~4.2 ev 0.55 ev 3.6 ev E C 1.35 ev 2.8 ev E V E V KPFM E a = 0.55 Activation Energy: S. Kamiya, M. Iwami, T. Tsuchiya, M. Kurouchi, J. Kikawa, T. Yamada, A. Wakejima, H. Miyamoto, A. Suzuki, A. Hinoki, T. Araki, and Y. Nanishi, Appl. Phys. Lett. 90, 213511 (2007); M. Arakawa, S. Kishimoto, and T. Mizutani, Jpn. J. Appl. Phys. Part I 36, 1826 (1997)
AlGaN/GaN HEMT Defect Location Pre-stress Post-stress Source Source Before stress After stress source side After stress drain side Drain Drain 2.2 New 3.6 ev feature 0.5-0.6 ev below E C BB defect within AlGaN Larger 2.2 ev threshold feature higher YB defects with stress Higher Drain-side vs. Source-side changes: consistent with DRCLS
AlGaN/GaN HEMT Physical Degradation Mechanisms Strain- and Field-induced Impurity Diffusion Inverse Piezoelectric Effect M. Kuball, et al., Microelectron. Reliab. 51, 195 (2011) del Alamo et al. Microelectron. Reliab., 49, 1200 (2009) Electronically-Active Defect Formation Multiple possible mechanisms that all create electronicallyactive defects
CL Intensity (a.u.) Depth (nm) 20 15 10 5 AlGaN/GaN HEMT Defect Location YB 2.25 ev) BB 2.8 ev) GaN NBE AlGaN NBE AlGaN NBE FK-shift E B (kev) 9 0 1.6 2.0 2.4 2.8 3.2 3.6 4.0 4.4 4.8 Photon Energy (ev) BB peak shifts with AlGaN BB defect in AlGaN Shifted AlGaN NBE and BB features appear only when excitation reaches 40 nm Al 0.22 Ga 0.78 N layer Additional piezoelectric strain field 1 1.5 2 3 4 5 6 7 8 0 20 40 60 80 100 120 140 160 180 200 220 240 1 kev 2 kev 3 kev 4 kev 5 kev 6keV AlGaN:Si grading layer ( 0 < x < 0.22) ; 10 nm Al 0.22 Ga 0.78 N ; 40 nm AlN : 0.7 nm GaN 0.000 0.001 0.002 0.003 0.004 0.005 Excitation Intensity (a.u.)
Conclusions DRCLS measures electric field-induced stress and current-induced heating on a nanoscale during OFF-state and ON-state operation KPFM maps reveal expanding low potential patches where defects form and device failure will occur Separation of field- vs. current-induced degradation demonstrates their relative impact on AlGaN/GaN reliability Nanoscale patch potential and defect evolution inside AlGaN vs. V DG threshold effect at drain-side gate foot support inverse piezoelectric degradation model