E-UM ESIGN VER : RUN POWER SW PG /TT ONNETOR TT HRGER PG PG othan ( Micro-FPG) PG, / V_SR VSUS PG PU VR PG LOKS PG R-SOIMM PG, R-SOIMM PG, MHZ R I FS MHZ lviso GM/GML PG PG,,,0, LVS TVOUT VG Panel onnector PG S-Video PG VG PG S-Video reserved PR-VG ST - H PG 0 PT - H PG 0 Internal O -ROM PG 0 ST0 PT 00 /zalia MI interface IH-M 0 G PG,, US.0 (P0~P) US.0 (P) US.0 (P) US.0 (P0~P,P) LN RTL00S PG RUS P PG,, luetooth US.0 I/O Ports PG PI us MHz PG Magnetics PG MINI-PI PG PR-US.0 P reserved for third US RJ PG PR-LN Port Replicator PG onexant udio PG LP PMI ON. PG ard Reader PG IEEE ONN. PG Wireless LN ard PG UIO mplifier PG M PG 0 K NS PG X-us Super IO LPN Serial Parallel PR-OM PR-Printer PR-PS/ Jack to Speaker PG udio Jacks PG MOEM RJ PG Key Matrix PG Touch Pad PG Flash PG PG Ir PG PR-udio out PROJET : E Quanta omputer Inc. Size ocument Number Rev lock iagram ate: Friday, October, 00 Sheet of
PI ROUTING TLE REQ0# / GNT0# REQ# / GNT# REQ# / GNT# ISEL INTERUPT PIRQ# PIRQ#, PIRQ# PIRQ#,PIRQ#,PIRQ# EVIE RTL0S MINI-PI TI SM I IH MOSFET LK GEN IMM IMM0 VSUS VRUN SM II NS MOSFET EPROM Smart attery Thermal I of PU VLW VRUN PROJET : E Quanta omputer Inc. Size ocument Number Rev lock iagram ate: Friday, October, 00 Sheet of
HWPG VRON PU_VI[0..] STP_PU# PRSLPVR PSI S VHORE IMVP_PWRG LK_EN# _IN F LM harger attery V iode O MTT F O0 O VIN VIN MX VLW VLW VLW.VREF MIN MIN SUS N00 O VRUN VSUS VRUN VIN MINON SUSON LM VP _VSUS HWPG O _VRUN PG VLW HWPG MIN SUS O VSUS VRUN VIN SUSON S0 MIN HWPG _VSUS O _VRUN VRUN F F S_ON V_LK SI0 V_S _VSUS MINON _VRUN Pass Through for SUS Rail G ontrolled for RUN Rail _VSUS _VRUN VRUN VSUS I F F MV V V_MOEM F F _V _V VRUN O0 FN_PWR VRUN VRUN VRUN F F F VH VO VH V_S F V_LN_ TRL V_LN_ TRL PV_LN F F PV_LN V_LN PROJET : E Quanta omputer Inc. Size ocument Number Rev lock iagram ate: Friday, October, 00 Sheet of
INEX Power and Ground Pg# escription NI LIST New Label NOTE escription ontrol Signal or Source - Schematic lock iagram FRONTPGE - othan/younah - LVISO GM - IHM - RI SO-IMM(00P) V VIN MTT VLW VLW VRUN PTER (0V) MIN POWER (0~0V) MIN TTERY (0~V) V LWYS V LWYS V RUN MINON LOK GENERTOR - L ONN & RT ONN 0 ST & IE (H&_ROM) - PI & ONN & IEEE MINI-PI & M ONN - LN & LN onn. TOUH P & FN&K zilia OE udio mplifier 0 MOEM OKING & SIO & FIR K P VLW V_S VSUS VRUN VH VO VF FN_PWR V MV V_MOEM NO USE ONNET TO VRUN IRETLY ONNET TO VRUN IRETLY NO USE V LWYS & K POWER THIS POWER WILL E TUNEE OFF IN S TTERY MOE V S ONTROLE POWER V S ONTROLE POWER V H POWER V O POWER EXTERNL F POWER (V) FN POWER (V) mplifier Power V RUN Plane ode Power VRUN MOEM Power VSUS S_ON SUS MIN VH_EN# VMO_EN# VF_EN# VFN, MX_OV# VRUN VSUS VRUN or VRUN PU Power.V/V/V/V.VSUS/.VRUN VP/.V/.V attery & harger VLW V_S VSUS VRUN VH ONNET TO VRUN IRETLY 0 POWER (V) THIS POWER WILL E TUNEE OFF IN S TTERY MOE SLP_S# TRL POWER SLP_S# TRL POWER ST H Power S_ON SUS MIN VH_EN# V_LN_ LN igital Power V_S V_LN_ LN nalog Power V_S PV_LN LN nalog Power V_LN_ (V_S) V_LN LN igital Power. or.v PV_LN(V_S) RTV RT & PL POWER REFV _VSUS SUSON _VRUN MIN _VSUS NO USE _VRUN NO USE _VRUN _V_M NO USE _VSUS or _VRUN _V_S THIS POWER WILL E TUNEE OFF IN S TTERY MOE S_ON _VSUS SUSON _VRUN GP I/O POWER MIN _VSUS SMR_VTERM _VSUS _VRUN MINON VG_V NO USE TI VG.V _VRUN VGORE NO USE TI VG ORE.0/.V MINON, POW_SW VP GTL POWER (.0V) MINON VHORE PU ORE POWER (./.V) VR_ON, HWPG GN LL PGES IGITL GROUN GN Page, UIO GN GNP NO USE PU POWER GN GNP NO USE HRGER GN _GN LNGN Jcak NO USE / POWER GN OMO ONN GN PROJET : E Quanta omputer Inc. Size ocument Number Rev Index ate: Friday, October, 00 Sheet of
T_00: hange footprint to GM-SOKET from L000 from MPGM VRUN VRUN G: N for othan and PRSTP# for Yonah H#[..], HST0# HST# HREQ#0 HREQ# HREQ# HREQ# HREQ# S# HREQ0# PRI# NR# HLOK# HIT# HITM# EFER# HTRY# RS#0 RS# RS# 0M# FERR# IGNNE# PUPWRG SMI# SYS_RESET# T *P T *P INTR NMI STPLK# PUSLP# PSLP# PRSTP# H#[..] IERR# 0M# FERR# IGNNE# PUPWRG SMI# STPLK# PUSLP# PSLP# THERM THERM H# P H# U H# V H# R H# V H# W H# T H#0 W H# Y H# Y H# U H# H# Y H# H# F H# H# H#0 H# H# E H# H# H# H# H# E H# H# F H#0 E H# F PM0# PM# PM# PM# TK TO TI TMS TRST# PREQ# PRY# R# U E R P T P T, THERMTRIP# THERMTRIP# 0_ R VP PU_PROHOT# R _ N N J L J K K L M H K L E 0 0 G U # # # # # # # 0# # # # # # # # # # 0# # # # # # # # # # 0# # ST0# ST# REQ0# REQ# REQ# REQ# REQ# S# IERR# REQ0# PRI# NR# LOK# HIT# HITM# EFER# PM0# PM# PM# PM# TRY# RS0# RS# RS# 0M# FERR# IGNNE# PWRGOO SMI# TK TO TI TMS TRST# ITP_LK0 ITP_LK PREQ# PRY# R# LINT0 LINT STPLK# SLP# PSLP# PRSTP# THERM THERM THERMTRIP# PROHOT# REQUEST PHSE SIGNLS ERROR SIGNLS RITRTION PHSE SIGNLS SNOOP PHSE SIGNLS RESPONSE PHSE SIGNLS P OMPTIILITY SIGNLS IGNOSTI & TEST SIGNLS EXEUTION ONTROL SIGNLS othan OF THERML IOE T PHSE SIGNLS 0# # # # # # # # # # 0# # # # # # # # # # 0# # # # # # # # # # 0# # # # # # # # # # 0# # # # # # # # # # 0# # # # # # # # # # 0# # # # STN0# STP0# STN# STP# STN# STP# STN# STP# INV0# INV# INV# INV# SY# RY# LK LK0 INIT# RESET# PWR# 0 0 E E H G L M H F G J M J L N M H N K Y T U V R R R U V U V Y Y 0 E F F0 E F F F K L W W E E J T 0 M H H#0 H# H# H# H# H# H# H# H# H# H#0 H# H# H# H# H# H# H# H# H# H#0 H# H# H# H# H# H# H# H# H# H#0 H# H# H# H# H# H# H# H# H# H#0 H# H# H# H# H# H# H# H# H# H#0 H# H# H# H# H# H# H# H# H# H#0 H# H# H# PUINIT# PURST# H#[0..] HSTN0# HSTP0# HSTN# HSTP# HSTN# HSTP# HSTN# HSTP# HI0# HI# HI# HI# SY# RY# HLK_PU# HLK_PU VRUN PURST# PWR# H#[0..] THERM THERM PUINIT# R 0 mil trace / 0 mil space MIL Signal TI TMS TRST# TK TO FERR# IERR# PUPWRG TK TRST# V_THM.U/0V_ 00P U MX ohm /- % VP KSMT KSMLK ITP disable guidelines Resistor Value onnect To 0 ohm /- % ohm /- % V SMT XN SMLK XP -LT -OVT GN VTT VTT 0 ohm /- % GN GN TI TMS TO PURST# R# VP VRUN VRUN VRUN VSUS VRUN VP MT MLK Resistor Placement Within.0" of the PU Within.0" of the PU Within.0" of the PU Within.0" of the PU Open VTT Within.0" of the PU Note: Populate R, R when ITP connector is populated. R0 _ R _ R 00/F R./F R 0 R 0K-00 R./F R0 0K-00 R 0K-00 0 R R./F R 0K-00 R 0/F_ Q N00 Q N00 R./F Item MT, MLK, THRM# MX_L# MX_OV#, R 0/F_ othan Processor PROJET : E Quanta omputer Inc. Size ocument Number Rev othan (HOST) ate: Friday, October, 00 Sheet of
VP VHORE VHORE VHORE VHORE OMP0 OMP OMP OMP Place pulldown resistors within 0." of OMP pins mils Trace Width of OMP0, mils Trace Width of OMP, 0 0U_.V_ 0U_.V_ 0U_.V_ 0U_.V_ 0U_.V_ 0U_.V_ 0U_.V_ 0U_.V_ 0U_.V_ 0U_.V_ 0U_.V_ 0U_.V_ 0U_.V_ 0U_.V_ 0U_.V_ PU_V.0U/V_0U_.V_ VP Place voltage VP divider within 0." of GTLREF pin R K/F-00 Trace as Wider as possible. VHORE VHORE VHORE _VRUN VHORE Total caps = 0 uf > 0 uf (Intel Recommendation) ESR = m ohm/ // m ohm/ ---> = 0.m ohm.u/0v_.u/0v_.u/0v_.u/0v_.u/0v_ R./F 0 0 0 0U_.V_ 0U_.V_ 0U_.V_ 0U_.V_ 0U_.V_ 0U/.V_ R./F R0./F R./F, mf---------esr, mw-----------esl, nh x 0 mf----- mw (typ) / --------. nh / 0 x 0. mf---- mw (typ) / 0-------0. nh / 0 R 0_ Removed _VRUN 0 0 0 0U_.V_ 0U_.V_ 0U_.V_ 0U_.V_ 0U_.V_ 0 0U_.V_ 0U_.V_ 0U_.V_ 0U_.V_ 0U_.V_ 0 0U_.V_ 0U_.V_ 0U_.V_ 0U_.V_ 0U_.V_ R K/F 0.U/0V_.U/0V_.U/0V_.U/0V_.U/0V_ T T T T T T T T T T0 OMP0 OMP OMP OMP TEST TEST PU_V VHORE U P OMP0 P OMP OMP OMP GTLREF0 GTLREF0 TEST F TEST N RSV F RSV RSV E RSV V N V V F V0 V00 V0 V0 0 V0 V0 E V0 E V0 E V0 E V0 E V0 E V0 F V F V F V F0 V F V G V G V H V H V J V0 J V K V U V V V V V W V W V Y V Y V V0 V V V V V V V V V V0 0 V V V V V 0 V V V V V0 V V V V 0 V V V V V E V0 E V E V E V E V E V F V F0 V F V F V F V0 F V othan Processor othan OF POWER, GROUN, RESERVE SIGNLS 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 E E E E0 E E E E E0 E E F F F F F F F F F F F F G G G G G H H H H J J J J J K K K K K L L L L M M M M M N N N N N P P P P R R,, STP_PU# PU_VI0 PU_VI PU_VI PU_VI PU_VI PU_VI othan othan T *P R N Install T *P SELPS_LK R 0_ SELPS_LK R 0_ R0 PSI No using for MX0, SELPS_LK, SELPS_LK R *0_N VP SEL0 SEL *0_N E SELPS_LK SELPS_LK U 0 W 0 VP0 W VP Y VP Y VP Y E VP othan Y E VP E VP F0 VP OF F VP F VP 0 0 F VP0 K POWER, GROUN N N VP L VP L VP M VP 0 M VP N VP N VP P VP P VP 0 R VP0 R VP T VP T VP U VP P VQ0 W VQ 0 E VI0 F VI F VI 0 G VI VI G VI H VI 0 E VSENSE F SENSE SEL0 SEL PSI 0 E R 00 E R 0 E R 0 E0 T 0 E T 0 E T 0 E T 0 E T 0 E0 U 0 0 E U 0 E U 0 F U F V F V F V F V F V F W F W 0 F W F othan Processor Size ocument Number Rev othan (Power) ate: Friday, October, 00 Sheet of PROJET : E Quanta omputer Inc.
VP VP R0 00/F VP VP HXROMP R./F R./F HXSOMP R0 /F Width HXSWING HYROMP R./F R./F 0.U/0V_ HYSOMP R /F 0mil Trace Length and Width 0mil Trace Length and 0mil Trace Length and Width 0mil Trace Length and Width HYSWING H#[0..] H#[0..] H#0 H# H# H# H# H# H# H# H# H# H#0 H# H# H# H# H# H# H# H# H# H#0 H# H# H# H# H# H# H# H# H# H#0 H# H# H# H# H# H# H# H# H# H#0 H# H# H# H# H# H# H# H# H# H#0 H# H# H# H# H# H# H# H# H# H#0 H# H# H# HXROMP HXSOMP HXSWING HYROMP HYSOMP HYSWING E E F H E F E K F J J H F K H H H K K J G H J L K J P L J P L U V R R P T R R U R T T R T V U W U V W W U U Y Y V Y W W Y Y W T L P U H0# H# H# H# H# H# H# H# H# H# H0# H# H# H# H# H# H# H# H# H# H0# H# H# H# H# H# H# H# H# H# H0# H# H# H# H# H# H# H# H# H# H0# H# H# H# H# H# H# H# H# H# H0# H# H# H# H# H# H# H# H# H# H0# H# H# H# HXROMP HXSOMP HXSWING HYROMP HYSOMP HYSWING HOST H# H# H# H# H# H# H# H0# H# H# H# H# H# H# H# H# H# H0# H# H# H# H# H# H# H# H# H# H0# H# HS# HST0# HST# HVREF HNR# HPRI# REQ0# HPURST# HLKINN HLKINP HSY# HEFER# HINV#0 HINV# HINV# HINV# HPWR# HRY# HSTN0# HSTN# HSTN# HSTN# HSTP0# HSTP# HSTP# HSTP# HERY# HHIT# HHITM# HLOK# HPREQ# HREQ0# HREQ# HREQ# HREQ# HREQ# HRS0# HRS# HRS# HPUSLP# HTRY# G E 0 F 0 E0 G0 E F0 G G 0 F G E F F E J E H0 E H K T U G F G K R V G K R W F G H# H# H# H# H# H# H# H#0 H# H# H# H# H# H# H# H# H# H#0 H# H# H# H# H# H# H# H# H# H#0 H# HPUSLP#_GMH H#[..] H#[..] S# HST0# HST# NR# PRI# HREQ0# PURST# HLK_MH# HLK_MH SY# EFER# HI0# HI# HI# HI# PWR# RY# HSTN0# HSTN# HSTN# HSTN# HSTP0# HSTP# HSTP# HSTP# HIT# HITM# HLOK# HREQ#0 HREQ# HREQ# HREQ# HREQ# RS#0 RS# RS# HTRY# R 0_ T *P T0 *P HVREF VP 0.U/0V_ R 00/F R 00/F oncern about HVREF Trace Length & Width T_0: Install R 0 ohm. PUSLP#, close to lviso 00mil R 00/F.U/0V_ LVISO T_00: hange footprint to mbga-intel-alviso from MG- o not install R for othan- and install for othan- PROJET : E Quanta omputer Inc. Size ocument Number Rev lviso (HOST) ate: Friday, October, 00 Sheet of
PM_EXTTS#0 PM_EXTTS# PM_EXTTS#0 PM_EXTTS# TP_N TP_N TP_N TP_N TP_N TP_N TP_N TP_N TP_N TP_N0 TP_N SMR_VREF_R SM_S0# SM_S# SM_S# SM_S# KE KE KE KE0 LK_SRM# LK_SRM LK_SRM# LK_SRM M_OOMP0 M_OOMP SMXSLEW SMYSLEW FG0 SELPS_LK SELPS_LK FG FG FG FG M_ROMPN M_ROMPP M_ROMPN FG FG FG FG0 FG FG M_ROMPP FG FG FG FG FG FG FG FG0 SMR_VREF_R PLTRST#_R FG REFSSLK# REFSSLK OT# OT SMR_VREF_R FG SMR_VREF_R INT_TXLOUT INT_TV_/R INT_TXLLKOUT- INT_TXLOUT- TV_REFSET INT_VG_GRN INT_ISP_ON INT_TXLOUT0- INT_TXLOUT VG_PIE_R REFSET INT_VG_LU INT_VG_RE INT_TV_Y/G INT_LON INT_TXLLKOUT INT_TXLOUT- INT_TXLOUT0 INT_TV_OMP MI_TXN0 MI_TXN MI_TXP0 MI_TXP SM_S#, SM_S0#, SM_S#, SM_S#, KE, KE, KE, KE0, LK_SRM# LK_SRM LK_SRM# LK_SRM LK_SRM# LK_SRM LK_SRM0# LK_SRM0 MI_RXN0 MI_RXN MI_RXP0 MI_RXP MI_TXN MI_TXN MI_TXP MI_TXP MI_RXN MI_RXN MI_RXP MI_RXP SELPS_LK, SELPS_LK, THERMTRIP#, PM_MUSY# IMVP_PWRG, PLTRST#,,0,, OT OT# REFSSLK# REFSSLK INT_VG_GRN INT_TXLOUT- LK_MH_GPLL# INT_TXLOUT- INT_VSYN INT_TXLLKOUT- INT_LON INT_VG_LU I_EIT INT_TXLOUT LK_MH_GPLL INT_LK INT_TXLLKOUT TV_Y/G INT_HSYN INT_TXLOUT0 I_EILK INT_TXLOUT INT_T INT_VG_RE INT_TXLOUT0- TV_/R INT_ISP_ON _VSUS VP _VSUS _VRUN _VSUS VG_PIE Size ocument Number Rev ate: Sheet of lviso (VG, MI) Friday, October, 00 Route as short as possible. Low=R High=R Low=MIx High=MIx System memory throttling using It's point to point, ohm trace, keep as short as possible. close lviso. SVOTRL_T default is no SOV Reserved for V T*P MIS PI-EXPRESS GRPHIS TV VG LVS UF LVISO SVOTRL_T H SVOTRL_LK H GLKN GLKP TV_ TV_ TV_ TV_REFSET J TV_IRTN TV_IRTN TV_IRTN LK E T E LUE E LUE# GREEN 0 GREEN# 0 RE RE# VSYN H HSYN G REFSET J0 LKLT_TRL E LKLT_EN F LTL_LK LTL_T L_LK F LV_EN F LIG LVG LVREFH F LVREFL F L_T F LLKN 0 LLKP LLKN LLKP LTN0 LTN LTN LTP0 LTP LTP LTN0 LTN LTN LTP0 LTP LTP EXP_OMPI EXP_IOMPO EXP_RXN0 E0 EXP_RXN F EXP_RXN G0 EXP_RXN H EXP_RXN J0 EXP_RXN K EXP_RXN L0 EXP_RXN M EXP_RXN N0 EXP_RXN P EXP_RXN0 R0 EXP_RXN T EXP_RXN U0 EXP_RXN V EXP_RXN W0 EXP_RXN Y EXP_RXP0 0 EXP_RXP E EXP_RXP F0 EXP_RXP G EXP_RXP H0 EXP_RXP J EXP_RXP K0 EXP_RXP L EXP_RXP M0 EXP_RXP N EXP_RXP0 P0 EXP_RXP R EXP_RXP T0 EXP_RXP U EXP_RXP V0 EXP_RXP W EXP_TXN0 E EXP_TXN F EXP_TXN G EXP_TXN H EXP_TXN J EXP_TXN K EXP_TXN L EXP_TXN M EXP_TXN N EXP_TXN P EXP_TXN0 R EXP_TXN T EXP_TXN U EXP_TXN V EXP_TXN W EXP_TXN Y EXP_TXP0 EXP_TXP E EXP_TXP F EXP_TXP G EXP_TXP H EXP_TXP J EXP_TXP K EXP_TXP L EXP_TXP M EXP_TXP N EXP_TXP0 P EXP_TXP R EXP_TXP T EXP_TXP U EXP_TXP V EXP_TXP W R 0/F_ T T T T T T T T.U/V_ T0.U/V_ R 0./F T T0*P T R 0./F R /F_ R0 *.K/F_N T0 R 0./F T T R0.K/F T R 0K-00 R 0/F_ T0*P T T T0*P T T R0 T0 T*P MI R MUXING FG/RSV PM LK N U LVISO MIRXN0 MIRXN MIRXP0 Y MIRXP MITXN0 MITXN MITXP0 Y MITXP SM_K0 M SM_K L SM_K E SM_K J SM_K F SM_K 0 SM_K0# N SM_K# K SM_K# E0 SM_K# J SM_K# F SM_K# 0 SM_KE0 P SM_KE M SM_KE H SM_KE K SM_S0# N SM_S# M SM_S# H SM_S# G SM_OOMP0 F SM_OOMP F SM_OT0 P SM_OT L SM_OT M SM_OT N0 SMROMPN K0 SMROMPP K SMVREF0 F SMVREF SMXSLEWIN E SMXSLEWOUT E SMYSLEWIN F SMYSLEWOUT F0 FG0 G FG H FG G FG F FG F FG G FG E FG FG J FG FG0 E FG FG E FG H FG FG H FG J FG H FG G FG G FG0 RSV G RSV G RSV J RSV RSV 0 RSV RSV M_USY# J EXT_TS0# J EXT_TS# H THRMTRIP# F PWROK 0 RSTIN# E REF_LKN REF_LKP REF_SSLKN REF_SSLKP N P N N N P N P N P N N N N N N0 N MIRXN MIRXN MIRXP MIRXP MITXN MITXN MITXP MITXP T T T R 0K/F T T.U/V_ T R 0/F_ T0 T T T T*P Quanta omputer Inc. PROJET : E.U/V_ T0 R 0./F R 0K/F R0 *.K/F_N R 0K-00 R 00/F T T R 0K/F T R.K/F T T T R T*P T*P T0*P T R0./F T T T R0 0/F_ R 0K/F R 0/F_ T*P T0*P R 0K-00
M MWE# M SRS# M SS# S_RVENIN# S_RVENOUT# M 0 M M M M M M M M M M M M M M M M M0 M M M M0 M M M M M M M M M MWE# R_M R_M R_M R_M R_M R_M M M M M M M M0 M R_M0 R_M R_M R_M R_M0 R_M R_M M M M M0 M M M M M M0 M M M M R_M M M R_M R_M R_M R_M R_M R_M R_M0 R_M R_M R_M M M M M M0 M R_M R_M R_M R_M0 R_M R_M R_SM_QS0 R_SM_QS R_SM R_SM0 SM_QS SM R_SM_QS R_SM R_SM_QS SM0 SM_QS0 R_SM SM SM_QS SM SM_QS R_SM_QS R_SM R_SM_QS R_SM SM_QS SM SM_QS SM_QS SM SM_QS SM R_SM_QS R_SM_QS R_SM SM R_SM R_M R_M R_M R_M R_M R_M R_M R_M R_M R_M R_M R_M R_M0 R_M R_M R_M R_M R_M R_M R_M R_M R_M0 R_M R_M R_M0 R_M R_M R_M R_M R_M R_M R_M R_M R_M R_M R_M R_M R_M R_M0 R_M R_M R_M R_M R_M R_M R_M R_M R_M R_M R_M R_M R_M R_M R_M0 R_M R_M R_M R_M0 R_M R_M R_M0 R_M R_M R_M M[0..] R_SM R_SM R_SM R_SM R_SM R_SM0 R_SM R_SM R_SM_QS R_SM_QS R_SM_QS R_SM_QS0 R_SM_QS R_SM_QS R_SM_QS R_SM_QS SM_QS[0..] SM[0..] M R_M M R_M M R_M M R_M M R_M M R_M R_M M M R_M M R_M M R_M M R_M M R_M M R_M M0 R_M0 M R_M M R_M R_M R_M M M M R_M M R_M M R_M M R_M R_M0 M0 R_M M R_M M M R_M M R_M R_M M R_M0 M0 R_M M M R_M R_M M R_M R_M M M M M S_RVENOUT# M M M M M S_RVENIN# M M M M M 0 M M M M M M M M M M M M0 M M M SRS# M M0 M SS# M M M MWE#, M SRS#, M SS#, M 0, M, M M[0..], M 0, M, M M[0..], M MWE#, M SRS#, M SS#, SM[0..], SM_QS[0..], M[0..], Size ocument Number Rev ate: Sheet of lviso (R) Friday, October, 00 RN PR-S-0 Quanta omputer Inc. PROJET : E RN PR-S-0 RN0 PR-S-0 R 0_ R0 0_ RN PR-S-0 R 0_ R 0_ RN PR-S-0 RN PR-S-0 RN PR-S-0 RN PR-S-0 RN PR-S-0 R 0_ RN PR-S-0 R0 0_ RN PR-S-0 RN PR-S-0 R 0_ R 0_ R 0_ T R SYSTEM MEMORY LVISO U SQ0 G SQ H SQ L SQ L SQ H SQ J SQ K SQ L SQ M SQ N SQ0 P SQ M SQ M SQ M SQ L SQ M SQ N SQ P SQ N SQ P SQ0 L0 SQ M0 SQ M SQ L SQ P SQ M SQ M SQ M SQ L SQ M SQ0 N SQ P SQ M SQ L SQ L SQ P SQ P SQ P0 SQ L SQ M SQ0 N SQ N SQ N SQ P SQ P SQ M SQ L SQ M SQ K SQ K SQ0 G SQ G SQ L SQ M SQ H SQ G SQ F SQ E SQ SQ SQ0 F SQ F SQ SQ S_S0# K S_S# K S_S# L S_M0 J S_M P S_M L S_M P S_M P S_M P S_M J S_M S_QS0 K S_QS P S_QS N S_QS P S_QS M S_QS M S_QS J S_QS E S_QS0# K S_QS# P S_QS# N0 S_QS# N S_QS# N S_QS# M S_QS# H S_QS# E S_M0 L S_M P S_M P S_M M S_M N S_M M S_M L S_M P0 S_M M S_M L0 S_M0 M S_M N0 S_M M0 S_M M S_S# N S_RS# P S_RVENIN# F S_RVENOUT# F S_WE# P R 0_ R 0_ RN PR-S-0 RN0 PR-S-0 RN PR-S-0 RN PR-S-0 R 0_ T R 0_ R 0_ RN PR-S-0 RN PR-S-0 RN PR-S-0 RN PR-S-0 R 0_ RN PR-S-0 RN PR-S-0 RN PR-S-0 RN PR-S-0 T RN PR-S-0 R SYSTEM MEMORY LVISO UG SQ0 E SQ E SQ G SQ G SQ E SQ E SQ F SQ F0 SQ H SQ H SQ0 K SQ G0 SQ G SQ G SQ H SQ J SQ K0 SQ J0 SQ H SQ H SQ0 K SQ H0 SQ H SQ G SQ F SQ G SQ J SQ K SQ H SQ H SQ0 G SQ J SQ G0 SQ G SQ G SQ H SQ H SQ H0 SQ J SQ K SQ0 J SQ K SQ J SQ H SQ K SQ J SQ J SQ K SQ G SQ G SQ0 SQ SQ H SQ G SQ E SQ SQ SQ SQ SQ SQ0 SQ SQ SQ S_S0# J S_S# G S_S# G S_M0 F S_M K S_M K S_M K S_M J0 S_M K S_M E S_M S_QS0 F S_QS K S_QS J S_QS K S_QS M0 S_QS H S_QS F S_QS S_QS0# F S_QS# K S_QS# K S_QS# J S_QS# L0 S_QS# H S_QS# F S_QS# S_M0 H S_M K S_M H S_M J S_M K S_M J S_M K S_M H S_M J0 S_M H0 S_M0 J S_M G S_M G0 S_M G S_S# H S_RS# K S_RVENIN# F S_RVENOUT# F S_WE# H RN PR-S-0 R 0_ RN0 PR-S-0 RN PR-S-0 RN PR-S-0 RN PR-S-0 T RN PR-S-0 RN PR-S-0
V_GG V_TV VQ_TV V_GPLL_R V_TVG V_RT V_TV _GG V_TV V_TV_R V_TVG_R V_TV_R VQ_TV_R V_PLL V._R_P VQ_TV_R V._R_P _GG V_GPLL V_RT_R V._R_P V_TV_R VG_PIE _TVG V_GPLL V_TV_R VP_GMH_P V_TV V_TV_R V_TV_R V_TV_R _TVG VP_GMH_P V_HPLL VP_GMH_P VG_PIE V._R_P V_TV_R V._R_P V_PLL V_RLL V_GG V_RLL V_TVG_R VP_GMH_P V._R_P V_MPLL _VRUN VP VP _VRUN _VRUN _VRUN VG_PIE VRUN VRUN VRUN _VRUN _VSUS _VRUN _VRUN _VRUN _VRUN _VRUN VRUN _VRUN VRUN VP _VRUN VP Size ocument Number Rev ate: Sheet of lviso (Power) 0 Friday, October, 00 Note: ll VSM pins shorted internally. Note: ll VSM pins shorted internally.. 0.U/0V_ R 0_ *nf_p_n L LMS.U/.V.U/0V_ 0.U/0V_ 0 0U_.V.U/0V_.U/0V_ L LMPGSN 0 0U_.V L0 LMPGSN.0U/V_ 0U_.V_.U/0V_ L LMPGSN *nf_p_n.u/0v_ 0 0U_.V_ 0 *nf_p_n.0u/v_ 0.U/0V_.U/.V_ 0 0U_.V_.U/0V_ 0.U/0V_ 0 0U_.V_ L LMPGSN 0.U/0V_ 0U_.V_ 0.U/0V_ L LMS.U/0V_ 0U_.V_ 0 *nf_p_n.u/0v_ L LMPGSN.U/0V_.0U/V_ L LMS.U/0V_ 0.U/0V_.U/0V_ 0 0U_.V_ 0U_.V_.U/0V_.U/0V_ L LMS R 0_.U/0V_ *nf_p_n.u/0v_ R 0_ R 0./F.U/0V_ POWER UH LVISO V0 T V R V N V M V K V J V V V U V T V R V0 P V N V M V L V K V J V H V G V V V U V0 T V R V P V N V M V L V K V J V H V K V0 H V K V J V K V K V K V K V W0 V U0 V T0 V0 K0 V V V U V K V W V V V T V K V K VH_MPLL0 VH_MPLL V_PLL V_PLL V_HPLL V_MPLL V_RT0 F V_RT E _RT G V_SYN H0 VTT0 K VTT J VTT K VTT W VTT V VTT U VTT T VTT R VTT P VTT N VTT0 M VTT L VTT K VTT W0 VTT V0 VTT U0 VTT T0 VTT R0 VTT P0 VTT N0 VTT0 M0 VTT K0 VTT J0 VTT Y VTT W VTT U VTT R VTT P VTT N VTT M VTT0 L VTT J VTT N VTT M VTT N VTT M VTT N VTT M VTT VTT N VTT0 M VTT N VTT M VTT N VTT M VTT N VTT M VTT VTT V VTT N VTT0 M VTT G V_TV0 F V_TV E V_TV0 V_TV V_TV0 F V_TV E V_TVG H _TVG G V_TV VQ_TV H V_LVS0 V_LVS V_LVS V_LVS VHV0 VHV VHV VSM0 M VSM H VSM P VSM VSM VSM VSM P VSM N VSM M VSM L VSM0 K VSM J VSM H VSM G VSM F VSM E VSM P VSM N VSM M VSM L VSM0 K VSM J VSM H VSM G VSM F VSM E VSM E VSM E VSM E VSM E VSM0 E0 VSM E VSM E VSM E VSM E VSM E VSM E VSM P VSM N VSM M VSM0 L VSM K VSM J VSM H VSM G VSM F VSM E VSM P VSM N VSM M VSM0 L VSM K VSM J VSM H VSM G VSM F VSM E VSM VSM VSM VSM0 0 VSM VSM P VSM M VSM E VTX_LVS0 VTX_LVS VTX_LVS V_SM0 F0 V_SM P V_SM F V_SM F VG0 E VG W VG U VG R VG N VG L VG J V_GPLL0 Y V_GPLL Y V_GPLL Y V_GG F _GG G R 0_ 0U_.V_.0U/V_.U/0V_ R 0_.U/0V_ R 0_ RV L LMPGSN.U/.V_ L LMPGSN 0.0U/V_ 0 *nf_p_n RV.U/0V_ 0.0U/V_.U/0V_ 0 0U_.V.U/0V_ Quanta omputer Inc. PROJET : E R0 0_.U/0V_ R 0_ 0U_.V_ 0U_V_L L LMPGSN 0 *nf_p_n.u/0v_.u/0v_ L LMPGSN.0U/V_ 0 0U_.V.0U/V_ R 0_.U/0V_ 00U/0V
VP VP _VSUS Size ocument Number Rev ate: Sheet of lviso (, NTF0 Friday, October, 00 RI is.v, RII is.v. Quanta omputer Inc. PROJET : E UE LVISO 0 G Y V T P M K H E N 0 L J F E E 0 Y W V U T R P N M L 0 K J H G F E N H 0 L F W V 0 U T R P N M L K J H 0 G F E N J 0 Y L G W V U T 0 R P N M L K J H G F 0 E P0 E0 0 0 0 Y0 0 M 00 J 0 G 0 0 0 W 0 V 0 U 0 P 0 L 0 H 0 G F E W E 0 N L J G F W G E 0 J G J F F H L H 0 J E N F F K0 V0 0 G0 F0 E0 0 0 N G W T J 0 H L U N J F G 0 L K H K N L 0 J G K J F J 0 N L J G F Y H F 0 00 Y0 0 L0 0 0 0 N 0 H 0 E 0 0 0 V 0 T 0 K H L Y P L E N 0 K G V G J E T 0 P L J P L W E N F 0 Y U P L H J 0 N L H E V T P 0 L J G E N L J G 0 Y LVS NTF U LVISO VTT_NTF0 W VTT_NTF V VTT_NTF U VTT_NTF T VTT_NTF R VTT_NTF P VTT_NTF N VTT_NTF M VTT_NTF L VTT_NTF W VTT_NTF0 V VTT_NTF U VTT_NTF T VTT_NTF R VTT_NTF P VTT_NTF N VTT_NTF M VTT_NTF L VSM_NTF0 VSM_NTF VSM_NTF VSM_NTF VSM_NTF VSM_NTF VSM_NTF VSM_NTF VSM_NTF VSM_NTF VSM_NTF0 VSM_NTF VSM_NTF 0 VSM_NTF 0 VSM_NTF VSM_NTF VSM_NTF VSM_NTF VSM_NTF VSM_NTF VSM_NTF0 VSM_NTF VSM_NTF VSM_NTF VSM_NTF VSM_NTF VSM_NTF VSM_NTF VSM_NTF VSM_NTF VSM_NTF0 VSM_NTF V_NTF0 W V_NTF V V_NTF U V_NTF T V_NTF R V_NTF P V_NTF N V_NTF M V_NTF L V_NTF W V_NTF0 V V_NTF U V_NTF T V_NTF R V_NTF P V_NTF N V_NTF M V_NTF L V_NTF W V_NTF V V_NTF0 U V_NTF T V_NTF R V_NTF P V_NTF N V_NTF M V_NTF L V_NTF W V_NTF V V_NTF U V_NTF0 T V_NTF R V_NTF P V_NTF N V_NTF M V_NTF L V_NTF W V_NTF V V_NTF U V_NTF T V_NTF0 R V_NTF P V_NTF N V_NTF M V_NTF L V_NTF W V_NTF V V_NTF U V_NTF T V_NTF P V_NTF0 N V_NTF M V_NTF L V_NTF Y0 V_NTF R0 V_NTF P0 V_NTF N0 V_NTF M0 V_NTF L0 V_NTF Y V_NTF0 R V_NTF P V_NTF N V_NTF M V_NTF L V_NTF Y V_NTF R V_NTF P V_NTF N V_NTF M V_NTF0 L V_NTF W V_NTF V V_NTF U V_NTF T V_NTF P V_NTF N V_NTF M V_NTF L _NTF0 _NTF _NTF Y _NTF _NTF _NTF Y _NTF _NTF _NTF Y _NTF _NTF0 _NTF Y _NTF _NTF _NTF Y _NTF _NTF _NTF Y _NTF R _NTF 0 _NTF0 0 _NTF _NTF _NTF _NTF _NTF _NTF _NTF Y _NTF R _NTF _NTF0 _NTF Y _NTF W _NTF V _NTF U _NTF T _NTF R _NTF P _NTF N _NTF M _NTF0 L _NTF _NTF _NTF Y _NTF W _NTF V _NTF U _NTF T _NTF R _NTF P _NTF0 N _NTF M _NTF L _NTF _NTF _NTF Y _NTF W _NTF V _NTF U _NTF T _NTF0 R _NTF P _NTF N _NTF M _NTF L _NTF _NTF Y _NTF _NTF Y
VRT RT VLW Item R K/F R M R K-00 RT_N0.V.U/0V_,, [0..],,, PME# PLK_IH Item Item,,0,, PLTRST#.U/0V_ R_VRT VSUS 0 Q PMS0 T TON R0 _ P R00V RT_N0 Try to remove SH, if possible. RT_RST# JP *SHORT P *R00V_N.V R K_ VRUN NMI 0M# FERR# IGNNE# INTR PUINIT# RIN# GTE0.U/0V_ R.K_ R K/F,, PIRST#,,, LKRUN# U SH 0 0 0 0 0 0 0 0 0 0 0 0 P[0..] PS# PS# P0 P P PIOR# PIOW# PIORY IRQ PREQ PK# P SM_INTRUER# FERR# RIN# GTE0 Item elet R VRT U/0V_ VLW R 0K-00 R0 0K-00 VSUS P.0U/0V_ PLTRST#_ LK_KX LK_KX R _ P[0..].KHZ W R0 0M_ 0 0 0 0 PIRST# PLTRST#_ P0 P P P P P P P P P P0 P P P P P PS# PS# P0 P P PIOR# PIOW# PIORY IRQ PREQ PK# U Y RTX Y RTX F NMI F R_FERR# 0M# F FERR# G IGNNE# G INTR F INIT# RIN# F 0GTE E 0 E F F E F E 0 H J K K L G 0 H H H M K K L 0 K P PME# G PILK R PIRST# R PLTRST# F LKRUN#/GPIO 0 F F E E F 0 E G RTRST# INTRUER# INTVRMEN S# E S# 0 E IOR# IOW# F IORY IEIRQ REQ K# PU PI IE RT LP PUPWRG/GPO INIT_V# THRMTRIP# SMI# STPLK# PUSLP# PSLP#/TP[] PRSLP#/TP[] ST -/ ZLI L0 L/F L/F L/F LRQ0# LRQ#/GPI LFRME# /E0# /E# /E# /E# FRME# IRY# TRY# EVSEL# STOP# PR SERR# PERR# PLOK# REQ0# REQ# REQ# REQ# REQ#/GPI0 REQ#/GPI REQ#/GPI0 GNT0# GNT# GNT# GNT# GNT#/GPO GNT#/GPO GNT#/GPO PIRQ# PIRQ# PIRQ# PIRQ# PIRQE#/GPI PIRQF#/GPI PIRQG#/GPI PIRQH#/GPI STLE# ST0_RXN ST0_RXP ST0_TXN ST0_TXP ST_RXN ST_RXP ST_TXN ST_TXP ST_LKN ST_LKP STRIS# STRIS Z_IT_LK Z_SYN Z_RST# Z_SIN0 Z_SIN Z_SIN Z_SO P N N N N P P G E E G E E E J H G G J J J E G E L M F E F E F N L M L M E G F F G G F 0 0 F F0 0 L0/FWH0 L/FWH L/FWH L/FWH LP_RQ0# LP_RQ# LFRME#/FWH PUPWRG THERMTRIP#_IH R_PUSLP# /E0# /E# /E# /E# FRME# IRY# TRY# EVSEL# STOP# PR SERR# PERR# PLOK# REQ0# REQ# REQ# REQ# REQ# REQ# REQ# GNT0# GNT# GNT# T0 T T T PIRQ# PIRQ# PIRQ# PIRQ# IH_GPIO S ST_LE# ST_RXN0_ ST_RXP0_ ST_TXN0_ ST_TXP0_ L0/FWH0, L/FWH, L/FWH, L/FWH, LP_RQ0# LFRME#/FWH, LK_PIE_ST# LK_PIE_ST R0./F STIS Place within 00mils of IH ball PUPWRG R0 _ R0 *0_N R00 0_ Item R _ R _ R _ T0 T R _ M_I0 M_I M_I RIN# SERIRQ GTE0 IRQ PIRQ# STOP# PIRQ# PIRQ# THERMTRIP#, SMI# STPLK# PUSLP#, PRSTP# PSLP# PRSTP# R _ VP /E0#,, /E#,, /E#,, /E#,, FRME#,, IRY#,, TRY#,, EVSEL#,, STOP#,, PR,, SERR#,, PERR#,, PLOK# REQ0# REQ# REQ# GNT0# GNT# GNT# PIRQ#, PIRQ# PIRQ# PIRQ#, M_SEN#, ST_RXN0_ 0 ST_RXP0_ 0,,,, SERIRQ < " VP R /F_ Item _ITLK _SYN _RESET# _SIN0 _SOUT VRUN VRUN VRUN REQ# SERR# REQ# REQ0# REQ0 : LN REQ : /RUS REQ : MINI PI GNT0 : LN GNT : /RUS GNT : MINI PI 0 0 VRUN *00P ST_TXN0_ *00P ST_TXP0_ PI Pullups RP.KX RP.KX R0 othan Installed othan N VRUN IRY# REQ# EVSEL# PERR# VRUN PIRQ# REQ# TRY# FRME# R0 Installed VRUN PLOK# REQ# REQ# IH_GPIO VRUN HLE# 0, ST_RXN0 0 ST_RXP0 0 istance between the IH- M and cap on the "P" signal should be identical distance between the IH- M and cap on the "N" signal for same pair. N Yonah Installed N 0 RP.KX R K-00 R R0 *00K N *00K N R K-00 oard I H LE Item R *00K N R K-00 IH-M *0P N 0K K Q0 *TYU 0 *0P N PROJET : E Quanta omputer Inc. Size ocument Number Rev IH-M (PU, PI, IE, ST, ) ate: Friday, October, 00 Sheet of
Item U Item Item VSUS LK_US LK_PIE_IH# LK_PIE_IH R *_ *.P_ Item00 PLK_SM PT_SM LIIH# THRM# IH_PWROK PRSLPVR NSWON# RSMRST#, IMVP_PWRG PM_MUSY#, LPP# LIIH# USP0 USP0- USO0# USP USP- USO# USP USP- USO# LK_US MI_RXN0 MI_RXP0 MI_TXN0 MI_TXP0 MI_RXN MI_RXP MI_TXN MI_TXP IH_RI# THRM# IH_PWROK PRSLPVR TLOW# NSWON# RSMRST# IMVP_PWRG PM_MUSY# LPP# 0K-00 R O0# O# O# O# LK_US T *P T *P T *P T *P T *P T *P T *P T *P T *P E T T R R V V U U H H G G K K J J Y W W T 0 E0 V U Y F W V USP0P USP0N O0# USPP USPN O# USPP USPN O#/GPI USPP USPN O#/GPI LK MI0_RXN MI0_RXP MI0_TXN MI0_TXP MI_RXN MI_RXP MI_TXN MI_TXP MI_LKN MI_LKP HSIN0 HSIP0 HSON0 HSOP0 HSIN HSIP HSON HSOP SMLK SMT SMLERT#/GPI US MI PI-EXPRESS RI# THRM# PWROK PRSLPVR/TP TLOW#/TP0 PWRTN# RSMRST# VRMPWRG M_USY#/GPIO SUS_STT#/LPP# SUSLK SM&SMI PM USPP USPN O# USPP USPN O# USPP USPN O#/GPI0 USPP USPN O#/GPI USRIS USRIS# MI_RXN MI_RXP MI_TXN MI_TXP MI_RXN MI_RXP MI_TXN MI_TXP MI_ZOMP MI_IROMP HSIN HSIP HSON HSOP HSIN HSIP HSON HSOP SMLINK0 SMLINK LINKLERET# SLP_S# SLP_S# SLP_S# LN_RST# SYS_RESET# WKE# MH_SYN# STP_PI#/GPO STP_PU#/GPO0 SERIRQ 0 0 Y Y W W F F M M L L P P N N W U Y T T T V U U G 0 O# O# O# O# SMLINK0 SMLINK SM_LINK_LERT# R_SYS_RESET# IH_PIE_WKE# MH_SYN# USP USP- USO# T_USP T_USP- USRIS MI_RXN MI_RXP MI_TXN MI_TXP MI_RXN MI_RXP MI_TXN MI_TXP Place within 00mils of IH- R0./F VSUS R./F MI_OMP _VRUN *P T Place within 00mils of IH- *P T *P T *P T *P T *P T *P T *P T0 T R 0_ SUS# SUS# O# O# O# O# PLTRST#,,0,, SYS_RESET# 0 STP_PI# STP_PU#,, SERIRQ,,,, RP 0KX IH_PIE_WKE# SMLINK0 SMLINK MH_SYN# O0# O# O# O# R 0 R 0K-00 R 0K-00 R0 0K-00 VSUS VRUN SYS_RESET# should be high faster than IH_PWROK. VSUS M_IH R _ 0P_ PSPK, PR_INSERT#, KSMI# SWI# SI# 0 IH_GPO 0 RST_H# Item PSPK PR_INSERT# KSMI# SWI# SI# SW00 T *P T *P T *P T *P PR_OK# T0 *P T0 *P E0 F E R M R 0 V F LK SPKR GPI GPI GPI GPI GPO GPO GPO GPIO EE_S EE_SHLK EE_OUT EE_IN MIS&GPIO LN GPIO ST0GP/GPIO GPIO GPIO STGP/GPIO STGP/GPIO0 STGP/GPIO GPIO GPIO LN_RX0 LN_RX LN_RX LN_TX0 LN_TX LN_TX P F R T E F G F0 E E E *P T *P T *P T *P T *P T *P T *P T *P T *P T R0 _ LI LI0 LN_LK LN_RSTSYN F *P T *P T VSUS R 0K-00 SWI# F G RSV RSV RSV RSV RSV RESERVE RSV RSV RSV RSV F G U VRUN R0.K PR_OK# IH-M VSUS VRUN R 0K-00 R0.K R0 0K-00 IH_PWROK RSMRST# KSMI# THRM# VSUS RP0 SI# LIIH# PT_SM SM_LINK_LERT# PR-0K VSUS RP PR-0K TLOW# IH_RI# PLK_SM R_SYS_RESET# PROJET : E Quanta omputer Inc. R 0K-00 Size ocument Number Rev IH-M (US, MI, LP) ate: Friday, October, 00 Sheet of
VMIPLL _V_PIE VMIPLL_R VREF VREF_SUS VREF VREF_SUS _VRUN _VSUS _VRUN VRT VRUN _VRUN _VRUN _VRUN VRT VRUN _VRUN VRUN VSUS _VRUN VP _VRUN VRUN VRUN _VRUN _VRUN VSUS VSUS _VRUN VSUS VSUS VSUS VRUN VRUN VLW _VSUS Size ocument Number Rev ate: Sheet of IH-M (Power & GN) Friday, October, 00 _V_PI _V_IH _V_ST_RX _V_ST_TX T_0: dding u cap to meet R.0 T_00: hange footprint to mbga0-intel-ich from MG0-IH R 00/F.U/0V_ GN U IH-M 00 00 00 00 00 00 00 00 00 00 0 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 E0 0 E 0 E 0 E 00 E 0 E 0 E 0 E 0 F0 0 F 0 F 0 F 0 F 00 G 0 F 0 0 G 0 G 0 G 0 G0 0 G 0 G 0 G 0 0 00 0 0 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 E 0 E 00 E 0 E 0 E 0 F 0 F 0 F 0 F 0 G 0 G 0 G 00 G 0 G 0 H 0 H 0 H 0 J 0 J 0 J 0 J 0 K 00 K 0 K 0 K 0 K 0 L 0 L 0 L 0 L 0 L 0 M 0 M M M M M M M M N N 0 N N N N N N N P P P 0 P P P R R R R R R R 0 R R R R T T T T T T 0 T T T T U U U U U V 0 V V V W W W W W Y Y 0 Y Y E 0U_V_L.U/0V_ 0U_.V_ R 0_.U/0V_.U/0V_ R *0_N.U/0V_ U/0V_.U/0V_.U/0V_.U/0V_ L LMS.U/0V_ 0.U/0V_ 0.U/0V_.U/0V_.U/0V_.U/0V_.U/0V_ U/0V_.U/0V_.U/0V_.U/0V_.U/0V_ R *0_N 0.U/0V_ RV.U/0V_.0U/V_ Quanta omputer Inc. PROJET : E.U/0V_ RV 0.0U/V_.U/0V_.U/0V_.U/0V_ L LMP00SPG.U/0V_.U/0V_.U/0V_ V U IH-M V V V V V V V V F V F V 0 F V G V G V G V G V H V H V J V J V K V 0 K V L V L V M V M V N V N V N V N V N V 0 P V P V P V P V R V R V T V T V U V U V 0 V V V V W V W V Y V Y V V V V V 0 V V E V E V F V G V V V V V 0 V V E V E V F V G VMIPLL V E VSTPLL E V G0 VLN_/VSUS VLN_/VSUS F VLN_/VSUS G VLN_/VSUS G VSUS VSUS U VSUS V VSUS V VSUS W VSUS Y VSUS VSUS VSUS VSUS 0 F VSUS G VSUS G V V 0 0 V V L V L V L V L V L V M V M V P V 0 P V T V T V U V U V U V U V U V F V V V V V V V G V G V 0 G V 0 V V V E V H V H V J V L V L V 0 M V P VSUS R VSUS U VSUS G V V V 0 V V E0 V E V E V E V E V F0 V G0 V G V P V VREF VREF VREF_SUS F VUSPLL VSUS 0 VRT VLN_/VSUS G0 VLN_/VSUS G V_PU_IO V_PU_IO V_PU_IO G VSUS VSUS VSUS E VSUS F VSUS F VSUS G VSUS G 0.U/0V_.0U/V_.U/0V_.U/0V_.U/0V_ R R.U/0V_
_VSUS _VSUS _VSUS _VSUS _VSUS _VSUS _VSUS _VSUS _VSUS 0 LK_SRM0 LK_SRM0# SOIMM0 N VREF VREF M M M M0 Q0 Q M M0 Q Q SM_QS0 V V 0 SM0 SM_QS0 M QS0 M0 M M Q Q M M M M Q Q M M Q Q 0 M V V M M SM_QS Q Q SM SM_QS QS M M M M M0 Q0 Q 0 M M0 Q Q LK_SRM0 V V LK_SRM LK_SRM LK_SRM0# K0 V LK_SRM# K0 LK_SRM# 0 M M0 M M0 M Q Q0 M M Q Q0 M Q Q SM_QS V V Q Q SM SM_QS V V SM M QS M M M QS M M Q Q 0 M Q Q 0 M M M M Q Q M M Q Q M Q Q M V V Q Q M M V V M SM_QS Q Q 0 SM SM_QS Q Q 0 SM QS M M QS M M0 M M0 M Q Q0 M M Q Q0 M Q Q V V 0 Q Q V V 0 0 0 QS M QS M 0 V V 0 V V _VSUS _VSUS U U/RESET U U/RESET R 00_ K 0 R 00_ R 00_ K V R 00_ K 0 KE V V K V KE0 KE V V KE KE KE0 KE KE0 M M U U/ M M M M U U/ M M M M 00 0 M M M M 00 M M 0 0 0 M M 0 0 0 0 M M M M 0 M M M M 0 0 0 M M M M 0 M M M M 0 0 0 M M M M 0 M M M M 0 0 M M0 M M 0 M M0 0 M M0 V V 0 M M M0 V V M M 0 0/P M SRS# M 0 M SRS# M MWE# 0 RS 0/P M SS# M MWE# M SS# SM_S0# WE S 0 0 RS SM_S# SM_S# WE S 0 SM_S# M M S0 S M M U() U S0 S M U() U M M M M Q Q M M Q Q M Q Q 0 SM_QS V V Q Q 0 SM SM_QS V V SM M QS M M M QS M M Q Q M Q Q M M M M0 Q Q 0 M M0 Q Q 0 M Q0 Q M V V Q0 Q M M V V M SM_QS Q Q SM SM_QS Q Q SM QS M M 0 QS M M M 0 M M Q Q M M Q Q M Q Q V V Q Q LK_SRM# V V LK_SRM# V K LK_SRM# LK_SRM V K LK_SRM K 0 LK_SRM M K 0 M M M M Q Q M M Q Q M Q Q SM_QS V V Q Q SM SM_QS V V SM M0 QS M 0 M M0 QS M 0 M Q0 Q M Q0 Q M M M M Q Q M M Q Q M Q Q0 M0 V V 0 Q Q0 M M0 V V 0 M SM_QS Q Q SM SM_QS Q Q SM QS M M QS M M M M M Q Q M M Q Q M Q Q 0 SMT V V Q Q 0 SMT V V GT_SM VRUN SMK S S0 SMK S S0 SL S GLK_SM SL S VRUN V(SP) S VRUN SMbus address 0 R0 V(I) U 00 V(SP) S R *0K N *0K N V(I) U 00 0 QT_R_SOIMM_H. QT_R_SOIMM_H. SMbus address.u/0v_ LOK 0,,.U/0V_ LOK,, P00 R SRM SO-IMM (00P) KE 0, N VREF Q0 Q V QS0 Q Q Q V Q QS Q0 Q V K0 K0 KE, SOIMM P00 R SRM SO-IMM (00P) VREF Q Q V 0 M0 Q Q Q 0 V Q M Q 0 Q V V 0 M M SM0 M M M M SM M M _VSUS _VSUS _VSUS _VSUS _VSUS LK_SRM# LK_SRM.U/0V_ 0.U/0V_.U/0V_.U/0V_.U/0V_.U/0V_.U/0V_.U/0V_.U/0V_.U/0V_.U/0V_.U/0V_.U/0V_.U/0V_.U/0V_.U/0V_.U/0V_ 0.U/0V_.U/0V_.U/0V_.U/0V_.U/0V_ 0.U/0V_.U/0V_.U/0V_.U/0V_ 0.U/0V_.U/0V_.U/0V VSUS 0 0U/.V_ ME issue change package from to and from.v to V and the cost /V lower than /.V.(.NT-->NT) and ESR lower too. M M[0..] M 0 M M SRS# M SS# M MWE# M M[0..] M 0 M M SRS# M SS# M MWE# M[0..] SM_QS[0..] SM[0..] SM_S0# SM_S# SM_S# SM_S# KE0 KE KE KE.U/0V_.U/0V_.U/0V_.U/0V_ 0.U/0V_ 0U/V <Type>.U/0V_.U/0V_.U/0V_.U/0V_.U/0V_.U/0V_.U/0V_.U/0V_ 0.U/0V_.U/0V_ M M[0..], M 0, M, M SRS#, M SS#, M MWE#, M M[0..], M 0, M, M SRS#, M SS#, M MWE#, M[0..], SM_QS[0..], SM[0..], SM_S0#, SM_S#, SM_S#, SM_S#, KE0, KE, KE, KE,.U/0V_.U/0V_.U/0V_ 0.U/0V_.U/0V_ PROJET : E Quanta omputer Inc..U/0V_ 0.U/0V_ 0.U/0V_.U/0V_ Size ocument Number R ev R SO-IMM 00P ate: Friday, October, 00 Sheet of
_VRUN For terminal R-pack. _VRUN.U/0V_.U/0V_ 0.U/0V_.U/0V_.U/0V_.U/0V_.U/0V_.U/0V_.U/0V_.U/0V_.U/0V_.U/0V_.U/0V_.U/0V_.U/0V_.U/0V_.U/0V_.U/0V_.U/0V_ PS.U/0V_.U/0V_.U/0V_ 0.U/0V_ 0U/.V VRUN 0.U/0V_.U/0V_.U/0V_ 00.U/0V_.U/0V_.U/0V_.U/0V_.U/0V_.U/0V_ 0.U/0V_.U/0V_.U/0V_.U/0V_.U/0V_.U/0V_ 0.U/0V_.U/0V_.U/0V_.U/0V_ PS _VRUN _VRUN _VRUN RN PR-S- RN PR-S- RN PR-S- PR-S- RN M M M0 M M M M M M M M M M M M M0 RN PR-S- RN PR-S- RN PR-S- PR-S- RN SM0 SM SM SM R _ R _ R _ R _ R _ R _ R _ R _ SM SM SM SM RN PR-S- PR-S- RN RN PR-S- RN PR-S- M SS# M MWE# M 0 M M KE M M M M SM_S# M SRS# M M0 M M M M M M M M M RN PR-S- RN PR-S- RN PR-S- RN PR-S- RN PR-S- RN PR-S- M0 M M M M M M M RN PR-S- PR-S- RN R _ SM_QS0 R _ SM_QS R _ R _ SM_QS SM_QS RN PR-S- RN PR-S- M M0 M M M M M M SM_S# M SS# M M M M0 RN PR-S- RN PR-S- RN PR-S- RN PR-S- M M M M0 M M M M RN PR-S- RN0 PR-S- R _ SM_QS R _ SM_QS R0 _ R _ SM_QS SM_QS RN M SRS# PR-S- M RN0 SM_S0# PR-S- M MWE# M M0 M M M M RN PR-S- RN PR-S- RN PR-S- PR-S- RN RN PR-S- RN PR-S- RN PR-S- RN0 PR-S- M M M M M M M M0 M M M M M M M M M M M M M0 M M M RN PR-S- RN PR-S- RN PR-S- RN PR-S- RN0 PR-S- RN PR-S- M[0..] SM_QS[0..] SM[0..] M M[0..] M 0 M M SRS# M SS# M MWE# M[0..], SM_QS[0..], SM[0..], M M[0..], M 0, M, M SRS#, M SS#, M MWE#, M M[0..] M 0 M M SRS# M SS# M MWE# M M[0..], M 0, M, M SRS#, M SS#, M MWE#, RN PR-S- RN PR-S- RN PR-S- RN0 PR-S- KE M M M M M M KE0 M M KE M M M M M M M M M M M 0 M M SM_S# M M RN PR-S- RN PR-S- RN PR-S- RN0 PR-S- RN PR-S- RN PR-S- M M M0 M M M M M RN PR-S- RN PR-S- SM_S0# SM_S# SM_S# SM_S# KE[0..] SM_S0#, SM_S#, SM_S#, SM_S#, KE[0..], PROJET : E Quanta omputer Inc. Size ocument Number R ev R TERMINTION ate: Friday, October, 00 Sheet of
FS FS FS PU SR PI 0 00 00 0 0 00 0 00 0 0 00 00 0 0 0 00 0 0 00 0 00 00 RSV 00 SMbus address LK_EN# STP_PI#,, STP_PU# TI_FLSH_M LK_US, SELPS_LK, SELPS_LK R *0K_N R0 0K-00 SELPS0_LK VRUN R *0_N R *0_N SELPS_LK VP R *0_N R0 *0K_N SELPS_LK FS and FS are directly controlled by othan- OT OT# VRUN LK_EN# R R0 Item00 GLK_SM GT_SM R 0 R0 0 SELPS_LK SELPS_LK R.K_ PR-S- RP Item P P R_OT R_OT# othan Install N XOUT SELPS0_LK VREF_R LKV LKV LKV othan N N XIN <00mil Y.MHZ V_R IREF R /F Iref=m, Ioh=*Iref V_R U 0 XTL_IN XTL_OUT 0 VTT_PWRG#/P# PI_STOP# PU_STOP# SLK ST FS/US_ FS/TEST_MOE FS/TEST_SEL V_REF V_PU V_PI_ V_PI_ V_SR0 V_SR V_SR V_ IREF OT OT# V K-0M GN_ GN_REF GN_PI_ GN_PI_ GN_SR GN_PU REF PU0 PU0# PU PU# 0 PU_ITP/SR PU#_ITP/SR# SR SR# SR SR# 0 SR SR# SR SR# SR SR# SR SR# 0 SR0 SR0# PI PI PI PI PIF PIF0/ITP_EN IS0/YXX 0m ( MX. ) M_REF R_HLK_PU R_HLK_PU# R_HLK_MH R_HLK_MH# R_MH_GPLL R_MH_GPLL# R_PIE_ST R_PIE_ST# R_PIE_IH R_PIE_IH# R_REFSSLK R_REFSSLK# R_PLK_LN R_PLK_PM R_PLK_SIO R_PLK_MINI R_PLK_IH PIF0 Place these termination to close K0M. ause those Pin-out is for urrent-mode. R./F R0./F R./F R./F RP PR-S- RP PR-S- RP LK_MH_GPLL LK_MH_GPLL# PR-S- RP LK_PIE_ST LK_PIE_ST# PR-S- RP LK_PIE_IH LK_PIE_IH# PR-S- RP REFSSLK REFSSLK# PR-S- Item00 R _ R _ R _ R _ R _ R _ R0 0K-00 VRUN HLK_PU HLK_PU# HLK_MH HLK_MH# LK_MH_GPLL LK_MH_GPLL# LK_PIE_ST LK_PIE_ST# LK_PIE_IH LK_PIE_IH# REFSSLK REFSSLK# PLK_LN PLK_PM PLK_ PLK_MINI PLK_IH PLK_LP Item0 R R R *0P_N *0P Item0 M_ *0P_N M_SUPERIO M_IH K-0M PIN, Strap Pin. for ITP or PIE using. onnect IH SM PT_SM PT_SM These are for backdrive issue Q RHU00N0 VRUN RP PR-S-0K onnect R Module's SM GT_SM GT_SM T_0: hange MOS to RHU00N0 due to layout concern. T_00: hange footprint to TSSOP-_- from TSSOP-0 L VRUN 0L-0 0 ohms@00mhz Tie to V (Logic ) is for ITP using. Tie to GN (Logic 0) is for PIE using..u/0v_ LKV LK_MH_GPLL R./F LK_MH_GPLL# R./F LK_PIE_ST R./F LK_PIE_ST# R./F PLK_SM PLK_SM Q.0U/0V_.0U/0V_ RHU00N0 GLK_SM GLK_SM R. V_R LK_PIE_IH LK_PIE_IH# REFSSLK REFSSLK# R0./F R./F R./F R./F VRUN L0 0L-0 0 ohms@00mhz.0u/0v_.0u/0v_ 0.0U/0V_.0U/0V_ LKV 0.U/0V_ R R.0U/0V_.U/0V_ VREF_R.0U/0V_ OT OT# R./F R./F Place these termination to close K0M. ause those Pin-out is for urrent-mode. R..0U/0V_ V_R.U/0V_ ypass Ps need to follow ypass P. Routing Rule, no vias between P to HIPSET V Pin or GN. Size ocument Number Rev LOK Generator ate: Friday, October, 00 Sheet of PROJET : E Quanta omputer Inc.
N LIIH# LI# SW MPU-0- LI-SWITH 0 S LI#.U/0V VRUN R0 00K_ VLW S VRUN R.K_ ISPON Q N00 Item 0 0 0 L_ON0 EILK EIT INT_TXLLKOUT INT_TXLLKOUT- INT_TXLOUT INT_TXLOUT- INT_TXLOUT INT_TXLOUT- INT_TXLOUT0 INT_TXLOUT0- ISPON LI LI0 LV.U/0V_ INT_TXLLKOUT INT_TXLLKOUT- INT_TXLOUT.U/V-0 INT_TXLOUT- INT_TXLOUT INT_TXLOUT- INT_TXLOUT0 INT_TXLOUT0- RIGHT LI LI0 EEI_V Item0 VRUN 000P_ R 0K-00 LI0 LI R 0K-00 VIN VRUN INT_LON INT_LON R0 00K_ Q N00 E_FPK# _VRUN _VRUN VRUN R.K_ R.K_ I_EILK EILK N00 Q _VRUN _VRUN VRUN R0.K_ R.K_ I_EIT EIT N00 Q _VRUN VRUN VRUN INT_ISP_ON INT_ISP_ON Q N00 R 0K-00.U/0V_ U0 TRE 0MIL IN IN ON/OFF OUT GN GN LV_.U/0V_ L 0_ T0U/0V.U/0V_ 00.0U/V_ LV T0U/0V Item E_FPK# Q N00 R *0 N T0_ PROJET : E Quanta omputer Inc. Size ocument Number Rev L onnector ate: Friday, October, 00 Sheet of
E SUSLE_LUE# SUSLE_LUE# Q VSUS R 0K_ PTEU Item Q PTEU R 00_ SUS_LUE# SUSLE_MER# SUSLE_MER# Q VSUS R 0K_ PTEU Q PTEU R 00_ SUS_MER# Item VRUN VRUN *SU-_N *SU-_N *SU-_N U HTGH R00 P N 0K_.U/0V_ Item VRUN *SU-_N INT_VSYN VG_RE VG_HSYN R P VG_GRN VG_LU PR_VSYN PR_HSYN *SU-_N PR_LK R PR_T K-00 0, M_SEN# P P P INT_HSYN VG_VSYN U HTGH R _VRUN VRUN 00- P *SU-_N R0.K_ R.K_ Q N00 R.K_ R.K_ P *SU-_N P *SU-_N INT_LK P P P R 0 VRUN *SU-_N *SU-_N *SU-_N Item P INT_T *H-TSSI P HOLE HOLE HOLE *H-I00P *H-TI P HOLE HOLE HOLE *H-I00P *H-I00P *H-I00P Q N00 TV-oard fixing Nut HOLE HOLE *H-I00P *H-I00P *SU-_N P0 *SU-_N P *SU-_N P *SU-_N P *SU-_N HOLE0 HOLE HOLE *H-I00P *H-I00P *H-I00P HOLE HOLE *H-I00P *H-I00P HOLE *H-I00P PU SOKET HOLE HOLE HOLE H-P H-P H-P HOLE HOLE HOLE0 HOLE HOLE HOLE *H-I00P *H-I00P *H-I00P *H-I00P *H-I00P *H-I00P PROJET : E Quanta omputer Inc. Size ocument Number Rev RT & TV onnector ate: Friday, October, 00 Sheet of E
ST H N0 ST 0 0 ST_TXP0 ST_TXN0 ST_RXN0 ST_RXP0 VH VH Item VH VH L L. *00P *00P LMPGSN LMPGSN ST_RXP0_ ST_RXN0_ ST_RXN0 ST_RXP0 VRUN VRUN Item, R VRUN.K_ HLE# VH -IERST P P P P P P P P0 PREQ PIOW# PIOR# PIORY PK# IRQ P P0 PS# HLE# R 0 PT H.U/V_ H_ON 0 0 0 0 N 0 000P_.U_0V P P P0 P P P P P SEL PIG# P PS# FOR MSTER R VH 0_ *0U_0V_N P[0..] PS# PS# P0 P P PIOR# PIOW# PIORY IRQ PREQ PK# R *.K_N P[0..] PS# PS# P0 P P PIOR# PIOW# PIORY IRQ PREQ PK# PREQ VRUN VRUN *SUYIN-00_H RST_H# R 0_ R 0K-00 VH,,,, PLTRST# R0 *0 N -IERST O Q TEU IH_GPO LE# R0 0_ Q N00 Q N00 R0 0K-00 HLE# Item LE# VO -IERST LE# R VO 0 Item N FOR SLVE P P P P P P P P0 PIOW# PIORY IRQ P P0 PS# RSEL R *0_N N 0 0 0 0 0 ON0_LP P P P0 P P P P P PREQ PIOR# PK# PIG# P PS#.U/0V_ 000P_ 000P_ 0U/.V_ VO VO L.0 LMPGSN VRUN Size ocument Number Rev H & ROM onnector ate: Friday, October, 00 Sheet 0 of PROJET : E Quanta omputer Inc.
PLK_PM PMSPK,,,,,,,,,, [0..] if -VR_EN pull-low, VR_PORT and VPLL_ will be.v outpin.,, PR,, SERR#,, PERR#,, STOP#,, IRY#,, TRY#,, PIRST#,, EVSEL#,, FRME# GNT# REQ#,,, PME# [0..] /E0# /E0# /E# /E# /E# /E# /E# /E# R 00/F *0P_ R *_ VSUS R PR SERR# PERR# STOP# IRY# TRY# PIRST# EVSEL# FRME# 0K-00 SS 0 0 0 0 W N U V W R U V N0 R0 U0 V0 N R U V R U V W P R U V V U V W U V V U W W W W W P P U V W U R R N V T U T L R U 0 0 0 0 PI US ORE LOGI PWR GN GN /E0# GN /E# GN /E# GN /E# GN0 GN ISEL GN GN PLK GN GN PR SERR# PERR# T STOP# LOK IRY# LTH TRY# PRST# EVSEL# GRST# FRME# GNT# REQ# MFUN0 MFUN MFUN MFUN RIOUT#/PME# MFUN SPKROUT MFUN SUSPEN# MFUN Multifunction& Miscellaneous PI VP0 VP VR_EN# VR_PORT0 VR_PORT V0 V V V V V V V V V V0 V V V GN0 GN GN GN GN W W0 H H M H H H0 H H J J K K M M M0 M N G G G H J J0 J K K0 K L L L0 L L M N L N VSUS VSUS 0.U/0V_.U/0V_ R 0_.U/0V_ 0.U/0V_.U/0V_.U/0V_.U/0V_.U/0V_.U/0V_.U/0V_.U/0V_.U/0V_.U/0V_.U/0V_.U/0V_.U/0V_.U/0V_.U/0V_ SKTPLKR R 0_ TPST TPSLOK TPSLTH GRST# T *0_N PIRST# R N M P P P N R PIRQ#, PIRQ# PIRQ#, SERIRQ,,,, PLOK# R_LE, R0 VSUS 0K-00 VSUS Item R0 00K *SS_N GRST#_ 0.U IOPJ- of NS have internally weak pull up LK P P P M N N N M M M L L L L K L K G H H F G E E M K G F H G J H H J K J E J J F N K F N F K U _/_0 _/ / / / / / / / 0/ E#/_0 _OE#/ / IOR#/ / IOWR#/ / / / / /_0 _/ / / / / 0/ 0/ / / /_0 _0/ E#/_E0# _/_E# _/_E# _REG#/_E# _/_LK _/_FRME# _/_IRY# _/_TRY# _/_EVSEL# _0/_STOP# _/_PR _/_PERR# _WIT#/_SERR# _INPK#/_REQ# _WE#/_GNT# _REY/_INT# _/_LOK# _WP/_LKRUN# _RESET/_RST# _/_RSV _/_RSV _VS#/_VS _VS#/_VS _#/_# _#/_# _V/_UIO _V/_STSHG _/_RSV V0 V PI P R / R US INTERFE _/0 _/ _/ _/ _/ _/ _/ _/ _/ _0/ _E#/0 _OE#/ _/ _IOR#/ _/ _IOWR#/ _/ _/ _/ _/ _/0 _/ _/ _/ _/ _/ _0/ _0/ _/ _/ _/0 _0/ _E#/E0# _/E# _/E# _REG#/E# _/LK _/FRME# _/IRY# _/TRY# _/EVSEL# _0/STOP# _/PR _/PERR# _WIT#/SERR# _INPK#/REQ# _WE#/GNT# _REY/INT# _/LOK# _WP/LKRUN# _RESET/RST# _/RSV _/RSV _VS#/VS _VS#/VS _#/# _#/# _V/UIO _V/STSHG _/RSV V0 V E E F E G E 0 G E G 0 F E SKTPLKR G0 F0 E E0 0 E E VSUS 0 0 0 0 E0# E# E# E# FRME# IRY# TRY# EVSEL# STOP# PR PERR# SERR# REQ# GNT# INT# LOK# LKRUN# RST# _/RSV _/RSV VS VS # # UIO STSHG _/RSV.U/0V_.U/0V_ VSUS, LPP# R R 0K-00 *0_N 0 *0P N Item GRST# GRST# PROJET : E Quanta omputer Inc. Size ocument Number Rev PMI TI ate: Friday, October, 00 Sheet of
0 E0# E# PR PERR# GNT# INT# V VPP LK IRY# E# 0 _/RSV LKRUN# # _/RSV 0 VS _/RSV LOK# STOP# EVSEL# V VPP TRY# FRME# VS RST# SERR# REQ# E# UIO STSHG 0 # Item Item VSUS TPST TPSLOK TPSLTH GRST# VPP V TPST TPSLOK TPSLTH N PMI SOKET GN - 0 - - - - E- E0 0- OE - 0 - - - E - PR - PERR WE/PGM - GNT RY/SY,IRQ*INT V VPP - LK 0 - IRY - E - - 0 - - - - - 0-0 0 - - - RFU WP,IOIS-KRUN GN GN - - - - 0 - RFU - E- 0 RFSH,VS*-VS IOR- IOWR- - - RFU - LOK 0- STOP 0 - EVSEL V VPP - TRY - FRME - - N - VS RESET-RST WIT-SERR 0 INPK-REQ REG- E V,SP-UIO V,STSHG-* - - 0 0- - GN SNT-0-P GN GN GN GN GN GN 0 U V_0 V_ V_ N_ T N_ LOK SHN# LTH V_ 0 N_ VPP/VORE V_0 V VPP/VORE V0 V0 N_ 0 V O# GN.VIN0 RESET#.VIN N_ TPS0 () Item 0.U/0V_ Item 0U_.V_.U/0V_ VSUS VSUS, R_LE Item 0U_.V_ IRLML0 Rds(on)=0. VSUS M_TRL0# VSUS -S VSUS -SM M_PWR_TR low active(default), or change register to high active Flash Media Layout Guidelines:. Signal traces should be 0 Ohm /- 0%.. ll signal traces should be routed with equal propagation delay, and with trace lengths as short as practical.. Ohm damping resistor for MS_LK and S_LK should be placed near the PI source..u/0v_.u/0v_ R.K Item Item Q IRLML0 *SS M_TRL0# T -MS -S -SM MSLK/SLK/-SMELWP R _ MSLK/SLK/-SMELWP_PI MSS/SM/-SMWE MS/S/SM MS/S/SM MS/S/SM MS/S/SM 0 VSUS *SS M_V 0 R.U/0V_ 0U_.V_ *00K_N Q *IRLML0.U/0V_.U/0V_ -S MS/S/SM MS/S/SM MSS/SM/-SMWE MSLK/SLK/-SMELWP MS/S/SM 0 MS/S/SM S_WP/-SME Item Item VSUS TI Erratum MSLK/SLK/-SMELWP MS/S/SM -MS MS/S/SM MS/S/SM 0 MS/S/SM MSS/SM/-SMWE M_V SM_RE# SM_LE SM_ SM_ SM_ SM_ S_WP/-SME SM_LE/S_GPIO0 SM_R/#/S_RFU T T0 T T T T T TPST TPSLOK TPSLTH V VPP U F MS_# E S_# F SM_# PI IN R REER (X,MM/S,MS) F M_PWR_TRL_0 F M_PWR_TRL_ G MS_LK//S_LK//SM_EL_WP# F MS_S//S_M//SM_WE# H MS_T//S_T//SM_ G MS_T//S_T//SM_ G MS_T//S_T//SM_ G MS_SIO(T0)//S_T0//SM_0 J SM_RE# J SM_LE H SM_ J SM_ J SM_ J SM_ H S_WP//SM_E# M_V Six For ard J SM_LE//S_GPIO0 K SM_R/#//S_RFU K SM_PHYS_WP#//S_F L L S_PWR_TRL S_# K S_LK K S_RST L S_T L S_O# R 0K-00 S_VVK S_V_V N0 _S T_S /T_S M_S _S V_S LK_S _S T0_S 0 T_S WP_S _MS V_MS SLK_MS RESERVE_MS INS_MS RESERVE_MS SIO_MS RESERVE_MS 0 S_MS _MS GN MSX0-X0-0X00 V V_X _X 0 _X _X _X _X _X _X 0_X GN_X -WP_X -WE_X 0 LE_X LE_X -E_X -RE_X R/-_X GN_X GN GN *0P N *0P N *0P N.U/0V_.U/0V_ 0U_.V_.U/0V_ 0U_.V_ SM_ SM_ SM_ SM_ MS/S/SM MS/S/SM MS/S/SM MS/S/SM 0 MSLK/SLK/-SMELWP MSS/SM/-SMWE SM_LE SM_LE/S_GPIO0 S_WP/-SME SM_RE# SM_R/#/S_RFU -SM PROJET : E Quanta omputer Inc. Size ocument Number Rev PMI Socket & -IN- ate: Friday, October, 00 Sheet of
U (FIREWIRE) N P T Item0 *.P_N *.P_N *.P_N *.P_N L_TP0 L_TP0- L_TP0 L_TP0- Item0 PS M PHY PORT 0 TP0 TP0- TP0 TP0- TPIS0 V W V W U TP0 -TP0 TP0 -TP0 IS0 R R R R./F_./F_./F_./F_ R U/0V_.K/F_ 0P_ IS URRENT RYSTL EEPROM US R0 R XO XI S SL U U R R M M _R0 _R X-0MIL Y X000 X-0MIL _ST _SLK R R R R0 R.K/F_ P_.MHz 0 P_.K_.K_ *0 N *0 N 0MIL VSUS L_TP0 L_TP0- L_TP0 L_TP0- L PLWS00SQT <PN> F_TP0P L PLWS00SQT <PN> F_TP0N F_TP0P F_TP0N J 00F00S0ZL PHY PORT TP TP- TP TP- TPIS V W V W U TP R -TP R TP R -TP R IS./F_./F_./F_./F_ R U/0V_.K/F_ 0P_ POWER LSS P0 P P VPLL_ R U V T P0 P P R *0 N R 0_ R *0 N R 0_ R *0 N R 0_.U/0V_ VSUS VSUS VSUS _SLK _ST U SL S WP NM0 0 V GN VSUS.U/0V_ T T R 0_ W T P N RSV TEST0 VPLL_ V0 V V V R R V L VPLL- 0_.U/0V_.U/0V_.U/0V_ VSUS T E _US_EN# PHY_TEST_M R R0.K_ VSUS T E _US_EN# Item TI_FLSH_M R *.P_ *_ M LK_ PI GN0 GN GN PLL0 PLL N U U P T 00P_.U/0V_0U_.V_ Size ocument Number Rev IEEE PROJET : E Quanta omputer Inc. ate: Friday, October, 00 Sheet of
Item VRUN 0.U/0V_ U IN EN# EN# TPS0 GN OUT O# OUT O# USPWR0 USPWR USO0# USO# USP0- USP0 USPWR0 L LMPG00SN LWHN00SQL ML N US I Select : Interrupt Pin : INT#, INT# VRUN Request Indicate : REQ# Grant Indicate : GNT# RF_LE RF_EN S, PIRQ# *0P_ R *_ PLK_MINI REQ#,,,,,,,, /E#,, /E#,,,,,,,, /E#,, /E# IRY#,, IRY#,,, LKRUN# SERR#,, SERR# PERR#,, PERR# /E#,, /E#,,,,,, 0,,,,,,,, VRUN,, 0 0 0 0 0 VRUN N TIP LN LN LN LN LE_GP LE_GN N -INT V R(IRQ) GN PILK GN -REQ V GN (V) -E GN GN -E -IRY V -LKRUN -SERR GN -PERR -E GN 0 GN V (V) V GN SYN SIN0 ITLK -_PRIMRY EEP GN MI -MI GN -RI V GN RING LN LN LN LN 0 LE_YP LE_YN N V -INT 0 R(IRQ) VUX -RST V -GNT 0 GN -PME (V) 0 V 0 ISEL GN 0 0 PR 0 GN -FRME -TRY -STOP V 0 -EVSEL GN 0 GN -E0 V 0 0 (V) SERIRQ 00 GN 0 MEN 0 SOUT 0 SIN 0 -RESET 0 -MPIK GN SPK -SPK GN 0 N VUX GN VRUN VRUN V_S MINI_PME# R 0/F_ 0 PR FRME# TRY# STOP# EVSEL# /E0# VSUS MINI-PI PIRQ# PIRST#,, GNT# 0,,,,,,,,,, 0,, PR,,,,,, FRME#,, TRY#,, STOP#,, EVSEL#,,,,,,,,,, /E0#,,,,,,,, 0,, SERIRQ,,,, Item R0 K-00 PWR_LUE# PWR_MER# RF_LE T_LE Item R *K-00 TLE_LUE# R0 K-00 VRUN Each channel is PTEU VSUS VSUS VLW VLW U EN# V V GN *G Q PTEU 0U/.V_ O# VOUT VOUT VOUT *.0U/V_ Q0 PTEU Q PTEU Q0 Q PTEU.0U/V_ *0U/.V_ LE 0 0 0U/.V_.0U/V_ Item USO# USPWR LE_LUE/ORNGE LE LE_LUE/ORNGE R 00_ R 00_ VSUS VSUS VRUN VLW TV_Y/G TV_/R TV oard R,R need to change OM to 0ohm USP- USP TV_Y/G TV_/R OPTION (OKING ON OR S-VEIO oard ON) R 00_ R 00_ LE LE_LUE/ORNGE R0 R00 0 0 VIN Orange Forward Voltage.0~. lue Forward Voltage.~. Forward urrent 0m T_PWRON# T_USP T_USP- IT-E N R 0 *0-00 SW USPWR M L LMPG00SN LWHN00SQL ML T_LE *LWHN00SQL ML.U/0V_ Q PTEU USPWR VRUN N US Q N00 T_V USP USP- N SM0-SURS-P_LUE R.K_ 0 VRUN MINIPI_TYPE_III Item RF_SW# PTEU V_S TLE_MER# Q T_SW#,,, PME# Q N00 R.K_ Q N00 R 0K-00 MINI_PME#,0 HLE# 0 LE# PSLE# LE LE_LUE/ORNGE R 00_ R0 00_ VRUN Q PTEU LE LUE_LE R 00_ VRUN VRUN NSWON# T# SW MISKI_T00-PST SW Q MISKI_T00-PST SROLE# PTEU LE VRUN LUE_LE R 00_ T# SW NUMLE#, R_LE Q PTEU LE LUE_LE R 00_ LUE_LE Forward Voltage.~.0 Forward urrent 0m MISKI_T00-PST Q PTEU LE LUE_LE R 00_ PROJET : E Quanta omputer Inc. Size ocument Number Rev Mini PI, T/P, US, LE Friday, October, 00 ate: Sheet of
.U/0V_ V_S V_LN_ L K0HS0 V_S V_LN_ L KHS0 0 U-0 R RTL0SL(G)--E RTL00L(0,00)--.U/0V_.U/0V_.U/0V_.U/0V_.U/0V_.U/0V_0U/0V_,, [0..] 0 *0P_ U V_LN_ V_LN_ R 0_ PI PV_LN VL V_LN R RTL0SL(G)-- RTL00L(0,00)--E EEI EESEL EELK EEO V_LN_ V_LN Item R 0K_ R *0 N_ R *0 N LN_PME# ISOLTE V V V V V V V 0 VL VL VL 0 V V V V V EEI 0 EES 0 EESK EEO 0 PME ISOLTE LWKE 0 T GN GN GN GN GN GN GN GN GN GN GN GN GN GN GN GN GN GN GN GN GN GN GN LE I/F GN GN PME#,,, LN_PME# ISOLTE LKRUN#,,, TRL V_LN_ VRUN R K-00 R K/F_ V_S 00 *00P-00_N U EESEL EELK EEI EEO S SK I O -GR V N N GN V_S.U/0V_.U/0V_.U/0V_ 0U/0V_ 0 0 0 0 0 0 0 0 RTLXX's power for o-lay : S RTL0SL(Giga-Lan) VL ONNET.V_ VL ONNET RTL00L(0,00M-Lan) V_LN_ S RTL0SL(Giga-Lan) HS- V_LN_ ONNET RTL00L(0,00M-Lan) HS- ONNET.V_ 0 0 0 S RTL0SL(Giga-Lan) V ONNET.V_ RTL00L(0,00M-Lan) V ONNET.V_ 0 0 0 /E0#,, /E0# /E# E0,, /E# /E# E,, /E# 0 /E# E,, /E# PLK_LN E PLK_LN LK R0 * PR POWER EEPROM PR PR,, INT PIRQ#, V---.V IGITL PM GNT GNT0# VH------.V NLOG RST PIRST#,, VL-----.V NLOG REQ 0 REQ0# RTL0SL(G)--.K SERR# V-----.V NLOG SERR SERR#,, IRY# V_----.VNLOG IRY IRY#,, RTL00L(0,00M).K FRME# FRME FRME#,, R_ R 0_ PI ISEL EVSEL# EVSEL EVSEL#,, TRY# TRY TRY#,, PERR# PERR 0 PERR#,, STOP# STOP STOP#,, R *.K_N RSET R.K SMLK SMLK VH 0 V_LN_ VL VL HS HS R *0 N HS- R *0 N HS- V_LN_ LN_XIN R 0_ XTL PV_LN LN_XOUT LN_XIN P XTL HV 0 V_LN_ TRL R Y TRL *M_N.0000 MHz V V_LN V_LN LN_XOUT V RESERVE V 0 P V TRN MI- TRN TRP MI TRP TRN MI- TRN R,R TRP MI TRP TRN TRN RTL0SL(G)-- MI- TRP MI TRP TR0N TR0N RTL00L(0,00)--E MI0- TR0P MI0 TR0P TLE# LE0 TLE# 00M_LINK# LE 00M_LINK# 0M_LINK# LE 0M_LINK# R0,R,Q R,R,R,R,, 000M_LINK# LE 000M_LINK# Item RTL0SL(G)--E RTL0SL(G)-- RTL00L(0,00) -- RTL00L(0,00)--E RTL0SL/00L 00 0 0 V MEN LKRUN TRL UI R.K TRL PV_LN Q *sb Q olayout with Q RTL0SL(G)-- RTL00L(0,00) --E Q,R,,, RTL0SL(G)-- RTL00L(0,00) --E Item TRL Item0 Q V_LN TRL PV_LN V_LN_ Q *sb PV_LN TRN TRP TRN TRP R *./F_ R *./F_ R *./F_ R *./F_ Item *.0U_ *.0U_ TRN TRP TR0N TR0P R./F_ R./F_ R./F_ R./F_.0U_.0U_ Item0 R_V R *U-0 *.U/0V_ *.U/0V_ *0 N V_LN.U/0V_.U/0V_.U/0V_ 0U/0V_ PV_LN U-0 R0 0_ 0.U/0V_.U/0V_ V_LN V_LN PROJET : E Quanta omputer Inc. Size ocument Number Rev LN RTL0S/00L ate: Friday, October, 00 Sheet of
E U RTL0SL(G)-- RTL00L(0,00) --E 000M Yellow 0 LN-00-P Item0 000P/KV Item Item PV_LN N T# U R0 0 V_LN_ RJ_TRN_TR0N TRN_TR0N RJ_TRN_TR0P RJ_TRN_TR0P MX- T- TR0N TRN_TR0P RJ_TRN_TR0N MT MX T TR0P RJ_TRN_TRP RJ_TRN_TRN MT TT 0 TRN_TRN TRN RJ_TRN_TRP RJ_TRN_TRP MX- T- TRN_TRP TRP RJ_TRN_TRN MT MX T RJ_TRN_TRN RJ_TRN_TRN MT TT TRN_TRN TRN RJ_TRN_TRP RJ_TRN_TRP MX- T- 0 TRN_TRP TRP RJ_TRN_TRN MT MX T RJ_TRN_TRN MT TT TRN_TRN TRN RJ_TRN_TRP MX- T- TRN_TRP TRP 00MPS MT MX T R0 0 MT TT 00M mber 0 Orange Item R R0 R R *GSN00 Item */F_ */F_ /F_ /F_ *.0U/V_ *.0U/V_ *.0U/V_ *.0U/V_ 0M green Green 0 R0 0 0MPS Item R0 0_ U OK_TR0N RJ_TRN_TR0N TRN_TR0N R 0_ RJ_TRN_TR0P TX- T- 0 TRN_TR0P MT TX T OK_TR0P MT T Item R 0_ N N For ME MT N N OK_TRN For RTL00 For RTL0S issue N RJ_TRN_TRN T T TRN_TRN R 0_ RJ_TRN_TRP RX- R- TRN_TRP colayout RX R OK_TRP R RING_ RING_ 0 NS00 R TIP_ TIP_ 0 Item 00M_LINK# 00MPS 0MPS Item 0 V_LN_ R 00K_ Item 000M_LINK# 0M_LINK# V_LN_ Item TLE# V_LN_ V_LN_ R R G G G G T# Item RJ-ON N *RJ-ON 00K_ 00K_ RING_ TIP_.U/V_.U/V_ V_LN_ V_LN_ U NWZ00-UHS V_LN_.U/V_ U NWZ00-UHS U NSZ0-UHS U NSZ0-UHS OK_0/00M_LINK# OK_TLE# U RTL0SL(G)--E RTL00L(0,00) -- U,U,, RTL0SL(G)--E RTL00L(0,00) -- Item elet E-Switch 0.U/0V_ R R R R R R0 R Q Q Q R R R R R R0 R0 R R R 0 U U U U PROJET : E Quanta omputer Inc. Size ocument Number Rev LN Switch & onnector ate: Friday, October, 00 Sheet of E