REVISION REOR EO NO: PPROVE: TE: V_I R 0K.V_REF V 0.uF _SHN V_IN GN GN U GN V_OUT_F V_OUT_S GN LT 0uF R 0k 0uF IN IN VOS_TRIM VOS_TRIM U N OPE OUT.V_REF R 0k 0uF IN IN VOS_TRIM VOS_TRIM U N OPE OUT 9 00pF V_REF 00pF U U MX9 U SHIEL_0X000_000 MX9 OMPNY: alifornia Institute of Technology RWN:. Miller //0 HEKE: Precision Voltage Source OE: RWING NO: QULITY ONTROL: MUSI 00 RELESE: SLE: SHEET: OF
REVISION REOR EO NO: PPROVE: TE: V_REF V_I R.0 pf R 0K V _S_ SLK(_IN) IN(U/_) SPI/_U 0.uF P V VSS GN N.. _S H SLK(_IN) W IN(U/_) 0 L 9 SPI/_U N.. N. N.. MX R 0K U R R0 0K U 0.0uF R9 0K 0 00pF R 00 0.uF K E R Q MPS 0K R.0 R R 0K 0K U R 99 K U 0 R9 00 LE K K R 00 N R0 0 0pF 0pF 00 R 00 0 0.0uF V_MON I_V I_MON_L I_MON m = 00mV 0K OMPNY: alifornia Institute of Technology 00pF RWN: HEKE:. Miller //0 OE: Id, Vd rive and Monitor RWING NO: QULITY ONTROL: RELESE: MUSI 00 SLE: SHEET: OF
REVISION REOR EO NO: PPROVE: TE: V V_REF 00pF R 0K 00pF R 0K 00pF 9 0.uF R9 0K U R 0K U R 0K R 0K U I_SET P V VSS GN N.. _S H SLK(_IN) W IN(U/_) 0 L 9 SPI/_U N.. N. N.. R.K R0.K 00pF MX R K _S_ SLK(_IN) IN(U/_) SPI/_U 00pF R MX9 U R.99K U9 VG_SET 0K V_REF R 0K U9 RWN:. Miller //0 HEKE: OMPNY: alifornia Institute of Technology Vg Level Shift and Id Set OE: RWING NO: QULITY ONTROL: RELESE: MUSI 00 SLE: SHEET: OF
REVISION REOR EO NO: PPROVE: TE: R pf Meg R 0K I_SET I_MON_L VG_SET R9 0K R 0K U0 0 R 0K R0 K 0.uF U V 9 SPTO K R K U R 0K MMSZTG 9 MMSZTG K K K K R 00 N (NI) 0 N (NI) R 0pF R0 00 K 0pF VG_MON VG V OPEN/LOSE_LOOP U0 V Y GN Y SN R 00 Loop Open = OFF LE Loop losed = ON RWN:. Miller //0 HEKE: OMPNY: alifornia Institute of Technology Vg rive and Monitor OE: RWING NO: (with digital interface not connected, default is open loop) QULITY ONTROL: MUSI 00 RELESE: SLE:
IT_S_ L R U V REVISION REOR EO NO: PPROVE: TE: IGITL_GN IT_S_ IGITL_GN F00 K L R F00 K 0pF 0 0pF K K HL U R.K 00pF R 00 9 00pF R 00 R9.K U0 Y GN V Y VG V SPI_S_ SPI_S_ HL IT_IN(U/_) IGITL_GN L R9 F00 K 0pF K U HL R.K 00pF 00pF R.K U Y GN V Y VG SPI_IN(U/_) SPI_SLK(_IN) IT_SLK(_IN) IGITL_GN IT_SPI/_U IGITL_GN L R F00 K L R F00 K 0pF 9 0pF K K U HL U HL R 00 R.K 00pF R 00 R0 00 00pF R 00 R.K OMPNY: V U Y GN V Y VG alifornia Institute of Technology SPI/_U OPEN/LOSE_LOOP IT_OPEN/LOSE_LOOP L R F00 K "0" = Open; "" = losed IGITL_GN 9 0pF K U HL RWN: HEKE: QULITY ONTROL: RELESE:. Miller //0 OE: RWING NO: MUSI 00 SLE: igital Interface and Isolation
REVISION REOR EO NO: PPROVE: TE: TOGGLE_IN TOGGLE_U/_ TOGGLE_S_ TOGGLE_S_ SPI/_U SPI_S_ SPI_S_ SPI_IN(U/_) SPI_SLK(_IN) 0 U / G Y Y 9 Y Y _S S_ IN(U/_) SLK(_IN) H V U9 IN_ OUT_ GN V IN_ OUT_ MX V U IN_ OUT_ GN V IN_ OUT_ MX RWN: HEKE:. Miller //0 OMPNY: alifornia Institute of Technology igital Pot. Select: SPI UP/OWN OE: RWING NO: QULITY ONTROL: MUSI 00 RELESE: SLE:
REVISION REOR EO NO: PPROVE: TE: L 0nH V_MON R K R K 90 VS F FUSE0.V 9 0uF L 00uH 9 uf U9 IN OUT N SENS/J N YP _SHN GN LT9 9 0.0uF R9.K R 0 9 0uF L uh V @ 00m V GN GN GN GN U MI09 EN VIN VOUT YP 00 0.0uF 0uF V VS F FUSE0.V 9 0uF L 00uH 9 uf U GN OUT IN YP J 99 0.0uF LT9YP R 0 R0.K 9 0uF V @ 00m L uh R K R K V V_MON OMPNY: U IN OUT GN _SHN YP LT 9 0uF alifornia Institute of Technology 0.0uF V_I RWN:. Miller //0 HEKE: OE: Power onditioning I RWING NO: QULITY ONTROL: RELESE: MUSI 00 SLE: SHEET: OF
REVISION REOR EO NO: PPROVE: TE: V V V V U V V U V V OPE OPE.0uF 9.0uF.0uF.0uF V V V V U0 V V U V V 0 0 0.0uF.0uF.0uF.0uF V OMPNY: alifornia Institute of Technology 0.uF 0.uF 0.uF 0 0.uF 0.uF 0.uF RWN:. Miller //0 HEKE: OE: Power onditioning II RWING NO: QULITY ONTROL: RELESE: MUSI 00 SLE: SHEET: OF
REVISION REOR EO NO: PPROVE: TE: V V U V V V U9 V V V.0uF 9.0uF 0.0uF.0uF V V V U V V V V V V V U V V U V V.0uF.0uF.0uF.0uF.0uF.0uF V OMPNY: alifornia Institute of Technology 9 0.uF 0.uF 9 0.uF 0 0.uF RWN: HEKE:. Miller //0 OE: Power onditioning III RWING NO: QULITY ONTROL: MUSI 00 RELESE: SLE: 9
REVISION REOR EO NO: PPROVE: TE: J: IN J IGITL_GN J IGITL_GN J IT_S_ J IT_S_ J IT_IN(U/_) J9 IT_SLK(_IN) MOLEX SIP P Latching J I_V J IT_SPI/_U J0 IT_OPEN/LOSE_LOOP J J IGITL_GN J IGITL_GN J VG J J J R 00 R 00 LE J V L uh L uh V_MON V_MON J J R 00 L0 0nH L9 uh R 00 V_I J J9 J0 J V_MON I_MON VG_MON J J J L 0nH L 0nH L 0nH IGITL_GN R.K R.K J J J VS J9 VS OMPNY: alifornia Institute of Technology J J J VS J0 J J VS RWN: HEKE:. Miller //0 OE: oard onnectors RWING NO: QULITY ONTROL: MUSI 00 RELESE: SLE: 0
REVISION REOR EO NO: PPROVE: TE: nalog and Power Supply Notes:. Powerup sequence is V, V, V_I, V,._REF,._REF, _REF. Power Supply Voltage Limits: < VS <. For LT9, Vout =. * ( R/R ) ( R * 0n ), and R = 0, R =.k. For LT9, Vout =. * ( R/R ) ( R * 0n ), and R = 0, R =.k. Vd output limits: 0. to. V. Vg output limits:.0 to. V. For HLM optocoupler: logic HIGH input gives logic LOW output. Other side of LE for Open Loop/losed Loop is connected to V 9. MX9 is precisionmatched resistor pair; each resistor is kohms RWN:. Miller //0 HEKE: OMPNY: alifornia Institute of Technology OE: RWING NO: QULITY ONTROL: MUSI 00 RELESE: SLE:
REVISION REOR EO NO: PPROVE: TE: igital and Logic Levels Notes:. The static conditions for the SPI interface are: ) _S line HIGH ) IN line HIGH ) SLK line LOW. For VG dual inverting Schmitttriggers: logic HIGH input gives logic LOW output. For b dual peripheral driver: any logic LOW input gives HIGH output; both inputs logic HIGH gives LOW output. IT_SLK(_IN) = HIGH, SLK(_IN) = HIGH; this is a toggling bit. IT_IN(U/_) = HIGH, IN(U/_) = HIGH; this is a toggling bit. _S_ controls drain voltage adjustment. _S_ controls gate voltage adjustment. IT_S_ = HIGH, _S_ = HIGH OMPNY: alifornia Institute of Technology 9. IT_S_ = HIGH, _S_ = HIGH 0. IT_SPI/_U = HIGH, SPI/_U = HIGH RWN: HEKE:. Miller //0 OE: RWING NO: QULITY ONTROL: MUSI 00 RELESE: SLE: