TECNICAL DATA IN74C244A Octal 3-State Noninverting Buffer/Line Driver/Line Receiver igh-performance Silicon-ate CMOS The IN74C244A is identical in pinout to the LS/ALS244. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs. This octal noninverting buffer/line driver/line receiver is designed to be used with 3-state memory address drivers, clock drivers, and other bus-oriented systems. The device has noninverting outputs and two active-low output enables. Outputs Directly Interface to CMOS, NMOS, and TTL Operating oltage Range: to Low Input Current: 1.0 µa igh Noise Immunity Characteristic of CMOS Devices ORDERIN INFORMATION IN74C244AN Plastic IN74C244ADW SOIC T A = -55 to 125 C for all packages PIN ASSINMENT LOIC DIARAM FUNCTION TABLE PIN 20= CC PIN 10 = ND Enable A, Enable B Inputs A,B Outputs YA,YB L L L L X Z X=don t care Z = high impedance
MAXIMUM RATINS * Symbol Parameter alue Unit CC DC Supply oltage (Referenced to ND) -0.5 to +7.0 IN DC Input oltage (Referenced to ND) -1.5 to CC +1.5 OUT DC Output oltage (Referenced to ND) -0.5 to CC +0.5 I IN DC Input Current, per Pin ±20 ma I OUT DC Output Current, per Pin ±35 ma I CC DC Supply Current, CC and ND Pi ±75 ma P D Power Dissipation in Still Air, Plastic DIP+ SOIC Package+ Tstg Storage Temperature -65 to +150 C T L Lead Temperature, 1 mm from Case for 10 Seconds (Plastic DIP or SOIC Package) 750 500 * Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditio. +Derating - Plastic DIP: - 10 mw/ C from 65 to 125 C SOIC Package: : - 7 mw/ C from 65 to 125 C mw 260 C RECOMMENDED OPERATIN CONDITIONS Symbol Parameter Min Max Unit CC DC Supply oltage (Referenced to ND) IN, OUT DC Input oltage, Output oltage (Referenced to ND) 0 CC T A Operating Temperature, All Package Types -55 +125 C t r, t f Input Rise and Fall Time (Figure 1) CC = CC = CC = 0 0 0 1000 500 400 This device contai protection circuitry to guard agait damage due to high static voltages or electric fields. owever, precautio must be taken to avoid applicatio of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, IN and OUT should be cotrained to the range ND ( IN or OUT ) CC. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either ND or CC ). Unused outputs must be left open.
DC ELECTRICAL CARACTERISTICS (oltages Referenced to ND) Symbol Parameter Test Conditio 25 C to -55 C I Minimum igh- Level Input oltage IL Maximum Low - Level Input oltage O Minimum igh- Level Output oltage OUT = CC - I OUT 20 µa OUT = I OUT 20 µa IN = I I OUT 20 µa CC 1.5 3.15 4.2 0.5 1.35 1.8 1.9 4.4 5.9 uaranteed Limit 85 C 1.5 3.15 4.2 0.5 1.35 1.8 1.9 4.4 5.9 125 C 1.5 3.15 4.2 0.5 1.35 1.8 1.9 4.4 5.9 Unit IN = I I OUT ma I OUT 7.8 ma 3.98 5.48 3.84 5.34 3.7 5.2 OL Maximum Low- Level Output oltage IN = IL I OUT 20 µa I IN I OZ I CC Maximum Input Leakage Current Maximum Three- State Leakage Current Maximum Quiescent Supply Current (per Package) IN = IL I OUT ma I OUT 7.8 ma 0.26 0.26 0.33 0.33 0.4 0.4 IN = CC or ND ± ±1.0 ±1.0 µa Output in igh-impedance State IN = IL or I OUT = CC or ND IN = CC or ND I OUT =0µA ±0.5 ±5.0 ±10.0 µa 4.0 40 160 µa
AC ELECTRICAL CARACTERISTICS (C L =50pF,Input t r =t f = ) CC Symbol Parameter 25 C to -55 C t PL, t PL t PLZ, t PZ t PZL, t PZ t TL, t TL Maximum Propagation Delay, A to YA or B to YB (Figures 1 and 3) Maximum Propagation Delay, Output Enable to YA or YB (Figures 2 and 4) Maximum Propagation Delay, Output Enable to YA or YB (Figures 2 and 4) Maximum Output Traition Time, Any Output (Figures 1 and 3) 96 18 15 110 22 19 uaranteed Limit 85 C 125 C Unit C IN Maximum Input Capacitance - 10 10 10 pf C OUT Maximum Three-State Output Capacitance (Output in igh-impedance State) 110 22 19 60 12 10 115 23 20 140 24 140 24 75 15 13 135 27 23 165 33 165 33 90 18 15-15 15 15 pf C PD Power Dissipation Capacitance (Per Buffer) Used to determine the no-load dynamic power coumption: P D =C PD CC 2 f+i CC CC Typical @25 C, CC =5.0 34 pf Figure 1. Switching Waveforms Figure 2. Switching Waveforms Figure 3. Test Circuit Figure 4. Test Circuit
EXPANDED LOIC DIARAM (1/8 of the Device)
N SUFFIX PLASTIC DIP (MS - 001AD) 20 1 A 11 10 B Dimeion, mm Symbol MIN MAX A 24.89 26.92 B 6.1 7.11 C 5.33 F L D 0.36 0.56 F 1.14 1.78 D N C -T- K SEATIN PLANE M J 2.54 7.62 J 0 10 K 2.92 3.81 NOTES: 0.25 (0.010) M T 1. Dimeio A, B do not include mold flash or protrusio. Maximum mold flash or protrusio 0.25 mm (0.010) per side. L 7.62 8.26 M 0.2 0.36 N 0.38 D SUFFIX SOIC (MS - 013AC) -T- 20 1 D A 11 10 0.25 (0.010) M T C M B K P C SEATIN PLANE Symbol MIN MAX A 12.6 13 B 7.4 7.6 C 2.35 2.65 D 0.33 0.51 F 0.4 1.27 NOTES: J 0 8 1. Dimeio A and B do not include mold flash or protrusion. K 0.3 2. Maximum mold flash or protrusion 5 mm (0.006) per side M 0.23 0.32 for A; for B 0.25 mm (0.010) per side. P 10 10.65 J R x 45 F M Dimeion, mm 1.27 9.53 R 0.25 0.75