Asymmetric Gate turn-off Thyristor 5SGA 30J4502

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V DRM = 45 V I TGQM = 3 A I TSM = 24 1 3 A V T = 2.2 V r T =.6 mω V Dclink = 28 V Asymmetric Gate turn-off Thyristor 5SGA 3J452 Patented free-floating silicon technology Low on-state and switching losses Annular gate electrode Industry standard housing Cosmic radiation withstand rating Doc. No. 5SYA122-3 Jan. 3 Blocking Repetitive peak off-state voltage Repetitive peak reverse voltage Permanent DC voltage for 1 FIT failure rate V DRM V GR 2 V 45 V V RRM 17 V V Dclink Ambient cosmic radiation at sea level in open air. 28 V Repetitive peak off-state Repetitive peak reverse I DRM V D = V DRM, V GR 2 V 6 ma I RRM V R = V RRM, R GK = Ω 2 ma Mechanical data Mounting force F m 36 4 44 kn Pole-piece diameter D p ±.1 mm 75 mm Housing thickness H ±.5 mm 26 mm Weight m 1.3 kg Surface creepage distance D s Anode to Gate 33 mm Air strike distance D a Anode to Gate 15 mm 1) Maximum rated values indicate limits beyond which damage to the device may occur

GTO Data 5SGA 3J452 On-state Max. average on-state I TAVM Half sine wave, T C = 85 C 93 A Max. RMS on-state I TRMS 146 A Max. peak non-repetitive surge Limiting load integral Max. peak non-repetitive surge Limiting load integral I TSM t p = 1 ms, T vj = 125 C, sine wave 24 1 3 A After Surge: V D = V R = V I 2 t 2.88 1 6 A 2 s I TSM t p = 1 ms, T vj = 125 C, sine wave 4 1 3 A After Surge: V D = V R = V I 2 t 8 1 3 A 2 s On-state voltage V T I T = 3 A, T vj = 125 C 4 V Slope resistance r T I T = 3...4 A.6 mω Threshold voltage V (T) T vj = 125 C 2.2 V Holding I H T vj = 25 C 5 A Turn-on switching Critical rate of rise of onstate Critical rate of rise of onstate di T /dt cr 4 A/µs T vj = 125 C, f = 2 Hz I T = 3 A, I GM = 3 A, di T /dt cr di G /dt = 2 A/µs 8 A/µs f = 1 Hz Min. on-time t on 1 µs Turn-on delay time t d V D =.5 V DRM, T vj = 125 C 3 µs Rise time t I T = 3 A, di/dt = 2 A/µs, r 6 µs I GM = 3 A, di G /dt = 2 A/µs, C S = 6 Turn-on energy per pulse E on µf, R S = 5 Ω 3.6 J Turn-off switching Max. controllable turn-off I TGQM V DM V DRM, di GQ /dt = 4 A/µs, C S = 6 µf, L S.3 µh 3 A Min. off-time t off 8 µs Storage time t S V D =.5 V DRM, T vj = 125 C 25 µs Fall time t V DM V DRM, di GQ /dt = 4 A/µs, f 3 µs I TGQ = I TGQM, Turn-on energy per pulse E off R 13 J S = 5Ω, C S = 6 µf, L S =.3 µh Peak turn-off gate 9 A I GQM Doc. No. 5SYA122-3 Jan. 3 page 2 of 9

5SGA 3J452 Gate Repetetive peak reverse voltage V GRM 17 V Repetetive peak reverse I GRM 2 ma VGR = V GRM Gate trigger I GT V D = 24 V, R A =.1 Ω 3 A Gate trigger voltage V GT T vj = 25 C, 1 V Thermal Junction operating temperature T vj -4 125 C Storage temperature range T stg -4 125 C Thermal resistance junction to case Thermal resistance case to heatsink (Double side cooled) Analytical function for transient thermal impedance: R th(jc) Double side cooled 12 K/kW R th(jc)a Anode side cooled 22 K/kW R th(jc)c Cathode side cooled 27 K/kW R th(ch) Single side cooled 6 K/kW R th(ch) Double side cooled 3 K/kW Z thjc (t) = n i= 1 R i(1- e -t/ τ i i 1 2 3 4 R i (K/kW) 5.4 4.5 1.7.4 τ i (s) 1.2.17.1.1 ) Fig. 1 Transient thermal impedance, junction to case. Doc. No. 5SYA122-3 Jan. 3 page 3 of 9

5SGA 3J452 I T [A] 3 125 C 25 C P AV [kw] 5. 4.5 25 2 4. 3.5 3. DC 18 Rect. 18 Sine 12 Rect. 6 Rect. 15 2.5 1 2. 1.5 5 1..5 1. 1.5 2. 2.5 3. 3.5 4. V T [V]. 25 5 75 1 125 15 I TAV [V] Fig. 2 On-state characteristics. Fig. 3 Average on-state power dissipation vs. average on-state.. I TSM [ka] 1. i 2 dt [A 2 s] 1.E+7 I tsm I 2 td 1. 1.E+6 Conditions: Before surge: T j = 125 C After surge: V D = V 1. 1 1 1 t p [ms] 1.E+5 Fig. 4 Surge and fusing integral vs. pulse width. Doc. No. 5SYA122-3 Jan. 3 page 4 of 9

5SGA 3J452 Fig. 5 Forward blocking voltage vs. gate-cathode resistance.. Fig. 6 Static dv/dt capability: Forward blocking voltage vs. neg. gate voltage or gate cathode resistance. Fig. 7 Forward gate vs. forard gate voltage. Fig. 8 Gate trigger vs. junction temperature Doc. No. 5SYA122-3 Jan. 3 page 5 of 9

5SGA 3J452 Fig. 9 Turn-on energy per pulse vs. on-state and turn-on voltage. Fig. 1 Turn-on energy per pulse vs. on.-state and rise rate Common Test conditions for figures 9, 1 and 11: di G /dt = 2 A/µs C S = 6 µf R S = 5 Ω Tj = 125 C Definition of Turn-on energy: E on 2 µ s = V D ITdt (t =, IG =.1 I Common Test conditions for figures 12, 13 and 15: GM ) Definition of Turn-off energy: E off 4 µ s = V D ITdt ( t =, IT =.9 I TGQ ) Fig. 11 Turn-on energy per pulse vs. on-state and turn-on voltage. Doc. No. 5SYA122-3 Jan. 3 page 6 of 9

E off [J] 18 Conditions: 16 VD = ½ VDRM digq/dt = 4 A/ µs 14 CS = 6 µf, RS = 5 Ω Tj = 125 C 12 1 8 6 4 2 Q GQa V DM=V DRM ¾ V DRM ½ V DRM Q GQa [A] 1 9 8 7 6 5 4 3 2 1 5 1 15 2 25 3 I TGQ [A] Fig. 12 Turn-off energy per pulse vs. turn-off and peak turn-off voltage. Extracted gate charge vs. turn-off. E off [J] 14 12 1 8 6 4 2 C S = 3µF 5SGA 3J452 C S = 4µF C S = 6µF Conditions: di GQ /dt =4 A/µs T j = 125 C 5 1 15 2 25 3 I TGQ [A] Fig. 13 Turn-off energy per pulse vs. turn-off and snubber capacitance. C s [µf] E off [J] t s [µs] I GQM [A] 6 3 5 1 5 Condition: V D = ½ V DRM, V DM = V DRM di GQ/dt = 4 A/µs R S = 5 Ω, LS 3 nh 24 4 I GQM 8 4 18 3 6 3 12 2 t S 4 E off 2 1 1 15 2 25 3 Fig. 14 Required snubber capacitor vs. max allowable turn-off. I GQM [A] 6 1 Condition: di GQ/dt = 4 A/µs Tj = 125 C 2-1 1 2253 4 5 6 7758 9 1 11 12 125 T j [ C] Fig. 15 Turn-off energy per pulse, storage time and peak turn-off gate vs. junction temperature. t s [s] 5 I GQM [A] 1 t s [s] 5 I GQM [A] 1 45 4 I GQM 9 8 45 4 8 35 7 35 3 6 3 6 25 t S 5 25 2 4 2 I GQM 4 15 1 5 Conditions: I TGQ = 3 A T j = 125 C 1 2 3 4 5 6 3 2 1 di GQ /dt [A/µs] Fig. 16 Storage time and peak turn-off gate vs. neg. gate rise rate. 15 t S 1 Conditions: 2 5 di GQ/dt =4 A/µs T j = 125 C 5 1 15 2 25 3 I TGQ [A] Fig. 17 Storage time and peak turn-off gate vs. turn-off. Doc. No. 5SYA122-3 Jan. 3 page 7 of 9

5SGA 3J452 Fig. 18 General and voltage waveforms with GTO-specific symbols. Fig. 19 Outline drawing. All dimensions are in millimeters and represent nominal values unless stated otherwise. Doc. No. 5SYA122-3 Jan. 3 page 8 of 9

5SGA 3J452 Reverse avalanche capability In operation with an antiparallel freewheeling diode, the GTO reverse voltage V R may exceed the rate value V RRM due to stray inductance and diode turn-on voltage spike at high di/dt. The GTO is then driven into reverse avalanche. This condition is not dangerous for the GTO provided avalanche time and are below 1 µs and 1 A respectively. However, gate voltage must remain negative during this time. Recommendation : V GR = 1 15 V. ABB Switzerland Ltd Doc. No. 5SYA122-3 Jan. 3 Semiconductors Fabrikstrasse 3 CH-56 Lenzburg, Switzerland Telephone +41 ()58 586 1419 Fax +41 ()58 586 136 Email abbsem@ch.abb.com Internet www.abb.com/semiconductors